ARM: OMAP2+: Drop unused legacy data for prcm_reg_id and module_bit
Subsystems (5)
Tony Lindgren
maintainerPATCH 1/1 ARM: OMAP2+: Drop unused legacy data for prcm_reg_id and module_bit
We are now using clock drivers in driver/clk/ti for enabling and disabling modules and these are all unused.
Let's also remove the related unused defines in cm-regbits-24xx.h and cm-regbits-34xx.h.
Reported-by H. Nikolaus Schaller <[email protected]>
Cc Paul Walmsley <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/cm-regbits-24xx.h | 81 ----------- arch/arm/mach-omap2/cm-regbits-34xx.h | 162 --------------------- arch/arm/mach-omap2/omap_hwmod.h | 6 - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 14 -- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 28 ---- arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 64 -------- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 131 ----------------- 7 files changed, 486 deletions(-)
arch/arm/mach-omap2/cm-regbits-24xx.h +0 -81
@@ -14,38 +14,8 @@* published by the Free Software Foundation. */ -#define OMAP24XX_EN_CAM_SHIFT 31 -#define OMAP24XX_EN_WDT4_SHIFT 29 -#define OMAP2420_EN_WDT3_SHIFT 28 -#define OMAP24XX_EN_MSPRO_SHIFT 27 -#define OMAP24XX_EN_FAC_SHIFT 25 -#define OMAP2420_EN_EAC_SHIFT 24 -#define OMAP24XX_EN_HDQ_SHIFT 23 -#define OMAP2420_EN_I2C2_SHIFT 20 -#define OMAP2420_EN_I2C1_SHIFT 19 -#define OMAP2430_EN_MCBSP5_SHIFT 5 -#define OMAP2430_EN_MCBSP4_SHIFT 4 -#define OMAP2430_EN_MCBSP3_SHIFT 3 -#define OMAP24XX_EN_SSI_SHIFT 1 -#define OMAP24XX_EN_MPU_WDT_SHIFT 3 -#define OMAP24XX_CLKSEL_MPU_SHIFT 0 -#define OMAP24XX_CLKSEL_MPU_WIDTH 5#define OMAP24XX_AUTOSTATE_MPU_MASK (1 << 0) -#define OMAP24XX_EN_TV_SHIFT 2 -#define OMAP24XX_EN_DSS2_SHIFT 1 -#define OMAP24XX_EN_DSS1_SHIFT 0#define OMAP24XX_EN_DSS1_MASK (1 << 0) -#define OMAP2430_EN_I2CHS2_SHIFT 20 -#define OMAP2430_EN_I2CHS1_SHIFT 19 -#define OMAP2430_EN_MMCHSDB2_SHIFT 17 -#define OMAP2430_EN_MMCHSDB1_SHIFT 16 -#define OMAP24XX_EN_MAILBOXES_SHIFT 30 -#define OMAP2430_EN_SDRC_SHIFT 2 -#define OMAP24XX_EN_PKA_SHIFT 4 -#define OMAP24XX_EN_AES_SHIFT 3 -#define OMAP24XX_EN_RNG_SHIFT 2 -#define OMAP24XX_EN_SHA_SHIFT 1 -#define OMAP24XX_EN_DES_SHIFT 0#define OMAP24XX_ST_MAILBOXES_SHIFT 30#define OMAP24XX_ST_HDQ_SHIFT 23#define OMAP2420_ST_I2C2_SHIFT 20
@@ -54,81 +24,30 @@#define OMAP2430_ST_I2CHS2_SHIFT 20#define OMAP24XX_ST_MCBSP2_SHIFT 16#define OMAP24XX_ST_MCBSP1_SHIFT 15 -#define OMAP24XX_ST_DSS_SHIFT 0#define OMAP2430_ST_MCBSP5_SHIFT 5#define OMAP2430_ST_MCBSP4_SHIFT 4#define OMAP2430_ST_MCBSP3_SHIFT 3#define OMAP24XX_ST_AES_SHIFT 3#define OMAP24XX_ST_RNG_SHIFT 2#define OMAP24XX_ST_SHA_SHIFT 1 -#define OMAP24XX_AUTO_SDRC_SHIFT 2 -#define OMAP24XX_AUTO_GPMC_SHIFT 1 -#define OMAP24XX_AUTO_SDMA_SHIFT 0 -#define OMAP24XX_CLKSEL_USB_MASK (0x7 << 25) -#define OMAP24XX_CLKSEL_SSI_MASK (0x1f << 20) -#define OMAP2420_CLKSEL_VLYNQ_MASK (0x1f << 15)#define OMAP24XX_CLKSEL_DSS2_MASK (0x1 << 13) -#define OMAP24XX_CLKSEL_DSS1_MASK (0x1f << 8) -#define OMAP24XX_CLKSEL_L4_SHIFT 5 -#define OMAP24XX_CLKSEL_L4_WIDTH 2 -#define OMAP24XX_CLKSEL_L3_SHIFT 0 -#define OMAP24XX_CLKSEL_L3_WIDTH 5 -#define OMAP24XX_CLKSEL_GPT12_MASK (0x3 << 22) -#define OMAP24XX_CLKSEL_GPT11_MASK (0x3 << 20) -#define OMAP24XX_CLKSEL_GPT10_MASK (0x3 << 18) -#define OMAP24XX_CLKSEL_GPT9_MASK (0x3 << 16) -#define OMAP24XX_CLKSEL_GPT8_MASK (0x3 << 14) -#define OMAP24XX_CLKSEL_GPT7_MASK (0x3 << 12) -#define OMAP24XX_CLKSEL_GPT6_MASK (0x3 << 10) -#define OMAP24XX_CLKSEL_GPT5_MASK (0x3 << 8) -#define OMAP24XX_CLKSEL_GPT4_MASK (0x3 << 6) -#define OMAP24XX_CLKSEL_GPT3_MASK (0x3 << 4) -#define OMAP24XX_CLKSEL_GPT2_MASK (0x3 << 2)#define OMAP24XX_AUTOSTATE_DSS_MASK (1 << 2)#define OMAP24XX_AUTOSTATE_L4_MASK (1 << 1)#define OMAP24XX_AUTOSTATE_L3_MASK (1 << 0) -#define OMAP24XX_EN_3D_SHIFT 2 -#define OMAP24XX_EN_2D_SHIFT 1#define OMAP24XX_AUTOSTATE_GFX_MASK (1 << 0) -#define OMAP2430_EN_ICR_SHIFT 6 -#define OMAP24XX_EN_OMAPCTRL_SHIFT 5 -#define OMAP24XX_EN_WDT1_SHIFT 4 -#define OMAP24XX_EN_32KSYNC_SHIFT 1#define OMAP24XX_ST_MPU_WDT_SHIFT 3#define OMAP24XX_ST_32KSYNC_SHIFT 1 -#define OMAP24XX_CLKSEL_GPT1_MASK (0x3 << 0)#define OMAP24XX_EN_54M_PLL_SHIFT 6#define OMAP24XX_EN_96M_PLL_SHIFT 2 -#define OMAP24XX_EN_DPLL_MASK (0x3 << 0)#define OMAP24XX_ST_54M_APLL_SHIFT 9#define OMAP24XX_ST_96M_APLL_SHIFT 8#define OMAP24XX_AUTO_54M_MASK (0x3 << 6)#define OMAP24XX_AUTO_96M_MASK (0x3 << 2)#define OMAP24XX_AUTO_DPLL_SHIFT 0#define OMAP24XX_AUTO_DPLL_MASK (0x3 << 0) -#define OMAP24XX_APLLS_CLKIN_SHIFT 23 -#define OMAP24XX_APLLS_CLKIN_WIDTH 3 -#define OMAP24XX_APLLS_CLKIN_MASK (0x7 << 23) -#define OMAP24XX_DPLL_MULT_MASK (0x3ff << 12) -#define OMAP24XX_DPLL_DIV_MASK (0xf << 8) -#define OMAP24XX_54M_SOURCE_SHIFT 5 -#define OMAP24XX_54M_SOURCE_WIDTH 1 -#define OMAP2430_96M_SOURCE_SHIFT 4 -#define OMAP2430_96M_SOURCE_WIDTH 1 -#define OMAP24XX_48M_SOURCE_MASK (1 << 3)#define OMAP24XX_CORE_CLK_SRC_MASK (0x3 << 0) -#define OMAP2420_EN_IVA_COP_SHIFT 10 -#define OMAP2420_EN_IVA_MPU_SHIFT 8 -#define OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT 0 -#define OMAP2420_EN_DSP_IPI_SHIFT 1 -#define OMAP2420_CLKSEL_IVA_MASK (0x1f << 8) -#define OMAP24XX_CLKSEL_DSP_IF_MASK (0x3 << 5) -#define OMAP24XX_CLKSEL_DSP_MASK (0x1f << 0)#define OMAP2420_AUTOSTATE_IVA_MASK (1 << 8)#define OMAP24XX_AUTOSTATE_DSP_MASK (1 << 0) -#define OMAP2430_EN_OSC_SHIFT 1 -#define OMAP2430_CM_ICLKEN_MDM_EN_MDM_SHIFT 0 -#define OMAP2430_CLKSEL_MDM_MASK (0xf << 0)#define OMAP2430_AUTOSTATE_MDM_MASK (1 << 0)#define OMAP24XX_CLKSTCTRL_DISABLE_AUTO 0x0#define OMAP24XX_CLKSTCTRL_ENABLE_AUTO 0x1
arch/arm/mach-omap2/cm-regbits-34xx.h +0 -162
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arch/arm/mach-omap2/omap_hwmod.h +0 -6
@@ -329,11 +329,8 @@ struct omap_hwmod_class_sysconfig {/** * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data * @module_offs: PRCM submodule offset from the start of the PRM/CM -* @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3) -* @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3) * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit -* @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit * * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST, * WKEN, GRPSEL registers. In an ideal world, no extra information
@@ -343,11 +340,8 @@ struct omap_hwmod_class_sysconfig {*/ struct omap_hwmod_omap2_prcm {s16 module_offs; -u8 prcm_reg_id; -u8 module_bit;u8 idlest_reg_id;u8 idlest_idle_bit; -u8 idlest_stdby_bit; };/*
arch/arm/mach-omap2/omap_hwmod_2420_data.c +0 -14
@@ -111,8 +111,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { .prcm = { .omap2 = { .module_offs = CORE_MOD, - .prcm_reg_id = 1, - .module_bit = OMAP2420_EN_I2C1_SHIFT, .idlest_reg_id = 1, .idlest_idle_bit = OMAP2420_ST_I2C1_SHIFT, },
@@ -134,8 +132,6 @@ static struct omap_hwmod omap2420_i2c2_hwmod = { .prcm = { .omap2 = { .module_offs = CORE_MOD, - .prcm_reg_id = 1, - .module_bit = OMAP2420_EN_I2C2_SHIFT, .idlest_reg_id = 1, .idlest_idle_bit = OMAP2420_ST_I2C2_SHIFT, },
@@ -167,8 +163,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = { .main_clk = "mailboxes_ick", .prcm = { .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP24XX_EN_MAILBOXES_SHIFT, .module_offs = CORE_MOD, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
@@ -197,8 +191,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP24XX_EN_MCBSP1_SHIFT, .module_offs = CORE_MOD, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
@@ -215,8 +207,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP24XX_EN_MCBSP2_SHIFT, .module_offs = CORE_MOD, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
@@ -247,8 +237,6 @@ static struct omap_hwmod omap2420_msdi1_hwmod = { .main_clk = "mmc_fck", .prcm = { .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP2420_EN_MMC_SHIFT, .module_offs = CORE_MOD, .idlest_reg_id = 1, .idlest_idle_bit = OMAP2420_ST_MMC_SHIFT,
@@ -264,8 +252,6 @@ static struct omap_hwmod omap2420_hdq1w_hwmod = { .prcm = { .omap2 = { .module_offs = CORE_MOD, - .prcm_reg_id = 1, - .module_bit = OMAP24XX_EN_HDQ_SHIFT, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_HDQ_SHIFT, },
arch/arm/mach-omap2/omap_hwmod_2430_data.c +0 -28
@@ -97,8 +97,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {* to hwmod framework. */ .module_offs = CORE_MOD, - .prcm_reg_id = 1, - .module_bit = OMAP2430_EN_I2CHS1_SHIFT, .idlest_reg_id = 1, .idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT, },
@@ -115,8 +113,6 @@ static struct omap_hwmod omap2430_i2c2_hwmod = { .prcm = { .omap2 = { .module_offs = CORE_MOD, - .prcm_reg_id = 1, - .module_bit = OMAP2430_EN_I2CHS2_SHIFT, .idlest_reg_id = 1, .idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT, },
@@ -132,8 +128,6 @@ static struct omap_hwmod omap2430_gpio5_hwmod = { .main_clk = "gpio5_fck", .prcm = { .omap2 = { - .prcm_reg_id = 2, - .module_bit = OMAP2430_EN_GPIO5_SHIFT, .module_offs = CORE_MOD, .idlest_reg_id = 2, .idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT,
@@ -165,8 +159,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = { .main_clk = "mailboxes_ick", .prcm = { .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP24XX_EN_MAILBOXES_SHIFT, .module_offs = CORE_MOD, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
@@ -185,8 +177,6 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = { .prcm = { .omap2 = { .module_offs = CORE_MOD, - .prcm_reg_id = 2, - .module_bit = OMAP2430_EN_MCSPI3_SHIFT, .idlest_reg_id = 2, .idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT, },
@@ -219,8 +209,6 @@ static struct omap_hwmod omap2430_usbhsotg_hwmod = { .main_clk = "usbhs_ick", .prcm = { .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP2430_EN_USBHS_MASK, .module_offs = CORE_MOD, .idlest_reg_id = 1, .idlest_idle_bit = OMAP2430_ST_USBHS_SHIFT,
@@ -266,8 +254,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP24XX_EN_MCBSP1_SHIFT, .module_offs = CORE_MOD, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
@@ -284,8 +270,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP24XX_EN_MCBSP2_SHIFT, .module_offs = CORE_MOD, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
@@ -302,8 +286,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { .main_clk = "mcbsp3_fck", .prcm = { .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP2430_EN_MCBSP3_SHIFT, .module_offs = CORE_MOD, .idlest_reg_id = 2, .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT,
@@ -320,8 +302,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = { .main_clk = "mcbsp4_fck", .prcm = { .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP2430_EN_MCBSP4_SHIFT, .module_offs = CORE_MOD, .idlest_reg_id = 2, .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT,
@@ -338,8 +318,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = { .main_clk = "mcbsp5_fck", .prcm = { .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP2430_EN_MCBSP5_SHIFT, .module_offs = CORE_MOD, .idlest_reg_id = 2, .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT,
@@ -384,8 +362,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { .prcm = { .omap2 = { .module_offs = CORE_MOD, - .prcm_reg_id = 2, - .module_bit = OMAP2430_EN_MMCHS1_SHIFT, .idlest_reg_id = 2, .idlest_idle_bit = OMAP2430_ST_MMCHS1_SHIFT, },
@@ -408,8 +384,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = { .prcm = { .omap2 = { .module_offs = CORE_MOD, - .prcm_reg_id = 2, - .module_bit = OMAP2430_EN_MMCHS2_SHIFT, .idlest_reg_id = 2, .idlest_idle_bit = OMAP2430_ST_MMCHS2_SHIFT, },
@@ -424,8 +398,6 @@ static struct omap_hwmod omap2430_hdq1w_hwmod = { .prcm = { .omap2 = { .module_offs = CORE_MOD, - .prcm_reg_id = 1, - .module_bit = OMAP24XX_EN_HDQ_SHIFT, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_HDQ_SHIFT, },
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +0 -64
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arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +0 -131
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Signature · 1 line
2.15.0