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ARM: dts: exynos: Use lower case hex addresses in node names

PATCH New Krzysztof Kozlowski 1 participant 1 message Dec 14, 2017

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Krzysztof Kozlowski

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#0 lore raw

PATCH 1/1 ARM: dts: exynos: Use lower case hex addresses in node names

Convert all hex addresses in node names to lower case to fix warnings
like:
arch/arm/boot/dts/exynos5422-odroidhc1.dtb: Warning (simple_bus_reg):
Node /soc/nocp at 10CA1000 simple-bus unit address format error, expected "10ca1000"

Conversion was done using sed:

    $ sed -e 's/@\(.*\) {/@\L\1 {/' -i arch/arm/boot/dts/exynos*.dts*
---
 arch/arm/boot/dts/exynos3250.dtsi         | 34 ++++++++--------
 arch/arm/boot/dts/exynos4.dtsi            | 56 +++++++++++++-------------
 arch/arm/boot/dts/exynos4210.dtsi         |  8 ++--
 arch/arm/boot/dts/exynos4412-pinctrl.dtsi |  2 +-
 arch/arm/boot/dts/exynos4412.dtsi         | 22 +++++------
 arch/arm/boot/dts/exynos5.dtsi            | 22 +++++------
 arch/arm/boot/dts/exynos5250.dtsi         | 66 +++++++++++++++----------------
 arch/arm/boot/dts/exynos5260.dtsi         | 26 ++++++------
 arch/arm/boot/dts/exynos5420.dtsi         | 44 ++++++++++-----------
 arch/arm/boot/dts/exynos5440.dtsi         | 14 +++----
 10 files changed, 147 insertions(+), 147 deletions(-)
arch/arm/boot/dts/exynos3250.dtsi +17 -17
index 2bd3872221a1..8d47571b3984 100644
@@ -164,31 +164,31 @@
 			syscon = <&pmu_system_controller>;
 		};
 
-		pd_cam: cam-power-domain at 10023C00 {
+		pd_cam: cam-power-domain at 10023c00 {
 			compatible = "samsung,exynos4210-pd";
 			reg = <0x10023C00 0x20>;
 			#power-domain-cells = <0>;
 		};
 
-		pd_mfc: mfc-power-domain at 10023C40 {
+		pd_mfc: mfc-power-domain at 10023c40 {
 			compatible = "samsung,exynos4210-pd";
 			reg = <0x10023C40 0x20>;
 			#power-domain-cells = <0>;
 		};
 
-		pd_g3d: g3d-power-domain at 10023C60 {
+		pd_g3d: g3d-power-domain at 10023c60 {
 			compatible = "samsung,exynos4210-pd";
 			reg = <0x10023C60 0x20>;
 			#power-domain-cells = <0>;
 		};
 
-		pd_lcd0: lcd0-power-domain at 10023C80 {
+		pd_lcd0: lcd0-power-domain at 10023c80 {
 			compatible = "samsung,exynos4210-pd";
 			reg = <0x10023C80 0x20>;
 			#power-domain-cells = <0>;
 		};
 
-		pd_isp: isp-power-domain at 10023CA0 {
+		pd_isp: isp-power-domain at 10023ca0 {
 			compatible = "samsung,exynos4210-pd";
 			reg = <0x10023CA0 0x20>;
 			#power-domain-cells = <0>;
@@ -204,7 +204,7 @@
 						 <&cmu CLK_FIN_PLL>;
 		};
 
-		cmu_dmc: clock-controller at 105C0000 {
+		cmu_dmc: clock-controller at 105c0000 {
 			compatible = "samsung,exynos3250-cmu-dmc";
 			reg = <0x105C0000 0x2000>;
 			#clock-cells = <1>;
@@ -219,7 +219,7 @@
 			status = "disabled";
 		};
 
-		tmu: tmu at 100C0000 {
+		tmu: tmu at 100c0000 {
 			compatible = "samsung,exynos3250-tmu";
 			reg = <0x100C0000 0x100>;
 			interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
@@ -287,7 +287,7 @@
 			status = "disabled";
 		};
 
-		sysmmu_jpeg: sysmmu at 11A60000 {
+		sysmmu_jpeg: sysmmu at 11a60000 {
 			compatible = "samsung,exynos-sysmmu";
 			reg = <0x11a60000 0x1000>;
 			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
@@ -313,7 +313,7 @@
 			status = "disabled";
 		};
 
-		dsi_0: dsi at 11C80000 {
+		dsi_0: dsi at 11c80000 {
 			compatible = "samsung,exynos3250-mipi-dsi";
 			reg = <0x11C80000 0x10000>;
 			interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
@@ -328,7 +328,7 @@
 			status = "disabled";
 		};
 
-		sysmmu_fimd0: sysmmu at 11E20000 {
+		sysmmu_fimd0: sysmmu at 11e20000 {
 			compatible = "samsung,exynos-sysmmu";
 			reg = <0x11e20000 0x1000>;
 			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
@@ -386,7 +386,7 @@
 			status = "disabled";
 		};
 
-		exynos_usbphy: exynos-usbphy at 125B0000 {
+		exynos_usbphy: exynos-usbphy at 125b0000 {
 			compatible = "samsung,exynos3250-usb2-phy";
 			reg = <0x125B0000 0x100>;
 			samsung,pmureg-phandle = <&pmu_system_controller>;
@@ -425,7 +425,7 @@
 			};
 		};
 
-		adc: adc at 126C0000 {
+		adc: adc at 126c0000 {
 			compatible = "samsung,exynos3250-adc",
 				     "samsung,exynos-adc-v2";
 			reg = <0x126C0000 0x100>;
@@ -544,7 +544,7 @@
 			status = "disabled";
 		};
 
-		i2c_4: i2c at 138A0000 {
+		i2c_4: i2c at 138a0000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 			compatible = "samsung,s3c2440-i2c";
@@ -557,7 +557,7 @@
 			status = "disabled";
 		};
 
-		i2c_5: i2c at 138B0000 {
+		i2c_5: i2c at 138b0000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 			compatible = "samsung,s3c2440-i2c";
@@ -570,7 +570,7 @@
 			status = "disabled";
 		};
 
-		i2c_6: i2c at 138C0000 {
+		i2c_6: i2c at 138c0000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 			compatible = "samsung,s3c2440-i2c";
@@ -583,7 +583,7 @@
 			status = "disabled";
 		};
 
-		i2c_7: i2c at 138D0000 {
+		i2c_7: i2c at 138d0000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 			compatible = "samsung,s3c2440-i2c";
@@ -641,7 +641,7 @@
 			status = "disabled";
 		};
 
-		pwm: pwm at 139D0000 {
+		pwm: pwm at 139d0000 {
 			compatible = "samsung,exynos4210-pwm";
 			reg = <0x139D0000 0x1000>;
 			interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
arch/arm/boot/dts/exynos4.dtsi +28 -28

224 lines not on this page · raw message

arch/arm/boot/dts/exynos4210.dtsi +4 -4
index 03dd61f64809..ce161ad1215d 100644
@@ -82,7 +82,7 @@
 		};
 	};
 
-	pd_lcd1: lcd1-power-domain at 10023CA0 {
+	pd_lcd1: lcd1-power-domain at 10023ca0 {
 		compatible = "samsung,exynos4210-pd";
 		reg = <0x10023CA0 0x20>;
 		#power-domain-cells = <0>;
@@ -156,7 +156,7 @@
 		reg = <0x03860000 0x1000>;
 	};
 
-	tmu: tmu at 100C0000 {
+	tmu: tmu at 100c0000 {
 		compatible = "samsung,exynos4210-tmu";
 		interrupt-parent = <&combiner>;
 		reg = <0x100C0000 0x100>;
@@ -229,7 +229,7 @@
 		};
 	};
 
-	mixer: mixer at 12C10000 {
+	mixer: mixer at 12c10000 {
 		clock-names = "mixer", "hdmi", "sclk_hdmi", "vp", "mout_mixer",
 			"sclk_mixer";
 		clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
@@ -245,7 +245,7 @@
 		status = "disabled";
 	};
 
-	sysmmu_g2d: sysmmu at 12A20000 {
+	sysmmu_g2d: sysmmu at 12a20000 {
 		compatible = "samsung,exynos-sysmmu";
 		reg = <0x12A20000 0x1000>;
 		interrupt-parent = <&combiner>;
arch/arm/boot/dts/exynos4412-pinctrl.dtsi +1 -1
index 4eebd4721a5f..ef7b89d3db9e 100644
@@ -925,7 +925,7 @@
 		};
 	};
 
-	pinctrl_3: pinctrl at 106E0000 {
+	pinctrl_3: pinctrl at 106e0000 {
 		gpv0: gpv0 {
 			gpio-controller;
 			#gpio-cells = <2>;
arch/arm/boot/dts/exynos4412.dtsi +11 -11
index 282525ac7554..cec5bef44bdb 100644
@@ -38,7 +38,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu0: cpu at A00 {
+		cpu0: cpu at a00 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <0xA00>;
@@ -50,21 +50,21 @@
 			#cooling-cells = <2>; /* min followed by max */
 		};
 
-		cpu at A01 {
+		cpu at a01 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <0xA01>;
 			operating-points-v2 = <&cpu0_opp_table>;
 		};
 
-		cpu at A02 {
+		cpu at a02 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <0xA02>;
 			operating-points-v2 = <&cpu0_opp_table>;
 		};
 
-		cpu at A03 {
+		cpu at a03 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <0xA03>;
@@ -168,7 +168,7 @@
 		};
 	};
 
-	pd_isp: isp-power-domain at 10023CA0 {
+	pd_isp: isp-power-domain at 10023ca0 {
 		compatible = "samsung,exynos4210-pd";
 		reg = <0x10023CA0 0x20>;
 		#power-domain-cells = <0>;
@@ -233,7 +233,7 @@
 		samsung,syscon-phandle = <&pmu_system_controller>;
 	};
 
-	adc: adc at 126C0000 {
+	adc: adc at 126c0000 {
 		compatible = "samsung,exynos-adc-v1";
 		reg = <0x126C0000 0x100>;
 		interrupt-parent = <&combiner>;
@@ -272,7 +272,7 @@
 			status = "disabled";
 		};
 
-		fimc_lite_1: fimc-lite at 123A0000 {
+		fimc_lite_1: fimc-lite at 123a0000 {
 			compatible = "samsung,exynos4212-fimc-lite";
 			reg = <0x123A0000 0x1000>;
 			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
@@ -385,7 +385,7 @@
 		#iommu-cells = <0>;
 	};
 
-	sysmmu_fimc_fd: sysmmu at 122A0000 {
+	sysmmu_fimc_fd: sysmmu at 122a0000 {
 		compatible = "samsung,exynos-sysmmu";
 		reg = <0x122A0000 0x1000>;
 		interrupt-parent = <&combiner>;
@@ -396,7 +396,7 @@
 		#iommu-cells = <0>;
 	};
 
-	sysmmu_fimc_mcuctl: sysmmu at 122B0000 {
+	sysmmu_fimc_mcuctl: sysmmu at 122b0000 {
 		compatible = "samsung,exynos-sysmmu";
 		reg = <0x122B0000 0x1000>;
 		interrupt-parent = <&combiner>;
@@ -407,7 +407,7 @@
 		#iommu-cells = <0>;
 	};
 
-	sysmmu_fimc_lite0: sysmmu at 123B0000 {
+	sysmmu_fimc_lite0: sysmmu at 123b0000 {
 		compatible = "samsung,exynos-sysmmu";
 		reg = <0x123B0000 0x1000>;
 		interrupt-parent = <&combiner>;
@@ -419,7 +419,7 @@
 		#iommu-cells = <0>;
 	};
 
-	sysmmu_fimc_lite1: sysmmu at 123C0000 {
+	sysmmu_fimc_lite1: sysmmu at 123c0000 {
 		compatible = "samsung,exynos-sysmmu";
 		reg = <0x123C0000 0x1000>;
 		interrupt-parent = <&combiner>;
arch/arm/boot/dts/exynos5.dtsi +11 -11
index b3c8428de389..1b1dd3850638 100644
@@ -106,31 +106,31 @@
 			reg = <0x10050000 0x5000>;
 		};
 
-		serial_0: serial at 12C00000 {
+		serial_0: serial at 12c00000 {
 			compatible = "samsung,exynos4210-uart";
 			reg = <0x12C00000 0x100>;
 			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
-		serial_1: serial at 12C10000 {
+		serial_1: serial at 12c10000 {
 			compatible = "samsung,exynos4210-uart";
 			reg = <0x12C10000 0x100>;
 			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
-		serial_2: serial at 12C20000 {
+		serial_2: serial at 12c20000 {
 			compatible = "samsung,exynos4210-uart";
 			reg = <0x12C20000 0x100>;
 			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
-		serial_3: serial at 12C30000 {
+		serial_3: serial at 12c30000 {
 			compatible = "samsung,exynos4210-uart";
 			reg = <0x12C30000 0x100>;
 			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
-		i2c_0: i2c at 12C60000 {
+		i2c_0: i2c at 12c60000 {
 			compatible = "samsung,s3c2440-i2c";
 			reg = <0x12C60000 0x100>;
 			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
@@ -140,7 +140,7 @@
 			status = "disabled";
 		};
 
-		i2c_1: i2c at 12C70000 {
+		i2c_1: i2c at 12c70000 {
 			compatible = "samsung,s3c2440-i2c";
 			reg = <0x12C70000 0x100>;
 			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
@@ -150,7 +150,7 @@
 			status = "disabled";
 		};
 
-		i2c_2: i2c at 12C80000 {
+		i2c_2: i2c at 12c80000 {
 			compatible = "samsung,s3c2440-i2c";
 			reg = <0x12C80000 0x100>;
 			interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
@@ -160,7 +160,7 @@
 			status = "disabled";
 		};
 
-		i2c_3: i2c at 12C90000 {
+		i2c_3: i2c at 12c90000 {
 			compatible = "samsung,s3c2440-i2c";
 			reg = <0x12C90000 0x100>;
 			interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
@@ -170,14 +170,14 @@
 			status = "disabled";
 		};
 
-		pwm: pwm at 12DD0000 {
+		pwm: pwm at 12dd0000 {
 			compatible = "samsung,exynos4210-pwm";
 			reg = <0x12DD0000 0x100>;
 			samsung,pwm-outputs = <0>, <1>, <2>, <3>;
 			#pwm-cells = <3>;
 		};
 
-		rtc: rtc at 101E0000 {
+		rtc: rtc at 101e0000 {
 			compatible = "samsung,s3c6410-rtc";
 			reg = <0x101E0000 0x100>;
 			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
@@ -195,7 +195,7 @@
 			status = "disabled";
 		};
 
-		dp: dp-controller at 145B0000 {
+		dp: dp-controller at 145b0000 {
 			compatible = "samsung,exynos5-dp";
 			reg = <0x145B0000 0x1000>;
 			interrupts = <10 3>;
arch/arm/boot/dts/exynos5250.dtsi +33 -33

264 lines not on this page · raw message

arch/arm/boot/dts/exynos5260.dtsi +13 -13
index 5e88c9645975..12c6b011576b 100644
@@ -106,13 +106,13 @@
 			#clock-cells = <1>;
 		};
 
-		clock_g2d: clock-controller at 10A00000 {
+		clock_g2d: clock-controller at 10a00000 {
 			compatible = "samsung,exynos5260-clock-g2d";
 			reg = <0x10A00000 0x10000>;
 			#clock-cells = <1>;
 		};
 
-		clock_mif: clock-controller at 10CE0000 {
+		clock_mif: clock-controller at 10ce0000 {
 			compatible = "samsung,exynos5260-clock-mif";
 			reg = <0x10CE0000 0x10000>;
 			#clock-cells = <1>;
@@ -130,25 +130,25 @@
 			#clock-cells = <1>;
 		};
 
-		clock_fsys: clock-controller at 122E0000 {
+		clock_fsys: clock-controller at 122e0000 {
 			compatible = "samsung,exynos5260-clock-fsys";
 			reg = <0x122E0000 0x10000>;
 			#clock-cells = <1>;
 		};
 
-		clock_aud: clock-controller at 128C0000 {
+		clock_aud: clock-controller at 128c0000 {
 			compatible = "samsung,exynos5260-clock-aud";
 			reg = <0x128C0000 0x10000>;
 			#clock-cells = <1>;
 		};
 
-		clock_isp: clock-controller at 133C0000 {
+		clock_isp: clock-controller at 133c0000 {
 			compatible = "samsung,exynos5260-clock-isp";
 			reg = <0x133C0000 0x10000>;
 			#clock-cells = <1>;
 		};
 
-		clock_gscl: clock-controller at 13F00000 {
+		clock_gscl: clock-controller at 13f00000 {
 			compatible = "samsung,exynos5260-clock-gscl";
 			reg = <0x13F00000 0x10000>;
 			#clock-cells = <1>;
@@ -179,7 +179,7 @@
 			reg = <0x10000000 0x100>;
 		};
 
-		mct: mct at 100B0000 {
+		mct: mct at 100b0000 {
 			compatible = "samsung,exynos4210-mct";
 			reg = <0x100B0000 0x1000>;
 			clocks = <&fin_pll>, <&clock_peri PERI_CLK_MCT>;
@@ -198,7 +198,7 @@
 				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
-		cci: cci at 10F00000 {
+		cci: cci at 10f00000 {
 			compatible = "arm,cci-400";
 			#address-cells = <1>;
 			#size-cells = <1>;
@@ -236,18 +236,18 @@
 			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
-		pinctrl_2: pinctrl at 128B0000 {
+		pinctrl_2: pinctrl at 128b0000 {
 			compatible = "samsung,exynos5260-pinctrl";
 			reg = <0x128B0000 0x1000>;
 			interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
-		pmu_system_controller: system-controller at 10D50000 {
+		pmu_system_controller: system-controller at 10d50000 {
 			compatible = "samsung,exynos5260-pmu", "syscon";
 			reg = <0x10D50000 0x10000>;
 		};
 
-		uart0: serial at 12C00000 {
+		uart0: serial at 12c00000 {
 			compatible = "samsung,exynos4210-uart";
 			reg = <0x12C00000 0x100>;
 			interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
@@ -256,7 +256,7 @@
 			status = "disabled";
 		};
 
-		uart1: serial at 12C10000 {
+		uart1: serial at 12c10000 {
 			compatible = "samsung,exynos4210-uart";
 			reg = <0x12C10000 0x100>;
 			interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
@@ -265,7 +265,7 @@
 			status = "disabled";
 		};
 
-		uart2: serial at 12C20000 {
+		uart2: serial at 12c20000 {
 			compatible = "samsung,exynos4210-uart";
 			reg = <0x12C20000 0x100>;
 			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
arch/arm/boot/dts/exynos5420.dtsi +22 -22

168 lines not on this page · raw message

arch/arm/boot/dts/exynos5440.dtsi +7 -7
index 9c3c75ae5e48..3acf3f2d643e 100644
@@ -35,7 +35,7 @@
 		#clock-cells = <1>;
 	};
 
-	gic: interrupt-controller at 2E0000 {
+	gic: interrupt-controller at 2e0000 {
 		compatible = "arm,cortex-a15-gic";
 		#interrupt-cells = <3>;
 		interrupt-controller;
@@ -108,7 +108,7 @@
 		>;
 	};
 
-	serial_0: serial at B0000 {
+	serial_0: serial at b0000 {
 		compatible = "samsung,exynos4210-uart";
 		reg = <0xB0000 0x1000>;
 		interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
@@ -116,7 +116,7 @@
 		clock-names = "uart", "clk_uart_baud0";
 	};
 
-	serial_1: serial at C0000 {
+	serial_1: serial at c0000 {
 		compatible = "samsung,exynos4210-uart";
 		reg = <0xC0000 0x1000>;
 		interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
@@ -124,7 +124,7 @@
 		clock-names = "uart", "clk_uart_baud0";
 	};
 
-	spi_0: spi at D0000 {
+	spi_0: spi at d0000 {
 		compatible = "samsung,exynos5440-spi";
 		reg = <0xD0000 0x100>;
 		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
@@ -136,7 +136,7 @@
 		clock-names = "spi", "spi_busclk0";
 	};
 
-	pin_ctrl: pinctrl at E0000 {
+	pin_ctrl: pinctrl at e0000 {
 		compatible = "samsung,exynos5440-pinctrl";
 		reg = <0xE0000 0x1000>;
 		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
@@ -168,7 +168,7 @@
 		};
 	};
 
-	i2c at F0000 {
+	i2c at f0000 {
 		compatible = "samsung,exynos5440-i2c";
 		reg = <0xF0000 0x1000>;
 		interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
@@ -233,7 +233,7 @@
 		#include "exynos5440-tmu-sensor-conf.dtsi"
 	};
 
-	tmuctrl_1: tmuctrl at 16011C {
+	tmuctrl_1: tmuctrl at 16011c {
 		compatible = "samsung,exynos5440-tmu";
 		reg = <0x16011C 0x230>, <0x160368 0x10>;
 		interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
Signature · 1 line
2.11.0