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dt-bindings: ifc: Update endianness usage

PATCH Superseded Prabhakar Kushwaha 3 participants 10 messages Nov 30, 2017 – Dec 21, 2017

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v2 of 3 Superseded Latest is v3 →

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#0 lore raw

PATCH v2 1/1 dt-bindings: ifc: Update endianness usage

IFC controller version < 2.0 support IFC register access as big endian. These controller version also require IFC NOR signals to be connected in reverse order with NOR flash.

IFC >= 2.0 is other way around.

So updating IFC binding to take care of both using endianness field.

---
Changes for v2: updated subject

 Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt +4 -2
index 89427b0..824a2ca 100644
@@ -18,8 +18,10 @@ Properties:
               interrupt (NAND_EVTER_STAT).  If there is only one,
               that interrupt reports both types of event.
 
-- little-endian : If this property is absent, the big-endian mode will
-                  be in use as default for registers.
+- little-endian or big-endin : It represents how IFC registers  to be accessed.
+			It also represents connection between controller and
+			NOR flash. If this property is absent, the big-endian
+			mode will be in use as default.
 
 - ranges : Each range corresponds to a single chipselect, and covers
            the entire access window as configured.
Signature · 1 line
1.9.1
#1 lore raw

PATCH v2 1/2 ARM: dts: Add big-endian for IFC on LS1021A

From: Jagdish Gediya <[email protected]>

For the patch to update struct map_info's swap field based on device characteristics defined in device tree, big-endian parameter is added for LS1021A.

---
Changes for v2: updated subject

 arch/arm/boot/dts/ls1021a.dtsi | 1 +
 1 file changed, 1 insertion(+)
arch/arm/boot/dts/ls1021a.dtsi +1 -0
index 9319e1f..babb086 100644
@@ -145,6 +145,7 @@
 		ifc: ifc at 1530000 {
 			compatible = "fsl,ifc", "simple-bus";
 			reg = <0x0 0x1530000 0x0 0x10000>;
+			big-endian;
 			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
Signature · 1 line
1.9.1
#2 lore raw

PATCH v2 1/2 ARM: dts: Add big-endian for IFC on LS1021A

Hi Shawn,

Quoted 38 lines

-----Original Message-----
From: Prabhakar Kushwaha [mailto:prabhakar.kushwaha at nxp.com]
Sent: Thursday, November 30, 2017 9:12 AM
To: devicetree at vger.kernel.org; robh at kernel.org; mark.rutland at arm.com; shawnguo at kernel.org
Cc: linux-arm-kernel at lists.infradead.org; Jagdish Gediya <[email protected]>; Alison Wang <[email protected]>; Prabhakar Kushwaha <[email protected]>
Subject: [PATCH 1/2][v2] ARM: dts: Add big-endian for IFC on LS1021A

From: Jagdish Gediya <[email protected]>

For the patch to update struct map_info's swap field based on device characteristics defined in device tree, big-endian parameter is added for LS1021A.

---
Changes for v2: updated subject

 arch/arm/boot/dts/ls1021a.dtsi | 1 +
 1 file changed, 1 insertion(+)
arch/arm/boot/dts/ls1021a.dtsi +1 -1
index 9319e1f..babb086 100644
@@ -145,6 +145,7 @@
 		ifc: ifc at 1530000 {
 			compatible = "fsl,ifc", "simple-bus";
 			reg = <0x0 0x1530000 0x0 0x10000>;
+			big-endian;
 			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
--
Quoted 1 line

1.9.1

There are no review comments on this patch.

Can you please accept this patch

--pk

#3 lore raw

PATCH v2 1/2 ARM: dts: Add big-endian for IFC on LS1021A

Quoted 39 lines · Prabhakar Kushwaha

Hi Shawn,

Quoted 37 lines

-----Original Message-----
From: Prabhakar Kushwaha [mailto:prabhakar.kushwaha at nxp.com]
Sent: Thursday, November 30, 2017 9:12 AM
To: devicetree at vger.kernel.org; robh at kernel.org; mark.rutland at arm.com; shawnguo at kernel.org
Cc: linux-arm-kernel at lists.infradead.org; Jagdish Gediya <[email protected]>; Alison Wang <[email protected]>; Prabhakar Kushwaha <[email protected]>
Subject: [PATCH 1/2][v2] ARM: dts: Add big-endian for IFC on LS1021A

From: Jagdish Gediya <[email protected]>

For the patch to update struct map_info's swap field based on device characteristics defined in device tree, big-endian parameter is added for LS1021A.

---
Changes for v2: updated subject

 arch/arm/boot/dts/ls1021a.dtsi | 1 +
 1 file changed, 1 insertion(+)
arch/arm/boot/dts/ls1021a.dtsi +1 -0
index 9319e1f..babb086 100644
@@ -145,6 +145,7 @@
 		ifc: ifc at 1530000 {
 			compatible = "fsl,ifc", "simple-bus";
 			reg = <0x0 0x1530000 0x0 0x10000>;
+			big-endian;
 			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
Quoted 6 lines
Quoted 2 lines

--
1.9.1

There are no review comments on this patch.

Can you please accept this patch

It seems that the bindings hasn't been ACK-ed by DT maintainer.

Shawn

#4 lore raw

PATCH v2 1/2 ARM: dts: Add big-endian for IFC on LS1021A

Hi Shawn,

Quoted 50 lines

-----Original Message-----
From: Shawn Guo [mailto:shawnguo at kernel.org]
Sent: Thursday, December 21, 2017 12:41 PM
To: Prabhakar Kushwaha <[email protected]>
Cc: devicetree at vger.kernel.org; robh at kernel.org; mark.rutland at arm.com; Alison Wang <[email protected]>; Jagdish Gediya <[email protected]>; linux-arm-kernel at lists.infradead.org
Subject: Re: [PATCH 1/2][v2] ARM: dts: Add big-endian for IFC on LS1021A

Quoted 9 lines · Prabhakar Kushwaha

Hi Shawn,

Quoted 7 lines

-----Original Message-----
From: Prabhakar Kushwaha [mailto:prabhakar.kushwaha at nxp.com]
Sent: Thursday, November 30, 2017 9:12 AM
To: devicetree at vger.kernel.org; robh at kernel.org; mark.rutland at arm.com; shawnguo at kernel.org
Cc: linux-arm-kernel at lists.infradead.org; Jagdish Gediya <[email protected]>; Alison Wang <[email protected]>;

Prabhakar

Quoted 30 lines
Quoted 30 lines

Kushwaha <[email protected]>
Subject: [PATCH 1/2][v2] ARM: dts: Add big-endian for IFC on LS1021A

From: Jagdish Gediya <[email protected]>

For the patch to update struct map_info's swap field based on device characteristics defined in device tree, big-endian parameter is added for LS1021A.

---
Changes for v2: updated subject

 arch/arm/boot/dts/ls1021a.dtsi | 1 +
 1 file changed, 1 insertion(+)
arch/arm/boot/dts/ls1021a.dtsi +1 -0
index 9319e1f..babb086 100644
@@ -145,6 +145,7 @@
 		ifc: ifc at 1530000 {
 			compatible = "fsl,ifc", "simple-bus";
 			reg = <0x0 0x1530000 0x0 0x10000>;
+			big-endian;
 			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
Quoted 9 lines
Quoted 6 lines
Quoted 2 lines

--
1.9.1

There are no review comments on this patch.

Can you please accept this patch

It seems that the bindings hasn't been ACK-ed by DT maintainer.

Are you referring to this discussion https://patchwork.ozlabs.org/patch/842543/?
Due to which binding are not ACK-ed.

--pk

#6 lore raw

PATCH v2 2/2 ARM: dts: ls1021aqds: Add nand node for ifc controller

In reply to Prabhakar Kushwaha

LS1021AQDS support NAND flash on IFC chip-select 2.

So add NAND node in device tree for IFC controller.

---
Changes for v2: updated subject

 arch/arm/boot/dts/ls1021a-qds.dts | 5 +++++
 1 file changed, 5 insertions(+)
arch/arm/boot/dts/ls1021a-qds.dts +5 -0
index 9408753..2b37d04 100644
@@ -239,6 +239,11 @@
 		device-width = <1>;
 	};
 
+	nand at 2,0 {
+		compatible = "fsl,ifc-nand";
+		reg = <0x2 0x0 0x10000>;
+	};
+
 	fpga: board-control at 3,0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
Signature · 1 line
1.9.1
#7 lore raw

PATCH v2 2/2 ARM: dts: ls1021aqds: Add nand node for ifc controller

Hi Shawn,

Quoted 29 lines

-----Original Message-----
From: Prabhakar Kushwaha [mailto:prabhakar.kushwaha at nxp.com]
Sent: Thursday, November 30, 2017 9:12 AM
To: devicetree at vger.kernel.org; robh at kernel.org; mark.rutland at arm.com; shawnguo at kernel.org
Cc: linux-arm-kernel at lists.infradead.org; Prabhakar Kushwaha <[email protected]>; Jagdish Gediya <[email protected]>
Subject: [PATCH 2/2][v2] ARM: dts: ls1021aqds: Add nand node for ifc controller

LS1021AQDS support NAND flash on IFC chip-select 2.

So add NAND node in device tree for IFC controller.

---
Changes for v2: updated subject

 arch/arm/boot/dts/ls1021a-qds.dts | 5 +++++
 1 file changed, 5 insertions(+)
arch/arm/boot/dts/ls1021a- renamed from arch/arm/boot/dts/ls1021a-qds.dts +0 -0

qds.dts
index 9408753..2b37d04 100644

arch/arm/boot/dts/ls1021a-qds.dts +0 -0
@@ -239,6 +239,11 @@
 		device-width = <1>;
 	};

arch/arm/boot/dts/ls1021a-qds.dts

Quoted 10 lines
arch/arm/boot/dts/ls1021a-qds.dts +5 -1
 
+	nand at 2,0 {
+		compatible = "fsl,ifc-nand";
+		reg = <0x2 0x0 0x10000>;
+	};
+
 	fpga: board-control at 3,0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
--

There are no review comments on this patch.

Can you please accept this patch

--pk

#9 lore raw

PATCH v2 1/1 dt-bindings: ifc: Update endianness usage

In reply to Prabhakar Kushwaha
Quoted 20 lines · Prabhakar Kushwaha

IFC controller version < 2.0 support IFC register access as big endian. These controller version also require IFC NOR signals to be connected in reverse order with NOR flash.

IFC >= 2.0 is other way around.

So updating IFC binding to take care of both using endianness field.

---
Changes for v2: updated subject

 Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt +0 -0
index 89427b0..824a2ca 100644

Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt Properties: · line 21

Quoted 6 lines
Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt +1 -2
@@ -18,8 +18,10 @@ Properties:
               interrupt (NAND_EVTER_STAT).  If there is only one,
               that interrupt reports both types of event.
 
-- little-endian : If this property is absent, the big-endian mode will
-                  be in use as default for registers.
+- little-endian or big-endin : It represents how IFC registers  to be accessed.
			^==== big-endian (there is a typo)
Signature · 1 line
Florian