ata: ahci_brcm: Avoid clobbering SATA_TOP_CTRL_BUS_CTRL

PATCH Applied Florian Fainelli 2 participants 2 messages Dec 22, 2017 – Jan 2, 2018 libata

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Florian Fainelli

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2017-12-22 19:43 UTC #0 lore raw

PATCH 1/1 ata: ahci_brcm: Avoid clobbering SATA_TOP_CTRL_BUS_CTRL

We are doing a blind write to SATA_TOP_CTRL_BUS_CTRL to set the system endian, but in doing so, we are also overwriting other bits, such as the SATA_SCB_BURST_SIZE and SATA_FIFO_SIZE bits, which impact performance. Do a read/modify/write so we keep the default values.

While we are at it, we also greatly simplify the logic and just leave the NSP specific bit settings, instead of having a completely different sequence.

Signed-off-by Florian Fainelli <[email protected]>

---
Tejun, this is against your "for-next" branch, thank you!

 drivers/ata/ahci_brcm.c | 25 +++++++++++++++----------
 1 file changed, 15 insertions(+), 10 deletions(-)

drivers/ata/ahci_brcm.c +15 ~~-10~~

index 5936d1679bf3..ad3b8826ec79 100644
@@ -70,6 +70,13 @@
 	(DATA_ENDIAN << DMADESC_ENDIAN_SHIFT) |		\
 	(MMIO_ENDIAN << MMIO_ENDIAN_SHIFT))
 
+#define BUS_CTRL_ENDIAN_NSP_CONF			\
+	(0x02 << DMADATA_ENDIAN_SHIFT | 0x02 << DMADESC_ENDIAN_SHIFT)
+
+#define BUS_CTRL_ENDIAN_CONF_MASK			\
+	(0x3 << MMIO_ENDIAN_SHIFT | 0x3 << DMADESC_ENDIAN_SHIFT |	\
+	 0x3 << DMADATA_ENDIAN_SHIFT | 0x3 << PIODATA_ENDIAN_SHIFT)
+
 enum brcm_ahci_version {
 	BRCM_SATA_BCM7425 = 1,
 	BRCM_SATA_BCM7445,

@@ -250,18 +257,16 @@ static u32 brcm_ahci_get_portmask(struct platform_device *pdev,
 static void brcm_sata_init(struct brcm_ahci_priv *priv)
 {
 	void __iomem *ctrl = priv->top_ctrl + SATA_TOP_CTRL_BUS_CTRL;
+	u32 data;
 
 	/* Configure endianness */
-	if (priv->version ==  BRCM_SATA_NSP) {
-		u32 data = brcm_sata_readreg(ctrl);
-
-		data &= ~((0x03 << DMADATA_ENDIAN_SHIFT) |
-			(0x03 << DMADESC_ENDIAN_SHIFT));
-		data |= (0x02 << DMADATA_ENDIAN_SHIFT) |
-			(0x02 << DMADESC_ENDIAN_SHIFT);
-		brcm_sata_writereg(data, ctrl);
-	} else
-		brcm_sata_writereg(BUS_CTRL_ENDIAN_CONF, ctrl);
+	data = brcm_sata_readreg(ctrl);
+	data &= ~BUS_CTRL_ENDIAN_CONF_MASK;
+	if (priv->version == BRCM_SATA_NSP)
+		data |= BUS_CTRL_ENDIAN_NSP_CONF;
+	else
+		data |= BUS_CTRL_ENDIAN_CONF;
+	brcm_sata_writereg(data, ctrl);
 }
 
 #ifdef CONFIG_PM_SLEEP

Signature · 1 line

2.15.0

Tejun Heo

Applied

2018-01-02 16:38 UTC #1 lore raw

Quoted 10 lines · Florian Fainelli

We are doing a blind write to SATA_TOP_CTRL_BUS_CTRL to set the system endian, but in doing so, we are also overwriting other bits, such as the SATA_SCB_BURST_SIZE and SATA_FIFO_SIZE bits, which impact performance. Do a read/modify/write so we keep the default values.
While we are at it, we also greatly simplify the logic and just leave the NSP specific bit settings, instead of having a completely different sequence.
Signed-off-by Florian Fainelli <[email protected]>

Applied to libata/for-4.16.

Thanks.

Signature · 1 line

tejun