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SolutionEngine771x: add Ether TSU resource

PATCH Applied Sergei Shtylyov 1 participant 1 message Jan 6, 2018

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PATCH 2/2 SolutionEngine771x: add Ether TSU resource

After the Ether platform data is fixed, the driver probe() method would still fail since the 'struct sh_eth_cpu_data' corresponding to SH771x indicates the presence of TSU but the memory resource for it is absent. Add the missing TSU resource to both Ether devices and fix the harmless off-by-one error in the main memory resources, while at it...

Fixes 4986b996882d ("net: sh_eth: remove the SH_TSU_ADDR")

---
Changes in version 2:
- corrected the TSU resource size.

 arch/sh/boards/mach-se/770x/setup.c |   14 ++++++++++++--
 arch/sh/include/mach-se/mach/se.h   |    1 +
 2 files changed, 13 insertions(+), 2 deletions(-)

Index: linux/arch/sh/boards/mach-se/770x/setup.c =================================--- linux.orig/arch/sh/boards/mach-se/770x/setup.c +++ linux/arch/sh/boards/mach-se/770x/setup.c
@@ -124,10 +124,15 @@ static struct sh_eth_plat_data sh_eth_pl
static struct resource sh_eth0_resources[] = {
[0] = {
.start = SH_ETH0_BASE,
- .end = SH_ETH0_BASE + 0x1B8,
+ .end = SH_ETH0_BASE + 0x1B8 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
+ .start = SH_TSU_BASE,
+ .end = SH_TSU_BASE + 0x200 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [2] = {
.start = SH_ETH0_IRQ,
.end = SH_ETH0_IRQ,
.flags = IORESOURCE_IRQ,
@@ -147,10 +152,15 @@ static struct platform_device sh_eth0_de
static struct resource sh_eth1_resources[] = {
[0] = {
.start = SH_ETH1_BASE,
- .end = SH_ETH1_BASE + 0x1B8,
+ .end = SH_ETH1_BASE + 0x1B8 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
+ .start = SH_TSU_BASE,
+ .end = SH_TSU_BASE + 0x200 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [2] = {
.start = SH_ETH1_IRQ,
.end = SH_ETH1_IRQ,
.flags = IORESOURCE_IRQ,
Index: linux/arch/sh/include/mach-se/mach/se.h =================================--- linux.orig/arch/sh/include/mach-se/mach/se.h +++ linux/arch/sh/include/mach-se/mach/se.h
@@ -100,6 +100,7 @@
/* Base address */
#define SH_ETH0_BASE 0xA7000000
#define SH_ETH1_BASE 0xA7000400
+#define SH_TSU_BASE 0xA7000800
/* PHY ID */
#if defined(CONFIG_CPU_SUBTYPE_SH7710)

 # define PHY_ID 0x00