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drm/i915/pmu: Only enumerate available counters in sysfs

PATCH Superseded Tvrtko Ursulin 4 participants 11 messages Dec 21, 2017 – Jan 11, 2018

Subsystems (2)
DRM drivers Intel i915
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Tvrtko Ursulin

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#0 lore raw

PATCH 1/1 drm/i915/pmu: Only enumerate available counters in sysfs

From: Tvrtko Ursulin <[email protected]>

Switch over to dynamically creating device attributes, which are in turn used by the perf core to expose available counters in sysfs.

This way we do not expose counters which are not avaiable on the current platform, and are so more consistent between what we reply to open attempts via the perf_event_open(2), and what is discoverable in sysfs.

Signed-off-by Tvrtko Ursulin <[email protected]>
---
 drivers/gpu/drm/i915/i915_pmu.c | 326 ++++++++++++++++++++++++++++++----------
 drivers/gpu/drm/i915/i915_pmu.h |   8 +
 2 files changed, 256 insertions(+), 78 deletions(-)
drivers/gpu/drm/i915/i915_pmu.c +248 -78
index 55a8a1e29424..989e1ccd03e9 100644
@@ -290,23 +290,44 @@ static void i915_pmu_event_destroy(struct perf_event *event)
 	WARN_ON(event->parent);
 }
 
-static int engine_event_init(struct perf_event *event)
+static int
+engine_event_status(struct intel_engine_cs *engine,
+		    enum drm_i915_pmu_engine_sample sample)
 {
-	struct drm_i915_private *i915 =
-		container_of(event->pmu, typeof(*i915), pmu.base);
-
-	if (!intel_engine_lookup_user(i915, engine_event_class(event),
-				      engine_event_instance(event)))
-		return -ENODEV;
-
-	switch (engine_event_sample(event)) {
+	switch (sample) {
 	case I915_SAMPLE_BUSY:
 	case I915_SAMPLE_WAIT:
 		break;
 	case I915_SAMPLE_SEMA:
+		if (INTEL_GEN(engine->i915) < 6)
+			return -ENODEV;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return 0;
+}
+
+static int
+config_status(struct drm_i915_private *i915, u64 config)
+{
+	switch (config) {
+	case I915_PMU_ACTUAL_FREQUENCY:
+		if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+			/* Requires a mutex for sampling! */
+			return -ENODEV;
+		/* Fall-through. */
+	case I915_PMU_REQUESTED_FREQUENCY:
 		if (INTEL_GEN(i915) < 6)
 			return -ENODEV;
 		break;
+	case I915_PMU_INTERRUPTS:
+		break;
+	case I915_PMU_RC6_RESIDENCY:
+		if (!HAS_RC6(i915))
+			return -ENODEV;
+		break;
 	default:
 		return -ENOENT;
 	}

@@ -314,6 +335,20 @@ static int engine_event_init(struct perf_event *event)
 	return 0;
 }
 
+static int engine_event_init(struct perf_event *event)
+{
+	struct drm_i915_private *i915 =
+		container_of(event->pmu, typeof(*i915), pmu.base);
+	struct intel_engine_cs *engine;
+
+	engine = intel_engine_lookup_user(i915, engine_event_class(event),
+					  engine_event_instance(event));
+	if (!engine)
+		return -ENODEV;
+
+	return engine_event_status(engine, engine_event_sample(event));
+}
+
 static int i915_pmu_event_init(struct perf_event *event)
 {
 	struct drm_i915_private *i915 =

@@ -337,30 +372,10 @@ static int i915_pmu_event_init(struct perf_event *event)
 	if (!cpumask_test_cpu(event->cpu, &i915_pmu_cpumask))
 		return -EINVAL;
 
-	if (is_engine_event(event)) {
+	if (is_engine_event(event))
 		ret = engine_event_init(event);
-	} else {
-		ret = 0;
-		switch (event->attr.config) {
-		case I915_PMU_ACTUAL_FREQUENCY:
-			if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
-				 /* Requires a mutex for sampling! */
-				ret = -ENODEV;
-		case I915_PMU_REQUESTED_FREQUENCY:
-			if (INTEL_GEN(i915) < 6)
-				ret = -ENODEV;
-			break;
-		case I915_PMU_INTERRUPTS:
-			break;
-		case I915_PMU_RC6_RESIDENCY:
-			if (!HAS_RC6(i915))
-				ret = -ENODEV;
-			break;
-		default:
-			ret = -ENOENT;
-			break;
-		}
-	}
+	else
+		ret = config_status(i915, event->attr.config);;
 	if (ret)
 		return ret;
 

@@ -657,52 +672,9 @@ static ssize_t i915_pmu_event_show(struct device *dev,
 	return sprintf(buf, "config=0x%lx\n", eattr->val);
 }
 
-#define I915_EVENT_ATTR(_name, _config) \
-	(&((struct i915_ext_attribute[]) { \
-		{ .attr = __ATTR(_name, 0444, i915_pmu_event_show, NULL), \
-		  .val = _config, } \
-	})[0].attr.attr)
-
-#define I915_EVENT_STR(_name, _str) \
-	(&((struct perf_pmu_events_attr[]) { \
-		{ .attr	     = __ATTR(_name, 0444, perf_event_sysfs_show, NULL), \
-		  .id	     = 0, \
-		  .event_str = _str, } \
-	})[0].attr.attr)
-
-#define I915_EVENT(_name, _config, _unit) \
-	I915_EVENT_ATTR(_name, _config), \
-	I915_EVENT_STR(_name.unit, _unit)
-
-#define I915_ENGINE_EVENT(_name, _class, _instance, _sample) \
-	I915_EVENT_ATTR(_name, __I915_PMU_ENGINE(_class, _instance, _sample)), \
-	I915_EVENT_STR(_name.unit, "ns")
-
-#define I915_ENGINE_EVENTS(_name, _class, _instance) \
-	I915_ENGINE_EVENT(_name##_instance-busy, _class, _instance, I915_SAMPLE_BUSY), \
-	I915_ENGINE_EVENT(_name##_instance-sema, _class, _instance, I915_SAMPLE_SEMA), \
-	I915_ENGINE_EVENT(_name##_instance-wait, _class, _instance, I915_SAMPLE_WAIT)
-
-static struct attribute *i915_pmu_events_attrs[] = {
-	I915_ENGINE_EVENTS(rcs, I915_ENGINE_CLASS_RENDER, 0),
-	I915_ENGINE_EVENTS(bcs, I915_ENGINE_CLASS_COPY, 0),
-	I915_ENGINE_EVENTS(vcs, I915_ENGINE_CLASS_VIDEO, 0),
-	I915_ENGINE_EVENTS(vcs, I915_ENGINE_CLASS_VIDEO, 1),
-	I915_ENGINE_EVENTS(vecs, I915_ENGINE_CLASS_VIDEO_ENHANCE, 0),
-
-	I915_EVENT(actual-frequency,    I915_PMU_ACTUAL_FREQUENCY,    "MHz"),
-	I915_EVENT(requested-frequency, I915_PMU_REQUESTED_FREQUENCY, "MHz"),
-
-	I915_EVENT_ATTR(interrupts, I915_PMU_INTERRUPTS),
-
-	I915_EVENT(rc6-residency,   I915_PMU_RC6_RESIDENCY,   "ns"),
-
-	NULL,
-};
-
-static const struct attribute_group i915_pmu_events_attr_group = {
+static struct attribute_group i915_pmu_events_attr_group = {
 	.name = "events",
-	.attrs = i915_pmu_events_attrs,
+	/* Patch in attrs at runtime. */
 };
 
 static ssize_t

@@ -720,7 +692,7 @@ static struct attribute *i915_cpumask_attrs[] = {
 	NULL,
 };
 
-static struct attribute_group i915_pmu_cpumask_attr_group = {
+static const struct attribute_group i915_pmu_cpumask_attr_group = {
 	.attrs = i915_cpumask_attrs,
 };
 

@@ -731,6 +703,196 @@ static const struct attribute_group *i915_pmu_attr_groups[] = {
 	NULL
 };
 
+#define __event(__config, __name, __unit) \
+{ \
+	.config = (__config), \
+	.name = (__name), \
+	.unit = (__unit), \
+}
+
+#define __engine_event(__sample, __name) \
+{ \
+	.sample = (__sample), \
+	.name = (__name), \
+}
+
+#define __i915_attr(__p, __name, __config) \
+{ \
+	(__p)->attr.attr.name = (__name); \
+	(__p)->attr.attr.mode = 0444; \
+	(__p)->attr.show = i915_pmu_event_show; \
+	(__p)->val = (__config); \
+}
+
+#define __pmu_attr(__p, __name, __str) \
+{ \
+	(__p)->attr.attr.name = (__name); \
+	(__p)->attr.attr.mode = 0444; \
+	(__p)->attr.show = perf_event_sysfs_show; \
+	(__p)->event_str = (__str); \
+}
+
+static struct attribute **
+create_event_attributes(struct drm_i915_private *i915)
+{
+	static const struct {
+		u64 config;
+		const char *name;
+		const char *unit;
+	} events[] = {
+		__event(I915_PMU_ACTUAL_FREQUENCY, "actual-frequency", "MHz"),
+		__event(I915_PMU_REQUESTED_FREQUENCY, "requested-frequency", "MHz"),
+		__event(I915_PMU_INTERRUPTS, "interrupts", NULL),
+		__event(I915_PMU_RC6_RESIDENCY, "rc6-residency", "ns"),
+	};
+	static const struct {
+		enum drm_i915_pmu_engine_sample sample;
+		char *name;
+	} engine_events[] = {
+		__engine_event(I915_SAMPLE_BUSY, "busy"),
+		__engine_event(I915_SAMPLE_SEMA, "sema"),
+		__engine_event(I915_SAMPLE_WAIT, "wait"),
+	};
+	unsigned int count = 0;
+	struct perf_pmu_events_attr *pmu_attr, *pmu_p;
+	struct i915_ext_attribute *i915_attr, *i915_p;
+	struct intel_engine_cs *engine;
+	struct attribute **attr, **p;
+	enum intel_engine_id id;
+	unsigned int i;
+
+	/* Count how many counters we will be exposing. */
+	for (i = 0; i < ARRAY_SIZE(events); i++) {
+		if (!config_status(i915, events[i].config))
+			count++;
+	}
+
+	for_each_engine(engine, i915, id) {
+		for (i = 0; i < ARRAY_SIZE(engine_events); i++) {
+			if (!engine_event_status(engine,
+						 engine_events[i].sample))
+				count++;
+		}
+	}
+
+	/* Allocate attribute objects and table. */
+	i915_attr = kzalloc(count * sizeof(*i915_attr), GFP_KERNEL);
+	if (!i915_attr)
+		return NULL;
+
+	pmu_attr = kzalloc(count * sizeof(*pmu_attr), GFP_KERNEL);
+	if (!pmu_attr) {
+		kfree(i915_attr);
+		return NULL;
+	}
+
+	/* Max one pointer of each attribute type plus a termination entry. */
+	attr = kzalloc((count * 2 + 1) * sizeof(attr), GFP_KERNEL);
+	if (!attr) {
+		kfree(pmu_attr);
+		kfree(i915_attr);
+		return NULL;
+	}
+
+	i915_p = i915_attr;
+	pmu_p = pmu_attr;
+	p = attr;
+
+	/* Initialize supported non-engine counters. */
+	for (i = 0; i < ARRAY_SIZE(events); i++) {
+		char *str;
+
+		if (config_status(i915, events[i].config))
+			continue;
+
+		str = kstrdup(events[i].name, GFP_KERNEL);
+		if (!str)
+			goto err;
+
+		__i915_attr(i915_p, str, events[i].config);
+		*p++ = &i915_p->attr.attr;
+		i915_p++;
+
+		if (events[i].unit) {
+			str = kasprintf(GFP_KERNEL, "%s.unit", events[i].name);
+			if (!str)
+				goto err;
+
+			__pmu_attr(pmu_p, str, events[i].unit);
+			*p++ = &pmu_p->attr.attr;
+			pmu_p++;
+		}
+	}
+
+	/* Initialize supported engine counters. */
+	for_each_engine(engine, i915, id) {
+		for (i = 0; i < ARRAY_SIZE(engine_events); i++) {
+			char *str;
+
+			if (engine_event_status(engine,
+						engine_events[i].sample))
+				continue;
+
+			str = kasprintf(GFP_KERNEL, "%s-%s",
+					engine->name, engine_events[i].name);
+			if (!str)
+				goto err;
+
+			__i915_attr(i915_p, str,
+				    __I915_PMU_ENGINE(engine->class,
+						      engine->instance,
+						      engine_events[i].sample));
+			*p++ = &i915_p->attr.attr;
+			i915_p++;
+
+			str = kasprintf(GFP_KERNEL, "%s-%s.unit",
+					engine->name, engine_events[i].name);
+			if (!str)
+				goto err;
+
+			__pmu_attr(pmu_p, str, "ns");
+			*p++ = &pmu_p->attr.attr;
+			pmu_p++;
+		}
+	}
+
+	i915->pmu.i915_attr = i915_attr;
+	i915->pmu.pmu_attr = pmu_attr;
+
+	return attr;
+
+err:
+	p = attr;
+	while (*p) {
+		kfree((*p)->name);
+		p++;
+	}
+
+	kfree(attr);
+	kfree(i915_attr);
+	kfree(pmu_attr);
+
+	return NULL;
+}
+
+static void free_event_attributes(struct drm_i915_private *i915)
+{
+	struct attribute **p = i915_pmu_events_attr_group.attrs;
+
+	while (*p) {
+		kfree((*p)->name);
+		p++;
+	}
+
+	kfree(i915_pmu_events_attr_group.attrs);
+	kfree(i915->pmu.i915_attr);
+	kfree(i915->pmu.pmu_attr);
+
+	i915_pmu_events_attr_group.attrs = NULL;
+	i915->pmu.i915_attr = NULL;
+	i915->pmu.pmu_attr = NULL;
+}
+
 static int i915_pmu_cpu_online(unsigned int cpu, struct hlist_node *node)
 {
 	struct i915_pmu *pmu = hlist_entry_safe(node, typeof(*pmu), node);

@@ -806,6 +968,12 @@ void i915_pmu_register(struct drm_i915_private *i915)
 		return;
 	}
 
+	i915_pmu_events_attr_group.attrs = create_event_attributes(i915);
+	if (!i915_pmu_events_attr_group.attrs) {
+		ret = -ENOMEM;
+		goto err;
+	}
+
 	i915->pmu.base.attr_groups	= i915_pmu_attr_groups;
 	i915->pmu.base.task_ctx_nr	= perf_invalid_context;
 	i915->pmu.base.event_init	= i915_pmu_event_init;

@@ -838,6 +1006,7 @@ void i915_pmu_register(struct drm_i915_private *i915)
 	perf_pmu_unregister(&i915->pmu.base);
 err:
 	i915->pmu.base.event_init = NULL;
+	free_event_attributes(i915);
 	DRM_NOTE("Failed to register PMU! (err=%d)\n", ret);
 }
 

@@ -862,4 +1031,5 @@ void i915_pmu_unregister(struct drm_i915_private *i915)
 
 	perf_pmu_unregister(&i915->pmu.base);
 	i915->pmu.base.event_init = NULL;
+	free_event_attributes(i915);
 }
drivers/gpu/drm/i915/i915_pmu.h +8 -0
index 40c154d13565..5a2e013a56bb 100644
@@ -94,6 +94,14 @@ struct i915_pmu {
 	 * struct intel_engine_cs.
 	 */
 	struct i915_pmu_sample sample[__I915_NUM_PMU_SAMPLERS];
+	/**
+	 * @i915_attr: Memory block holding device attributes.
+	 */
+	void *i915_attr;
+	/**
+	 * @pmu_attr: Memory block holding device attributes.
+	 */
+	void *pmu_attr;
 };
 
 #ifdef CONFIG_PERF_EVENTS
Signature · 6 lines
2.14.1

_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
CI
#1 lore raw

✓ Fi.CI.BAT: success for drm/i915/pmu: Only enumerate available counters in sysfs

== Series Details ==

== Series Details ==

Series: drm/i915/pmu: Only enumerate available counters in sysfs
URL : https://patchwork.freedesktop.org/series/35689/
State : success

== Summary ==

Series 35689v1 drm/i915/pmu: Only enumerate available counters in sysfs
https://patchwork.freedesktop.org/api/1.0/series/35689/revisions/1/mbox/

Test gem_mmap_gtt:

        Subgroup basic-small-bo-tiledx:
                pass       -> FAIL       (fi-gdg-551) fdo#102575
Test kms_psr_sink_crc:
        Subgroup psr_basic:
                pass       -> DMESG-WARN (fi-skl-6700hq) fdo#101144

fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#101144 https://bugs.freedesktop.org/show_bug.cgi?id=101144

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:422s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:435s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:368s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:456s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:259s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:482s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:474s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:439s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:433s
fi-elk-e7500     total:224  pass:163  dwarn:15  dfail:0   fail:0   skip:45 
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:239s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:511s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:394s
fi-hsw-4770r     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:403s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:417s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:467s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:420s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:470s
fi-kbl-7560u     total:288  pass:268  dwarn:1   dfail:0   fail:0   skip:19  time:509s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:460s
fi-kbl-r         total:288  pass:260  dwarn:1   dfail:0   fail:0   skip:27  time:511s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:491s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:432s
fi-skl-6600u     total:288  pass:260  dwarn:1   dfail:0   fail:0   skip:27  time:522s
fi-skl-6700hq    total:288  pass:261  dwarn:1   dfail:0   fail:0   skip:26  time:541s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:495s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:483s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:435s
fi-snb-2520m     total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:534s
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:410s
Blacklisted hosts:
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:583s
fi-cnl-y         total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:633s
fi-glk-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:469s

4b29b69aee8cf163fa934b8416dfb7685a9d8bcd drm-tip: 2017y-12m-21d-11h-10m-15s UTC integration manifest df50bfe75a32 drm/i915/pmu: Only enumerate available counters in sysfs

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7557/issues.html
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

CI
#2 lore raw

✓ Fi.CI.IGT: success for drm/i915/pmu: Only enumerate available counters in sysfs

In reply to Tvrtko Ursulin
== Series Details ==

== Series Details ==

Series: drm/i915/pmu: Only enumerate available counters in sysfs
URL : https://patchwork.freedesktop.org/series/35689/
State : success

== Summary ==

Test pm_rpm:

        Subgroup system-suspend:
                skip       -> PASS       (shard-hsw) fdo#103375 +1
Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-offscren-pri-shrfb-draw-render:
                fail       -> PASS       (shard-snb) fdo#101623
Test kms_vblank:
        Subgroup accuracy-idle:
                pass       -> FAIL       (shard-hsw) fdo#102583
Test drv_suspend:
        Subgroup fence-restore-tiled2untiled:
                skip       -> PASS       (shard-snb)
        Subgroup sysfs-reader:
                skip       -> PASS       (shard-hsw)
Test kms_flip:
        Subgroup flip-vs-panning-vs-hang-interruptible:
                pass       -> DMESG-WARN (shard-snb) fdo#103821
        Subgroup modeset-vs-vblank-race:
                pass       -> FAIL       (shard-hsw) fdo#103060
Test gem_tiled_swapping:
        Subgroup non-threaded:
                pass       -> INCOMPLETE (shard-hsw) fdo#104218

fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#102583 https://bugs.freedesktop.org/show_bug.cgi?id=102583
fdo#103821 https://bugs.freedesktop.org/show_bug.cgi?id=103821
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#104218 https://bugs.freedesktop.org/show_bug.cgi?id=104218

shard-hsw        total:2640 pass:1500 dwarn:1   dfail:0   fail:12  skip:1126 time:8903s
shard-snb        total:2640 pass:1281 dwarn:2   dfail:0   fail:11  skip:1345 time:7461s
Blacklisted hosts:
shard-apl        total:2712 pass:1686 dwarn:2   dfail:0   fail:23  skip:1001 time:12467s
shard-kbl        total:2618 pass:1742 dwarn:1   dfail:0   fail:23  skip:851 time:10043s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7557/shards.html
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#3 lore raw
In reply to Tvrtko Ursulin

Quoting Tvrtko Ursulin (2017-12-21 17:13:16)

Quoted 50 lines

From: Tvrtko Ursulin <[email protected]>

Switch over to dynamically creating device attributes, which are in turn used by the perf core to expose available counters in sysfs.

This way we do not expose counters which are not avaiable on the current platform, and are so more consistent between what we reply to open attempts via the perf_event_open(2), and what is discoverable in sysfs.

Signed-off-by Tvrtko Ursulin <[email protected]>

---

drivers/gpu/drm/i915/i915_pmu.c +39 -0
+#define __event(__config, __name, __unit) \
+{ \
+       .config = (__config), \
+       .name = (__name), \
+       .unit = (__unit), \
+}
+
+#define __engine_event(__sample, __name) \
+{ \
+       .sample = (__sample), \
+       .name = (__name), \
+}
+
+#define __i915_attr(__p, __name, __config) \
+{ \
+       (__p)->attr.attr.name = (__name); \
+       (__p)->attr.attr.mode = 0444; \
+       (__p)->attr.show = i915_pmu_event_show; \
+       (__p)->val = (__config); \
+}
+
+#define __pmu_attr(__p, __name, __str) \
+{ \
+       (__p)->attr.attr.name = (__name); \
+       (__p)->attr.attr.mode = 0444; \
+       (__p)->attr.show = perf_event_sysfs_show; \
+       (__p)->event_str = (__str); \
+}
+
+static struct attribute **
+create_event_attributes(struct drm_i915_private *i915)
+{
+       static const struct {
+               u64 config;
+               const char *name;
+               const char *unit;
+       } events[] = {
+               __event(I915_PMU_ACTUAL_FREQUENCY, "actual-frequency", "MHz"),
+               __event(I915_PMU_REQUESTED_FREQUENCY, "requested-frequency", "MHz"),

drivers/gpu/drm/i915/i915_pmu.c static const struct attribute_group *i915_pmu_attr_groups[] = { · line 754

Quoted 10 lines
drivers/gpu/drm/i915/i915_pmu.c +10 -0
+               __event(I915_PMU_INTERRUPTS, "interrupts", NULL),
+               __event(I915_PMU_RC6_RESIDENCY, "rc6-residency", "ns"),
+       };
+       static const struct {
+               enum drm_i915_pmu_engine_sample sample;
+               char *name;
+       } engine_events[] = {
+               __engine_event(I915_SAMPLE_BUSY, "busy"),
+               __engine_event(I915_SAMPLE_SEMA, "sema"),
+               __engine_event(I915_SAMPLE_WAIT, "wait"),

Are these macros that useful? vs { I915_SAMPLE_BUSY, "busy" } and { I915_PMU_ACTUAL_FREQUENCY, "actual-frequency", "MHz" },

Quoted 30 lines
drivers/gpu/drm/i915/i915_pmu.c +30 -0
+       };
+       unsigned int count = 0;
+       struct perf_pmu_events_attr *pmu_attr, *pmu_p;
+       struct i915_ext_attribute *i915_attr, *i915_p;
+       struct intel_engine_cs *engine;
+       struct attribute **attr, **p;
+       enum intel_engine_id id;
+       unsigned int i;
+
+       /* Count how many counters we will be exposing. */
+       for (i = 0; i < ARRAY_SIZE(events); i++) {
+               if (!config_status(i915, events[i].config))
+                       count++;
+       }
+
+       for_each_engine(engine, i915, id) {
+               for (i = 0; i < ARRAY_SIZE(engine_events); i++) {
+                       if (!engine_event_status(engine,
+                                                engine_events[i].sample))
+                               count++;
+               }
+       }
+
+       /* Allocate attribute objects and table. */
+       i915_attr = kzalloc(count * sizeof(*i915_attr), GFP_KERNEL);
+       if (!i915_attr)
+               return NULL;
+
+       pmu_attr = kzalloc(count * sizeof(*pmu_attr), GFP_KERNEL);
+       if (!pmu_attr) {

drivers/gpu/drm/i915/i915_pmu.c static const struct attribute_group *i915_pmu_attr_groups[] = { · line 794

Quoted 10 lines
drivers/gpu/drm/i915/i915_pmu.c +10 -0
+               kfree(i915_attr);
+               return NULL;
+       }
+
+       /* Max one pointer of each attribute type plus a termination entry. */
+       attr = kzalloc((count * 2 + 1) * sizeof(attr), GFP_KERNEL);
+       if (!attr) {
+               kfree(pmu_attr);
+               kfree(i915_attr);
+               return NULL;

Joonas wants you to feed through the same error unwind.

drivers/gpu/drm/i915/i915_pmu.c static const struct attribute_group *i915_pmu_attr_groups[] = { · line 799

Quoted 5 lines
drivers/gpu/drm/i915/i915_pmu.c +5 -0
+       }
+
+       i915_p = i915_attr;
+       pmu_p = pmu_attr;
+       p = attr;

i915_attr_iter, pmu_attr_iter and attr_iter?

drivers/gpu/drm/i915/i915_pmu.c static const struct attribute_group *i915_pmu_attr_groups[] = { · line 812

Quoted 12 lines
drivers/gpu/drm/i915/i915_pmu.c +12 -0
+       /* Initialize supported non-engine counters. */
+       for (i = 0; i < ARRAY_SIZE(events); i++) {
+               char *str;
+
+               if (config_status(i915, events[i].config))
+                       continue;
+
+               str = kstrdup(events[i].name, GFP_KERNEL);
+               if (!str)
+                       goto err;
+
+               __i915_attr(i915_p, str, events[i].config);

		*attr_iter++ = &i915_attr_iter->attr.attr;
		*i915_attr_iter++ = (struct i915_ext_attribute) {
			.attr.attr.name = str,
			.attr.attr.mode = 0444,
			.attr.show = i915_pmu_event_show,
			.val = events[i].config,
		}

?

Mere suggestions. Doesn't look that bad
-Chris
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#4 lore raw
Quoted 56 lines · Chris Wilson

Quoting Tvrtko Ursulin (2017-12-21 17:13:16)

Quoted 55 lines

From: Tvrtko Ursulin <[email protected]>

Switch over to dynamically creating device attributes, which are in turn used by the perf core to expose available counters in sysfs.

This way we do not expose counters which are not avaiable on the current platform, and are so more consistent between what we reply to open attempts via the perf_event_open(2), and what is discoverable in sysfs.

Signed-off-by Tvrtko Ursulin <[email protected]>

---

drivers/gpu/drm/i915/i915_pmu.c +44 -0
+#define __event(__config, __name, __unit) \
+{ \
+       .config = (__config), \
+       .name = (__name), \
+       .unit = (__unit), \
+}
+
+#define __engine_event(__sample, __name) \
+{ \
+       .sample = (__sample), \
+       .name = (__name), \
+}
+
+#define __i915_attr(__p, __name, __config) \
+{ \
+       (__p)->attr.attr.name = (__name); \
+       (__p)->attr.attr.mode = 0444; \
+       (__p)->attr.show = i915_pmu_event_show; \
+       (__p)->val = (__config); \
+}
+
+#define __pmu_attr(__p, __name, __str) \
+{ \
+       (__p)->attr.attr.name = (__name); \
+       (__p)->attr.attr.mode = 0444; \
+       (__p)->attr.show = perf_event_sysfs_show; \
+       (__p)->event_str = (__str); \
+}
+
+static struct attribute **
+create_event_attributes(struct drm_i915_private *i915)
+{
+       static const struct {
+               u64 config;
+               const char *name;
+               const char *unit;
+       } events[] = {
+               __event(I915_PMU_ACTUAL_FREQUENCY, "actual-frequency", "MHz"),
+               __event(I915_PMU_REQUESTED_FREQUENCY, "requested-frequency", "MHz"),
+               __event(I915_PMU_INTERRUPTS, "interrupts", NULL),
+               __event(I915_PMU_RC6_RESIDENCY, "rc6-residency", "ns"),
+       };
+       static const struct {
+               enum drm_i915_pmu_engine_sample sample;
Quoted 8 lines

drivers/gpu/drm/i915/i915_pmu.c static const struct attribute_group *i915_pmu_attr_groups[] = { · line 754

Quoted 5 lines
drivers/gpu/drm/i915/i915_pmu.c +5 -0
+               char *name;
+       } engine_events[] = {
+               __engine_event(I915_SAMPLE_BUSY, "busy"),
+               __engine_event(I915_SAMPLE_SEMA, "sema"),
+               __engine_event(I915_SAMPLE_WAIT, "wait"),

Are these macros that useful? vs { I915_SAMPLE_BUSY, "busy" } and { I915_PMU_ACTUAL_FREQUENCY, "actual-frequency", "MHz" },

They are marginal.. I preferred to used named initialization to be more mistake proof, in which case they do shorten the lines here a bit. It's 50-50 for me, or don't really care.

Quoted 34 lines
Quoted 34 lines
drivers/gpu/drm/i915/i915_pmu.c +34 -0
+       };
+       unsigned int count = 0;
+       struct perf_pmu_events_attr *pmu_attr, *pmu_p;
+       struct i915_ext_attribute *i915_attr, *i915_p;
+       struct intel_engine_cs *engine;
+       struct attribute **attr, **p;
+       enum intel_engine_id id;
+       unsigned int i;
+
+       /* Count how many counters we will be exposing. */
+       for (i = 0; i < ARRAY_SIZE(events); i++) {
+               if (!config_status(i915, events[i].config))
+                       count++;
+       }
+
+       for_each_engine(engine, i915, id) {
+               for (i = 0; i < ARRAY_SIZE(engine_events); i++) {
+                       if (!engine_event_status(engine,
+                                                engine_events[i].sample))
+                               count++;
+               }
+       }
+
+       /* Allocate attribute objects and table. */
+       i915_attr = kzalloc(count * sizeof(*i915_attr), GFP_KERNEL);
+       if (!i915_attr)
+               return NULL;
+
+       pmu_attr = kzalloc(count * sizeof(*pmu_attr), GFP_KERNEL);
+       if (!pmu_attr) {
+               kfree(i915_attr);
+               return NULL;
+       }
+
Quoted 8 lines

drivers/gpu/drm/i915/i915_pmu.c static const struct attribute_group *i915_pmu_attr_groups[] = { · line 794

Quoted 6 lines
drivers/gpu/drm/i915/i915_pmu.c +6 -0
+       /* Max one pointer of each attribute type plus a termination entry. */
+       attr = kzalloc((count * 2 + 1) * sizeof(attr), GFP_KERNEL);
+       if (!attr) {
+               kfree(pmu_attr);
+               kfree(i915_attr);
+               return NULL;

Joonas wants you to feed through the same error unwind.

Yeah, I've almost done it at one point. :)

Quoted 7 lines

drivers/gpu/drm/i915/i915_pmu.c static const struct attribute_group *i915_pmu_attr_groups[] = { · line 799

Quoted 5 lines
drivers/gpu/drm/i915/i915_pmu.c +5 -0
+       }
+
+       i915_p = i915_attr;
+       pmu_p = pmu_attr;
+       p = attr;

i915_attr_iter, pmu_attr_iter and attr_iter?

Shrug, can do.

Quoted 22 lines

drivers/gpu/drm/i915/i915_pmu.c static const struct attribute_group *i915_pmu_attr_groups[] = { · line 812

Quoted 13 lines
drivers/gpu/drm/i915/i915_pmu.c +12 -0
+       /* Initialize supported non-engine counters. */
+       for (i = 0; i < ARRAY_SIZE(events); i++) {
+               char *str;
+
+               if (config_status(i915, events[i].config))
+                       continue;
+
+               str = kstrdup(events[i].name, GFP_KERNEL);
+               if (!str)
+                       goto err;
+
+               __i915_attr(i915_p, str, events[i].config);

		*attr_iter++ = &i915_attr_iter->attr.attr;
		*i915_attr_iter++ = (struct i915_ext_attribute) {
			.attr.attr.name = str,
			.attr.attr.mode = 0444,
			.attr.show = i915_pmu_event_show,
			.val = events[i].config,
		}
Quoted 1 line

?

Partially prettier but since I had two instances of each attr initialization I liked how the macro shrank the code. Perhaps I make the macro increment the pointer and return it? Or make it a static inline even.

i915_attr_iter = __add_i915_attr(i915_attr_iter, str, ...);

?

Quoted 1 line

Mere suggestions. Doesn't look that bad

Thanks for looking. I think the largest benefit is future proofing the maintenance. Secondary, but also attractive, that the unsupported events do not list.

Regards,

Tvrtko
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author maintainer
#5 lore raw

PATCH v2 1/1 drm/i915/pmu: Only enumerate available counters in sysfs

In reply to Chris Wilson

From: Tvrtko Ursulin <[email protected]>

Switch over to dynamically creating device attributes, which are in turn used by the perf core to expose available counters in sysfs.

This way we do not expose counters which are not avaiable on the current platform, and are so more consistent between what we reply to open attempts via the perf_event_open(2), and what is discoverable in sysfs.

v2:
* Simplify attribute pointer freeing loop.
* Changed attr init from macro to function.
* More common error unwind. (Chris Wilson)
* Rename some locals. (Chris Wilson)

Signed-off-by Tvrtko Ursulin <[email protected]>
Cc Chris Wilson <[email protected]>
---
 drivers/gpu/drm/i915/i915_pmu.c | 321 ++++++++++++++++++++++++++++++----------
 drivers/gpu/drm/i915/i915_pmu.h |   8 +
 2 files changed, 251 insertions(+), 78 deletions(-)
drivers/gpu/drm/i915/i915_pmu.c +243 -78
index 55a8a1e29424..43ad990123a0 100644
@@ -290,23 +290,44 @@ static void i915_pmu_event_destroy(struct perf_event *event)
 	WARN_ON(event->parent);
 }
 
-static int engine_event_init(struct perf_event *event)
+static int
+engine_event_status(struct intel_engine_cs *engine,
+		    enum drm_i915_pmu_engine_sample sample)
 {
-	struct drm_i915_private *i915 =
-		container_of(event->pmu, typeof(*i915), pmu.base);
-
-	if (!intel_engine_lookup_user(i915, engine_event_class(event),
-				      engine_event_instance(event)))
-		return -ENODEV;
-
-	switch (engine_event_sample(event)) {
+	switch (sample) {
 	case I915_SAMPLE_BUSY:
 	case I915_SAMPLE_WAIT:
 		break;
 	case I915_SAMPLE_SEMA:
+		if (INTEL_GEN(engine->i915) < 6)
+			return -ENODEV;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return 0;
+}
+
+static int
+config_status(struct drm_i915_private *i915, u64 config)
+{
+	switch (config) {
+	case I915_PMU_ACTUAL_FREQUENCY:
+		if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+			/* Requires a mutex for sampling! */
+			return -ENODEV;
+		/* Fall-through. */
+	case I915_PMU_REQUESTED_FREQUENCY:
 		if (INTEL_GEN(i915) < 6)
 			return -ENODEV;
 		break;
+	case I915_PMU_INTERRUPTS:
+		break;
+	case I915_PMU_RC6_RESIDENCY:
+		if (!HAS_RC6(i915))
+			return -ENODEV;
+		break;
 	default:
 		return -ENOENT;
 	}

@@ -314,6 +335,20 @@ static int engine_event_init(struct perf_event *event)
 	return 0;
 }
 
+static int engine_event_init(struct perf_event *event)
+{
+	struct drm_i915_private *i915 =
+		container_of(event->pmu, typeof(*i915), pmu.base);
+	struct intel_engine_cs *engine;
+
+	engine = intel_engine_lookup_user(i915, engine_event_class(event),
+					  engine_event_instance(event));
+	if (!engine)
+		return -ENODEV;
+
+	return engine_event_status(engine, engine_event_sample(event));
+}
+
 static int i915_pmu_event_init(struct perf_event *event)
 {
 	struct drm_i915_private *i915 =

@@ -337,30 +372,10 @@ static int i915_pmu_event_init(struct perf_event *event)
 	if (!cpumask_test_cpu(event->cpu, &i915_pmu_cpumask))
 		return -EINVAL;
 
-	if (is_engine_event(event)) {
+	if (is_engine_event(event))
 		ret = engine_event_init(event);
-	} else {
-		ret = 0;
-		switch (event->attr.config) {
-		case I915_PMU_ACTUAL_FREQUENCY:
-			if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
-				 /* Requires a mutex for sampling! */
-				ret = -ENODEV;
-		case I915_PMU_REQUESTED_FREQUENCY:
-			if (INTEL_GEN(i915) < 6)
-				ret = -ENODEV;
-			break;
-		case I915_PMU_INTERRUPTS:
-			break;
-		case I915_PMU_RC6_RESIDENCY:
-			if (!HAS_RC6(i915))
-				ret = -ENODEV;
-			break;
-		default:
-			ret = -ENOENT;
-			break;
-		}
-	}
+	else
+		ret = config_status(i915, event->attr.config);;
 	if (ret)
 		return ret;
 

@@ -657,52 +672,9 @@ static ssize_t i915_pmu_event_show(struct device *dev,
 	return sprintf(buf, "config=0x%lx\n", eattr->val);
 }
 
-#define I915_EVENT_ATTR(_name, _config) \
-	(&((struct i915_ext_attribute[]) { \
-		{ .attr = __ATTR(_name, 0444, i915_pmu_event_show, NULL), \
-		  .val = _config, } \
-	})[0].attr.attr)
-
-#define I915_EVENT_STR(_name, _str) \
-	(&((struct perf_pmu_events_attr[]) { \
-		{ .attr	     = __ATTR(_name, 0444, perf_event_sysfs_show, NULL), \
-		  .id	     = 0, \
-		  .event_str = _str, } \
-	})[0].attr.attr)
-
-#define I915_EVENT(_name, _config, _unit) \
-	I915_EVENT_ATTR(_name, _config), \
-	I915_EVENT_STR(_name.unit, _unit)
-
-#define I915_ENGINE_EVENT(_name, _class, _instance, _sample) \
-	I915_EVENT_ATTR(_name, __I915_PMU_ENGINE(_class, _instance, _sample)), \
-	I915_EVENT_STR(_name.unit, "ns")
-
-#define I915_ENGINE_EVENTS(_name, _class, _instance) \
-	I915_ENGINE_EVENT(_name##_instance-busy, _class, _instance, I915_SAMPLE_BUSY), \
-	I915_ENGINE_EVENT(_name##_instance-sema, _class, _instance, I915_SAMPLE_SEMA), \
-	I915_ENGINE_EVENT(_name##_instance-wait, _class, _instance, I915_SAMPLE_WAIT)
-
-static struct attribute *i915_pmu_events_attrs[] = {
-	I915_ENGINE_EVENTS(rcs, I915_ENGINE_CLASS_RENDER, 0),
-	I915_ENGINE_EVENTS(bcs, I915_ENGINE_CLASS_COPY, 0),
-	I915_ENGINE_EVENTS(vcs, I915_ENGINE_CLASS_VIDEO, 0),
-	I915_ENGINE_EVENTS(vcs, I915_ENGINE_CLASS_VIDEO, 1),
-	I915_ENGINE_EVENTS(vecs, I915_ENGINE_CLASS_VIDEO_ENHANCE, 0),
-
-	I915_EVENT(actual-frequency,    I915_PMU_ACTUAL_FREQUENCY,    "MHz"),
-	I915_EVENT(requested-frequency, I915_PMU_REQUESTED_FREQUENCY, "MHz"),
-
-	I915_EVENT_ATTR(interrupts, I915_PMU_INTERRUPTS),
-
-	I915_EVENT(rc6-residency,   I915_PMU_RC6_RESIDENCY,   "ns"),
-
-	NULL,
-};
-
-static const struct attribute_group i915_pmu_events_attr_group = {
+static struct attribute_group i915_pmu_events_attr_group = {
 	.name = "events",
-	.attrs = i915_pmu_events_attrs,
+	/* Patch in attrs at runtime. */
 };
 
 static ssize_t

@@ -720,7 +692,7 @@ static struct attribute *i915_cpumask_attrs[] = {
 	NULL,
 };
 
-static struct attribute_group i915_pmu_cpumask_attr_group = {
+static const struct attribute_group i915_pmu_cpumask_attr_group = {
 	.attrs = i915_cpumask_attrs,
 };
 

@@ -731,6 +703,191 @@ static const struct attribute_group *i915_pmu_attr_groups[] = {
 	NULL
 };
 
+#define __event(__config, __name, __unit) \
+{ \
+	.config = (__config), \
+	.name = (__name), \
+	.unit = (__unit), \
+}
+
+#define __engine_event(__sample, __name) \
+{ \
+	.sample = (__sample), \
+	.name = (__name), \
+}
+
+static struct i915_ext_attribute *
+add_i915_attr(struct i915_ext_attribute *attr, const char *name, u64 config)
+{
+	attr->attr.attr.name = name;
+	attr->attr.attr.mode = 0444;
+	attr->attr.show = i915_pmu_event_show;
+	attr->val = config;
+
+	return ++attr;
+}
+
+static struct perf_pmu_events_attr *
+add_pmu_attr(struct perf_pmu_events_attr *attr, const char *name,
+	     const char *str)
+{
+	attr->attr.attr.name = name;
+	attr->attr.attr.mode = 0444;
+	attr->attr.show = perf_event_sysfs_show;
+	attr->event_str = str;
+
+	return ++attr;
+}
+
+static struct attribute **
+create_event_attributes(struct drm_i915_private *i915)
+{
+	static const struct {
+		u64 config;
+		const char *name;
+		const char *unit;
+	} events[] = {
+		__event(I915_PMU_ACTUAL_FREQUENCY, "actual-frequency", "MHz"),
+		__event(I915_PMU_REQUESTED_FREQUENCY, "requested-frequency", "MHz"),
+		__event(I915_PMU_INTERRUPTS, "interrupts", NULL),
+		__event(I915_PMU_RC6_RESIDENCY, "rc6-residency", "ns"),
+	};
+	static const struct {
+		enum drm_i915_pmu_engine_sample sample;
+		char *name;
+	} engine_events[] = {
+		__engine_event(I915_SAMPLE_BUSY, "busy"),
+		__engine_event(I915_SAMPLE_SEMA, "sema"),
+		__engine_event(I915_SAMPLE_WAIT, "wait"),
+	};
+	unsigned int count = 0;
+	struct perf_pmu_events_attr *pmu_attr = NULL, *pmu_iter;
+	struct i915_ext_attribute *i915_attr = NULL, *i915_iter;
+	struct attribute **attr = NULL, **attr_iter;
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+	unsigned int i;
+
+	/* Count how many counters we will be exposing. */
+	for (i = 0; i < ARRAY_SIZE(events); i++) {
+		if (!config_status(i915, events[i].config))
+			count++;
+	}
+
+	for_each_engine(engine, i915, id) {
+		for (i = 0; i < ARRAY_SIZE(engine_events); i++) {
+			if (!engine_event_status(engine,
+						 engine_events[i].sample))
+				count++;
+		}
+	}
+
+	/* Allocate attribute objects and table. */
+	i915_attr = kzalloc(count * sizeof(*i915_attr), GFP_KERNEL);
+	if (!i915_attr)
+		goto err_alloc;
+
+	pmu_attr = kzalloc(count * sizeof(*pmu_attr), GFP_KERNEL);
+	if (!pmu_attr)
+		goto err_alloc;
+
+	/* Max one pointer of each attribute type plus a termination entry. */
+	attr = kzalloc((count * 2 + 1) * sizeof(attr), GFP_KERNEL);
+	if (!attr)
+		goto err_alloc;
+
+	i915_iter = i915_attr;
+	pmu_iter = pmu_attr;
+	attr_iter = attr;
+
+	/* Initialize supported non-engine counters. */
+	for (i = 0; i < ARRAY_SIZE(events); i++) {
+		char *str;
+
+		if (config_status(i915, events[i].config))
+			continue;
+
+		str = kstrdup(events[i].name, GFP_KERNEL);
+		if (!str)
+			goto err;
+
+		*attr_iter++ = &i915_iter->attr.attr;
+		i915_iter = add_i915_attr(i915_iter, str, events[i].config);
+
+		if (events[i].unit) {
+			str = kasprintf(GFP_KERNEL, "%s.unit", events[i].name);
+			if (!str)
+				goto err;
+
+			*attr_iter++ = &pmu_iter->attr.attr;
+			pmu_iter = add_pmu_attr(pmu_iter, str, events[i].unit);
+		}
+	}
+
+	/* Initialize supported engine counters. */
+	for_each_engine(engine, i915, id) {
+		for (i = 0; i < ARRAY_SIZE(engine_events); i++) {
+			char *str;
+
+			if (engine_event_status(engine,
+						engine_events[i].sample))
+				continue;
+
+			str = kasprintf(GFP_KERNEL, "%s-%s",
+					engine->name, engine_events[i].name);
+			if (!str)
+				goto err;
+
+			*attr_iter++ = &i915_iter->attr.attr;
+			i915_iter =
+				add_i915_attr(i915_iter, str,
+					      __I915_PMU_ENGINE(engine->class,
+								engine->instance,
+								engine_events[i].sample));
+
+			str = kasprintf(GFP_KERNEL, "%s-%s.unit",
+					engine->name, engine_events[i].name);
+			if (!str)
+				goto err;
+
+			*attr_iter++ = &pmu_iter->attr.attr;
+			pmu_iter = add_pmu_attr(pmu_iter, str, "ns");
+		}
+	}
+
+	i915->pmu.i915_attr = i915_attr;
+	i915->pmu.pmu_attr = pmu_attr;
+
+	return attr;
+
+err:;
+	for (attr_iter = attr; *attr_iter; attr_iter++)
+		kfree((*attr_iter)->name);
+
+err_alloc:
+	kfree(attr);
+	kfree(i915_attr);
+	kfree(pmu_attr);
+
+	return NULL;
+}
+
+static void free_event_attributes(struct drm_i915_private *i915)
+{
+	struct attribute **attr_iter = i915_pmu_events_attr_group.attrs;
+
+	for (; *attr_iter; attr_iter++)
+		kfree((*attr_iter)->name);
+
+	kfree(i915_pmu_events_attr_group.attrs);
+	kfree(i915->pmu.i915_attr);
+	kfree(i915->pmu.pmu_attr);
+
+	i915_pmu_events_attr_group.attrs = NULL;
+	i915->pmu.i915_attr = NULL;
+	i915->pmu.pmu_attr = NULL;
+}
+
 static int i915_pmu_cpu_online(unsigned int cpu, struct hlist_node *node)
 {
 	struct i915_pmu *pmu = hlist_entry_safe(node, typeof(*pmu), node);

@@ -806,6 +963,12 @@ void i915_pmu_register(struct drm_i915_private *i915)
 		return;
 	}
 
+	i915_pmu_events_attr_group.attrs = create_event_attributes(i915);
+	if (!i915_pmu_events_attr_group.attrs) {
+		ret = -ENOMEM;
+		goto err;
+	}
+
 	i915->pmu.base.attr_groups	= i915_pmu_attr_groups;
 	i915->pmu.base.task_ctx_nr	= perf_invalid_context;
 	i915->pmu.base.event_init	= i915_pmu_event_init;

@@ -838,6 +1001,7 @@ void i915_pmu_register(struct drm_i915_private *i915)
 	perf_pmu_unregister(&i915->pmu.base);
 err:
 	i915->pmu.base.event_init = NULL;
+	free_event_attributes(i915);
 	DRM_NOTE("Failed to register PMU! (err=%d)\n", ret);
 }
 

@@ -862,4 +1026,5 @@ void i915_pmu_unregister(struct drm_i915_private *i915)
 
 	perf_pmu_unregister(&i915->pmu.base);
 	i915->pmu.base.event_init = NULL;
+	free_event_attributes(i915);
 }
drivers/gpu/drm/i915/i915_pmu.h +8 -0
index 40c154d13565..5a2e013a56bb 100644
@@ -94,6 +94,14 @@ struct i915_pmu {
 	 * struct intel_engine_cs.
 	 */
 	struct i915_pmu_sample sample[__I915_NUM_PMU_SAMPLERS];
+	/**
+	 * @i915_attr: Memory block holding device attributes.
+	 */
+	void *i915_attr;
+	/**
+	 * @pmu_attr: Memory block holding device attributes.
+	 */
+	void *pmu_attr;
 };
 
 #ifdef CONFIG_PERF_EVENTS
Signature · 6 lines
2.14.1

_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Reviewed-by on v2 1/1
#6 lore raw

Quoting Tvrtko Ursulin (2018-01-09 12:20:05)

Quoted 39 lines

From: Tvrtko Ursulin <[email protected]>

Switch over to dynamically creating device attributes, which are in turn used by the perf core to expose available counters in sysfs.

This way we do not expose counters which are not avaiable on the current platform, and are so more consistent between what we reply to open attempts via the perf_event_open(2), and what is discoverable in sysfs.

v2:
* Simplify attribute pointer freeing loop.
* Changed attr init from macro to function.
* More common error unwind. (Chris Wilson)
* Rename some locals. (Chris Wilson)

Signed-off-by Tvrtko Ursulin <[email protected]>
Cc Chris Wilson <[email protected]>

---

drivers/gpu/drm/i915/i915_pmu.c +1 -15
@@ -337,30 +372,10 @@ static int i915_pmu_event_init(struct perf_event *event)
        if (!cpumask_test_cpu(event->cpu, &i915_pmu_cpumask))
                return -EINVAL;
 
-       if (is_engine_event(event)) {
+       if (is_engine_event(event))
                ret = engine_event_init(event);
-       } else {
-               ret = 0;
-               switch (event->attr.config) {
-               case I915_PMU_ACTUAL_FREQUENCY:
-                       if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
-                                /* Requires a mutex for sampling! */
-                               ret = -ENODEV;
-               case I915_PMU_REQUESTED_FREQUENCY:
-                       if (INTEL_GEN(i915) < 6)
-                               ret = -ENODEV;
-                       break;
-               case I915_PMU_INTERRUPTS:
-                       break;
-               case I915_PMU_RC6_RESIDENCY:

drivers/gpu/drm/i915/i915_pmu.c static int i915_pmu_event_init(struct perf_event *event) · line 378

Quoted 10 lines
drivers/gpu/drm/i915/i915_pmu.c +2 -8
-                       if (!HAS_RC6(i915))
-                               ret = -ENODEV;
-                       break;
-               default:
-                       ret = -ENOENT;
-                       break;
-               }
-       }
+       else
+               ret = config_status(i915, event->attr.config);;

Found something! s/;;/;/

It was fairly readable, keeping the sysfs clean seems a reasonable goal, and I couldn't find anything significant to complain about,

Reviewed-by Chris Wilson <[email protected]>

-Chris
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

author maintainer
#7 lore raw

PATCH v3 1/1 drm/i915/pmu: Only enumerate available counters in sysfs

From: Tvrtko Ursulin <[email protected]>

Switch over to dynamically creating device attributes, which are in turn used by the perf core to expose available counters in sysfs.

This way we do not expose counters which are not avaiable on the current platform, and are so more consistent between what we reply to open attempts via the perf_event_open(2), and what is discoverable in sysfs.

v2:
* Simplify attribute pointer freeing loop.
* Changed attr init from macro to function.
* More common error unwind. (Chris Wilson)
* Rename some locals. (Chris Wilson)

v3:
* Fixed double semi-colon. (Chris Wilson)

Signed-off-by Tvrtko Ursulin <[email protected]>
Cc Chris Wilson <[email protected]>
Reviewed-by Chris Wilson <[email protected]>
---
 drivers/gpu/drm/i915/i915_pmu.c | 321 ++++++++++++++++++++++++++++++----------
 drivers/gpu/drm/i915/i915_pmu.h |   8 +
 2 files changed, 251 insertions(+), 78 deletions(-)
drivers/gpu/drm/i915/i915_pmu.c +243 -78
index 55a8a1e29424..9139bc8df82b 100644
@@ -290,23 +290,44 @@ static void i915_pmu_event_destroy(struct perf_event *event)
 	WARN_ON(event->parent);
 }
 
-static int engine_event_init(struct perf_event *event)
+static int
+engine_event_status(struct intel_engine_cs *engine,
+		    enum drm_i915_pmu_engine_sample sample)
 {
-	struct drm_i915_private *i915 =
-		container_of(event->pmu, typeof(*i915), pmu.base);
-
-	if (!intel_engine_lookup_user(i915, engine_event_class(event),
-				      engine_event_instance(event)))
-		return -ENODEV;
-
-	switch (engine_event_sample(event)) {
+	switch (sample) {
 	case I915_SAMPLE_BUSY:
 	case I915_SAMPLE_WAIT:
 		break;
 	case I915_SAMPLE_SEMA:
+		if (INTEL_GEN(engine->i915) < 6)
+			return -ENODEV;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return 0;
+}
+
+static int
+config_status(struct drm_i915_private *i915, u64 config)
+{
+	switch (config) {
+	case I915_PMU_ACTUAL_FREQUENCY:
+		if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+			/* Requires a mutex for sampling! */
+			return -ENODEV;
+		/* Fall-through. */
+	case I915_PMU_REQUESTED_FREQUENCY:
 		if (INTEL_GEN(i915) < 6)
 			return -ENODEV;
 		break;
+	case I915_PMU_INTERRUPTS:
+		break;
+	case I915_PMU_RC6_RESIDENCY:
+		if (!HAS_RC6(i915))
+			return -ENODEV;
+		break;
 	default:
 		return -ENOENT;
 	}

@@ -314,6 +335,20 @@ static int engine_event_init(struct perf_event *event)
 	return 0;
 }
 
+static int engine_event_init(struct perf_event *event)
+{
+	struct drm_i915_private *i915 =
+		container_of(event->pmu, typeof(*i915), pmu.base);
+	struct intel_engine_cs *engine;
+
+	engine = intel_engine_lookup_user(i915, engine_event_class(event),
+					  engine_event_instance(event));
+	if (!engine)
+		return -ENODEV;
+
+	return engine_event_status(engine, engine_event_sample(event));
+}
+
 static int i915_pmu_event_init(struct perf_event *event)
 {
 	struct drm_i915_private *i915 =

@@ -337,30 +372,10 @@ static int i915_pmu_event_init(struct perf_event *event)
 	if (!cpumask_test_cpu(event->cpu, &i915_pmu_cpumask))
 		return -EINVAL;
 
-	if (is_engine_event(event)) {
+	if (is_engine_event(event))
 		ret = engine_event_init(event);
-	} else {
-		ret = 0;
-		switch (event->attr.config) {
-		case I915_PMU_ACTUAL_FREQUENCY:
-			if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
-				 /* Requires a mutex for sampling! */
-				ret = -ENODEV;
-		case I915_PMU_REQUESTED_FREQUENCY:
-			if (INTEL_GEN(i915) < 6)
-				ret = -ENODEV;
-			break;
-		case I915_PMU_INTERRUPTS:
-			break;
-		case I915_PMU_RC6_RESIDENCY:
-			if (!HAS_RC6(i915))
-				ret = -ENODEV;
-			break;
-		default:
-			ret = -ENOENT;
-			break;
-		}
-	}
+	else
+		ret = config_status(i915, event->attr.config);
 	if (ret)
 		return ret;
 

@@ -657,52 +672,9 @@ static ssize_t i915_pmu_event_show(struct device *dev,
 	return sprintf(buf, "config=0x%lx\n", eattr->val);
 }
 
-#define I915_EVENT_ATTR(_name, _config) \
-	(&((struct i915_ext_attribute[]) { \
-		{ .attr = __ATTR(_name, 0444, i915_pmu_event_show, NULL), \
-		  .val = _config, } \
-	})[0].attr.attr)
-
-#define I915_EVENT_STR(_name, _str) \
-	(&((struct perf_pmu_events_attr[]) { \
-		{ .attr	     = __ATTR(_name, 0444, perf_event_sysfs_show, NULL), \
-		  .id	     = 0, \
-		  .event_str = _str, } \
-	})[0].attr.attr)
-
-#define I915_EVENT(_name, _config, _unit) \
-	I915_EVENT_ATTR(_name, _config), \
-	I915_EVENT_STR(_name.unit, _unit)
-
-#define I915_ENGINE_EVENT(_name, _class, _instance, _sample) \
-	I915_EVENT_ATTR(_name, __I915_PMU_ENGINE(_class, _instance, _sample)), \
-	I915_EVENT_STR(_name.unit, "ns")
-
-#define I915_ENGINE_EVENTS(_name, _class, _instance) \
-	I915_ENGINE_EVENT(_name##_instance-busy, _class, _instance, I915_SAMPLE_BUSY), \
-	I915_ENGINE_EVENT(_name##_instance-sema, _class, _instance, I915_SAMPLE_SEMA), \
-	I915_ENGINE_EVENT(_name##_instance-wait, _class, _instance, I915_SAMPLE_WAIT)
-
-static struct attribute *i915_pmu_events_attrs[] = {
-	I915_ENGINE_EVENTS(rcs, I915_ENGINE_CLASS_RENDER, 0),
-	I915_ENGINE_EVENTS(bcs, I915_ENGINE_CLASS_COPY, 0),
-	I915_ENGINE_EVENTS(vcs, I915_ENGINE_CLASS_VIDEO, 0),
-	I915_ENGINE_EVENTS(vcs, I915_ENGINE_CLASS_VIDEO, 1),
-	I915_ENGINE_EVENTS(vecs, I915_ENGINE_CLASS_VIDEO_ENHANCE, 0),
-
-	I915_EVENT(actual-frequency,    I915_PMU_ACTUAL_FREQUENCY,    "MHz"),
-	I915_EVENT(requested-frequency, I915_PMU_REQUESTED_FREQUENCY, "MHz"),
-
-	I915_EVENT_ATTR(interrupts, I915_PMU_INTERRUPTS),
-
-	I915_EVENT(rc6-residency,   I915_PMU_RC6_RESIDENCY,   "ns"),
-
-	NULL,
-};
-
-static const struct attribute_group i915_pmu_events_attr_group = {
+static struct attribute_group i915_pmu_events_attr_group = {
 	.name = "events",
-	.attrs = i915_pmu_events_attrs,
+	/* Patch in attrs at runtime. */
 };
 
 static ssize_t

@@ -720,7 +692,7 @@ static struct attribute *i915_cpumask_attrs[] = {
 	NULL,
 };
 
-static struct attribute_group i915_pmu_cpumask_attr_group = {
+static const struct attribute_group i915_pmu_cpumask_attr_group = {
 	.attrs = i915_cpumask_attrs,
 };
 

@@ -731,6 +703,191 @@ static const struct attribute_group *i915_pmu_attr_groups[] = {
 	NULL
 };
 
+#define __event(__config, __name, __unit) \
+{ \
+	.config = (__config), \
+	.name = (__name), \
+	.unit = (__unit), \
+}
+
+#define __engine_event(__sample, __name) \
+{ \
+	.sample = (__sample), \
+	.name = (__name), \
+}
+
+static struct i915_ext_attribute *
+add_i915_attr(struct i915_ext_attribute *attr, const char *name, u64 config)
+{
+	attr->attr.attr.name = name;
+	attr->attr.attr.mode = 0444;
+	attr->attr.show = i915_pmu_event_show;
+	attr->val = config;
+
+	return ++attr;
+}
+
+static struct perf_pmu_events_attr *
+add_pmu_attr(struct perf_pmu_events_attr *attr, const char *name,
+	     const char *str)
+{
+	attr->attr.attr.name = name;
+	attr->attr.attr.mode = 0444;
+	attr->attr.show = perf_event_sysfs_show;
+	attr->event_str = str;
+
+	return ++attr;
+}
+
+static struct attribute **
+create_event_attributes(struct drm_i915_private *i915)
+{
+	static const struct {
+		u64 config;
+		const char *name;
+		const char *unit;
+	} events[] = {
+		__event(I915_PMU_ACTUAL_FREQUENCY, "actual-frequency", "MHz"),
+		__event(I915_PMU_REQUESTED_FREQUENCY, "requested-frequency", "MHz"),
+		__event(I915_PMU_INTERRUPTS, "interrupts", NULL),
+		__event(I915_PMU_RC6_RESIDENCY, "rc6-residency", "ns"),
+	};
+	static const struct {
+		enum drm_i915_pmu_engine_sample sample;
+		char *name;
+	} engine_events[] = {
+		__engine_event(I915_SAMPLE_BUSY, "busy"),
+		__engine_event(I915_SAMPLE_SEMA, "sema"),
+		__engine_event(I915_SAMPLE_WAIT, "wait"),
+	};
+	unsigned int count = 0;
+	struct perf_pmu_events_attr *pmu_attr = NULL, *pmu_iter;
+	struct i915_ext_attribute *i915_attr = NULL, *i915_iter;
+	struct attribute **attr = NULL, **attr_iter;
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+	unsigned int i;
+
+	/* Count how many counters we will be exposing. */
+	for (i = 0; i < ARRAY_SIZE(events); i++) {
+		if (!config_status(i915, events[i].config))
+			count++;
+	}
+
+	for_each_engine(engine, i915, id) {
+		for (i = 0; i < ARRAY_SIZE(engine_events); i++) {
+			if (!engine_event_status(engine,
+						 engine_events[i].sample))
+				count++;
+		}
+	}
+
+	/* Allocate attribute objects and table. */
+	i915_attr = kzalloc(count * sizeof(*i915_attr), GFP_KERNEL);
+	if (!i915_attr)
+		goto err_alloc;
+
+	pmu_attr = kzalloc(count * sizeof(*pmu_attr), GFP_KERNEL);
+	if (!pmu_attr)
+		goto err_alloc;
+
+	/* Max one pointer of each attribute type plus a termination entry. */
+	attr = kzalloc((count * 2 + 1) * sizeof(attr), GFP_KERNEL);
+	if (!attr)
+		goto err_alloc;
+
+	i915_iter = i915_attr;
+	pmu_iter = pmu_attr;
+	attr_iter = attr;
+
+	/* Initialize supported non-engine counters. */
+	for (i = 0; i < ARRAY_SIZE(events); i++) {
+		char *str;
+
+		if (config_status(i915, events[i].config))
+			continue;
+
+		str = kstrdup(events[i].name, GFP_KERNEL);
+		if (!str)
+			goto err;
+
+		*attr_iter++ = &i915_iter->attr.attr;
+		i915_iter = add_i915_attr(i915_iter, str, events[i].config);
+
+		if (events[i].unit) {
+			str = kasprintf(GFP_KERNEL, "%s.unit", events[i].name);
+			if (!str)
+				goto err;
+
+			*attr_iter++ = &pmu_iter->attr.attr;
+			pmu_iter = add_pmu_attr(pmu_iter, str, events[i].unit);
+		}
+	}
+
+	/* Initialize supported engine counters. */
+	for_each_engine(engine, i915, id) {
+		for (i = 0; i < ARRAY_SIZE(engine_events); i++) {
+			char *str;
+
+			if (engine_event_status(engine,
+						engine_events[i].sample))
+				continue;
+
+			str = kasprintf(GFP_KERNEL, "%s-%s",
+					engine->name, engine_events[i].name);
+			if (!str)
+				goto err;
+
+			*attr_iter++ = &i915_iter->attr.attr;
+			i915_iter =
+				add_i915_attr(i915_iter, str,
+					      __I915_PMU_ENGINE(engine->class,
+								engine->instance,
+								engine_events[i].sample));
+
+			str = kasprintf(GFP_KERNEL, "%s-%s.unit",
+					engine->name, engine_events[i].name);
+			if (!str)
+				goto err;
+
+			*attr_iter++ = &pmu_iter->attr.attr;
+			pmu_iter = add_pmu_attr(pmu_iter, str, "ns");
+		}
+	}
+
+	i915->pmu.i915_attr = i915_attr;
+	i915->pmu.pmu_attr = pmu_attr;
+
+	return attr;
+
+err:;
+	for (attr_iter = attr; *attr_iter; attr_iter++)
+		kfree((*attr_iter)->name);
+
+err_alloc:
+	kfree(attr);
+	kfree(i915_attr);
+	kfree(pmu_attr);
+
+	return NULL;
+}
+
+static void free_event_attributes(struct drm_i915_private *i915)
+{
+	struct attribute **attr_iter = i915_pmu_events_attr_group.attrs;
+
+	for (; *attr_iter; attr_iter++)
+		kfree((*attr_iter)->name);
+
+	kfree(i915_pmu_events_attr_group.attrs);
+	kfree(i915->pmu.i915_attr);
+	kfree(i915->pmu.pmu_attr);
+
+	i915_pmu_events_attr_group.attrs = NULL;
+	i915->pmu.i915_attr = NULL;
+	i915->pmu.pmu_attr = NULL;
+}
+
 static int i915_pmu_cpu_online(unsigned int cpu, struct hlist_node *node)
 {
 	struct i915_pmu *pmu = hlist_entry_safe(node, typeof(*pmu), node);

@@ -806,6 +963,12 @@ void i915_pmu_register(struct drm_i915_private *i915)
 		return;
 	}
 
+	i915_pmu_events_attr_group.attrs = create_event_attributes(i915);
+	if (!i915_pmu_events_attr_group.attrs) {
+		ret = -ENOMEM;
+		goto err;
+	}
+
 	i915->pmu.base.attr_groups	= i915_pmu_attr_groups;
 	i915->pmu.base.task_ctx_nr	= perf_invalid_context;
 	i915->pmu.base.event_init	= i915_pmu_event_init;

@@ -838,6 +1001,7 @@ void i915_pmu_register(struct drm_i915_private *i915)
 	perf_pmu_unregister(&i915->pmu.base);
 err:
 	i915->pmu.base.event_init = NULL;
+	free_event_attributes(i915);
 	DRM_NOTE("Failed to register PMU! (err=%d)\n", ret);
 }
 

@@ -862,4 +1026,5 @@ void i915_pmu_unregister(struct drm_i915_private *i915)
 
 	perf_pmu_unregister(&i915->pmu.base);
 	i915->pmu.base.event_init = NULL;
+	free_event_attributes(i915);
 }
drivers/gpu/drm/i915/i915_pmu.h +8 -0
index 40c154d13565..5a2e013a56bb 100644
@@ -94,6 +94,14 @@ struct i915_pmu {
 	 * struct intel_engine_cs.
 	 */
 	struct i915_pmu_sample sample[__I915_NUM_PMU_SAMPLERS];
+	/**
+	 * @i915_attr: Memory block holding device attributes.
+	 */
+	void *i915_attr;
+	/**
+	 * @pmu_attr: Memory block holding device attributes.
+	 */
+	void *pmu_attr;
 };
 
 #ifdef CONFIG_PERF_EVENTS
Signature · 6 lines
2.14.1

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CI
#8 lore raw

✓ Fi.CI.BAT: success for drm/i915/pmu: Only enumerate available counters in sysfs (rev2)

In reply to Tvrtko Ursulin
== Series Details ==

== Series Details ==

Series: drm/i915/pmu: Only enumerate available counters in sysfs (rev2)
URL : https://patchwork.freedesktop.org/series/35689/
State : success

== Summary ==

Series 35689v2 drm/i915/pmu: Only enumerate available counters in sysfs
https://patchwork.freedesktop.org/api/1.0/series/35689/revisions/2/mbox/

Test debugfs_test:

        Subgroup read_all_entries:
                dmesg-warn -> DMESG-FAIL (fi-elk-e7500) fdo#103989
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                pass       -> DMESG-WARN (fi-kbl-r) fdo#104172 +1
        Subgroup suspend-read-crc-pipe-b:
                pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713

fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989
fdo#104172 https://bugs.freedesktop.org/show_bug.cgi?id=104172
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:414s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:421s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:360s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:443s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:260s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:454s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:468s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:424s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:422s
fi-elk-e7500     total:224  pass:168  dwarn:9   dfail:1   fail:0   skip:45 
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:248s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:494s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:380s
fi-hsw-4770r     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:389s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:397s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:442s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:399s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:456s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:488s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:443s
fi-kbl-r         total:288  pass:260  dwarn:1   dfail:0   fail:0   skip:27  time:496s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:485s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:415s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:496s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:518s
fi-skl-6700k2    total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:479s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:460s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:422s
fi-snb-2520m     total:245  pass:211  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:388s
Blacklisted hosts:
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:566s
fi-cnl-y2        total:288  pass:258  dwarn:3   dfail:0   fail:0   skip:27  time:540s
fi-glk-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:449s

a61df6f884c6f1d0b006f1701d526dfdc57c0e7e drm-tip: 2018y-01m-09d-11h-23m-09s UTC integration manifest dd3acf2c434d drm/i915/pmu: Only enumerate available counters in sysfs

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7629/issues.html
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

CI
#9 lore raw

✓ Fi.CI.BAT: success for drm/i915/pmu: Only enumerate available counters in sysfs (rev3)

In reply to Tvrtko Ursulin
== Series Details ==

== Series Details ==

Series: drm/i915/pmu: Only enumerate available counters in sysfs (rev3)
URL : https://patchwork.freedesktop.org/series/35689/
State : success

== Summary ==

Series 35689v3 drm/i915/pmu: Only enumerate available counters in sysfs
https://patchwork.freedesktop.org/api/1.0/series/35689/revisions/3/mbox/

Test debugfs_test:

        Subgroup read_all_entries:
                dmesg-warn -> DMESG-FAIL (fi-elk-e7500) fdo#103989 +1
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                pass       -> DMESG-WARN (fi-kbl-r) fdo#104172 +1
        Subgroup suspend-read-crc-pipe-b:
                pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713

fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989
fdo#104172 https://bugs.freedesktop.org/show_bug.cgi?id=104172
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:414s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:413s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:357s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:444s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:262s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:463s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:464s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:426s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:421s
fi-cnl-y2        total:288  pass:258  dwarn:3   dfail:0   fail:0   skip:27  time:556s
fi-elk-e7500     total:224  pass:168  dwarn:9   dfail:1   fail:0   skip:45 
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:247s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:493s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:379s
fi-hsw-4770r     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:388s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:395s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:445s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:408s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:459s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:490s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:441s
fi-kbl-r         total:288  pass:260  dwarn:1   dfail:0   fail:0   skip:27  time:492s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:481s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:415s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:499s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:517s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:478s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:465s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:419s
fi-snb-2520m     total:245  pass:211  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:386s
Blacklisted hosts:
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:554s
fi-glk-dsi       total:288  pass:189  dwarn:1   dfail:4   fail:0   skip:94  time:382s

7b72161536aa58d5d20f7d1e15d24884374f5d10 drm-tip: 2018y-01m-10d-19h-08m-42s UTC integration manifest 0d4c6f0e843e drm/i915/pmu: Only enumerate available counters in sysfs

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7648/issues.html
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

#10 lore raw

Re: ✓ Fi.CI.BAT: success for drm/i915/pmu: Only enumerate available counters in sysfs (rev3)

Quoted 59 lines · Patchwork

== Series Details ==

Series: drm/i915/pmu: Only enumerate available counters in sysfs (rev3)
URL : https://patchwork.freedesktop.org/series/35689/
State : success

== Summary ==

Series 35689v3 drm/i915/pmu: Only enumerate available counters in sysfs
https://patchwork.freedesktop.org/api/1.0/series/35689/revisions/3/mbox/

Test debugfs_test:

         Subgroup read_all_entries:
                 dmesg-warn -> DMESG-FAIL (fi-elk-e7500) fdo#103989 +1
Test kms_pipe_crc_basic:
         Subgroup suspend-read-crc-pipe-a:
                 pass       -> DMESG-WARN (fi-kbl-r) fdo#104172 +1
         Subgroup suspend-read-crc-pipe-b:
                 pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713

fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989
fdo#104172 https://bugs.freedesktop.org/show_bug.cgi?id=104172
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:414s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:413s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:357s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:444s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:262s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:463s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:464s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:426s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:421s
fi-cnl-y2        total:288  pass:258  dwarn:3   dfail:0   fail:0   skip:27  time:556s
fi-elk-e7500     total:224  pass:168  dwarn:9   dfail:1   fail:0   skip:45
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:247s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:493s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:379s
fi-hsw-4770r     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:388s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:395s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:445s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:408s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:459s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:490s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:441s
fi-kbl-r         total:288  pass:260  dwarn:1   dfail:0   fail:0   skip:27  time:492s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:481s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:415s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:499s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:517s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:478s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:465s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:419s
fi-snb-2520m     total:245  pass:211  dwarn:0   dfail:0   fail:0   skip:33
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:386s
Blacklisted hosts:
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:554s
fi-glk-dsi       total:288  pass:189  dwarn:1   dfail:4   fail:0   skip:94  time:382s
Quoted 2 lines

7b72161536aa58d5d20f7d1e15d24884374f5d10 drm-tip: 2018y-01m-10d-19h-08m-42s UTC integration manifest 0d4c6f0e843e drm/i915/pmu: Only enumerate available counters in sysfs

Pushed, thanks for the review!

Regards,

Tvrtko

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