STM32: Remove STMMAC clock setup from board
Subsystems (3)
v2 cover STM32: Remove STMMAC clock setup from board
From: Patrice Chotard <[email protected]>
As STMMAC designware driver is now able to get and enable STMMAC clocks, we can remove code related to STMMAC clock setup in board and in clk_stm32f driver.
Set SYSCFG clock directly in configure_clocks()
Add missing STMMAC clocks in stm32f746 dts file.
v2: _ patch 3: update commit message and add missing compilation flag.
Patrice Chotard (3):
ARM: dts: stm32: Add STMMAC clocks for stm32f746
clk: clk_stm32f: Remove STMMAC clock setup
clk: clk_stm32f: Move SYSCFG clock setup into configure_clocks()
arch/arm/dts/stm32f746.dtsi | 3 +++ arch/arm/include/asm/arch-stm32f7/stm32_periph.h | 2 -- board/st/stm32f746-disco/stm32f746-disco.c | 20 ++++++-------------- drivers/clk/clk_stm32f.c | 18 ++++++------------ 4 files changed, 15 insertions(+), 28 deletions(-)
Signature · 1 line
1.9.1
PATCH v2 1/3 ARM: dts: stm32: Add STMMAC clocks for stm32f746
From: Patrice Chotard <[email protected]>
Add ETHMAC, ETHMACRX and ETHMACTX clocks for STMMAC.
---
v2: _ add Reviewed-by
arch/arm/dts/stm32f746.dtsi | 3 +++ 1 file changed, 3 insertions(+)
arch/arm/dts/stm32f746.dtsi +3 -0
@@ -65,6 +65,9 @@ compatible = "st,stm32-dwmac"; reg = <0x40028000 0x8000>; reg-names = "stmmaceth"; + clocks = <&rcc 0 STM32F7_AHB1_CLOCK(ETHMAC)>, + <&rcc 0 STM32F7_AHB1_CLOCK(ETHMACTX)>, + <&rcc 0 STM32F7_AHB1_CLOCK(ETHMACRX)>; interrupts = <61>, <62>; interrupt-names = "macirq", "eth_wake_irq"; snps,pbl = <8>;
Signature · 1 line
1.9.1
PATCH v2 1/3 ARM: dts: stm32: Add STMMAC clocks for stm32f746
Quoted 6 lines · patrice.chotard at st.com
From: Patrice Chotard <[email protected]>
Add ETHMAC, ETHMACRX and ETHMACTX clocks for STMMAC.
Signed-off-by Patrice Chotard <[email protected]>Reviewed-by Vikas Manocha <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v2 2/3 clk: clk_stm32f: Remove STMMAC clock setup
In reply to patrice.chotard at st.comFrom: Patrice Chotard <[email protected]>
Thanks to 'commit ba1f96672522 ("net: designware: add clock support")' we don't need anymore to setup the STMMAC clock in board.
---
v2: _ add Reviewed-by
arch/arm/include/asm/arch-stm32f7/stm32_periph.h | 1 - board/st/stm32f746-disco/stm32f746-disco.c | 1 - drivers/clk/clk_stm32f.c | 6 ------ 3 files changed, 8 deletions(-)
arch/arm/include/asm/arch-stm32f7/stm32_periph.h +0 -1
@@ -23,7 +23,6 @@ enum periph_id {enum periph_clock {SYSCFG_CLOCK_CFG ,TIMER2_CLOCK_CFG , -STMMAC_CLOCK_CFG , };#endif /* __ASM_ARM_ARCH_PERIPH_H */
board/st/stm32f746-disco/stm32f746-disco.c +0 -1
@@ -75,7 +75,6 @@ static int stmmac_setup(void)clock_setup (SYSCFG_CLOCK_CFG );/* Set >RMII mode */ STM32_SYSCFG ->pmc |=SYSCFG_PMC_MII_RMII_SEL ; -clock_setup (STMMAC_CLOCK_CFG );return 0 ; }
drivers/clk/clk_stm32f.c +0 -6
@@ -90,7 +90,6 @@enum periph_clock {SYSCFG_CLOCK_CFG ,TIMER2_CLOCK_CFG , -STMMAC_CLOCK_CFG , };struct stm32_clk_info stm32f4_clk_info = {
@@ -359,11 +358,6 @@ void clock_setup(int peripheral)case TIMER2_CLOCK_CFG :setbits_le32 (&STM32_RCC ->apb1enr,RCC_APB1ENR_TIM2EN );break ; -case STMMAC_CLOCK_CFG : -setbits_le32 (&STM32_RCC ->ahb1enr,RCC_AHB1ENR_ETHMAC_EN ); -setbits_le32 (&STM32_RCC ->ahb1enr,RCC_AHB1ENR_ETHMAC_RX_EN ); -setbits_le32 (&STM32_RCC ->ahb1enr,RCC_AHB1ENR_ETHMAC_TX_EN ); -break ;default :break ; }
Signature · 1 line
1.9.1
PATCH v2 2/3 clk: clk_stm32f: Remove STMMAC clock setup
Quoted 7 lines · patrice.chotard at st.com
From: Patrice Chotard <[email protected]>
Thanks to 'commit
ba1f96672522("net: designware: add clock support")' we don't need anymore to setup the STMMAC clock in board.Signed-off-by Patrice Chotard <[email protected]>Reviewed-by Vikas Manocha <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v2 3/3 clk: clk_stm32f: Move SYSCFG clock setup into configure_clocks()
In reply to patrice.chotard at st.comFrom: Patrice Chotard <[email protected]>
Move SYSCFG clock setup into configure_clocks() instead of calling clock_setup() from board file.
As this clock is only needed in case of ethernet enabled and as both stm32f4 and stm32f7 are using the Designware ethernet IP, we use CONFIG_ETH_DESIGNWARE to only enable this clock if needed.
Move the RMII setup from board_early_init_f() to board_init() to insure that RMII bit is set only when clock driver is initialized.
---
v2: _ update commit message to explain the usage of CONFIG_ETH_DESIGNWARE
flag.
_ add missing CONFIG_ETH_DESIGNWARE compilation flag to enable SYSCFG
clock only if ETH_DESIGNWARE is enabled on running board.
arch/arm/include/asm/arch-stm32f7/stm32_periph.h | 1 - board/st/stm32f746-disco/stm32f746-disco.c | 19 ++++++------------- drivers/clk/clk_stm32f.c | 12 ++++++------ 3 files changed, 12 insertions(+), 20 deletions(-)
arch/arm/include/asm/arch-stm32f7/stm32_periph.h +0 -1
@@ -21,7 +21,6 @@ enum periph_id { };enum periph_clock { -SYSCFG_CLOCK_CFG ,TIMER2_CLOCK_CFG , };
board/st/stm32f746-disco/stm32f746-disco.c +6 -13
@@ -69,23 +69,10 @@ int dram_init_banksize(void)return 0 ; } -#ifdef CONFIG_ETH_DESIGNWARE -static int stmmac_setup (void ) -{ -clock_setup (SYSCFG_CLOCK_CFG ); -/* Set >RMII mode */ -STM32_SYSCFG ->pmc |=SYSCFG_PMC_MII_RMII_SEL ; - -return 0 ; -} -int board_early_init_f (void ) { -stmmac_setup (); -return 0 ; } -#endif #ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_OS_BOOT
@@ -162,5 +149,11 @@ int board_late_init(void)int board_init (void ) { gd->bd->bi_boot_params = gd->bd->bi_dram[0 ].start +0x100 ; + +#ifdef CONFIG_ETH_DESIGNWARE +/* Set >RMII mode */ +STM32_SYSCFG ->pmc |=SYSCFG_PMC_MII_RMII_SEL ; +#endif +return 0 ; }
drivers/clk/clk_stm32f.c +6 -6
@@ -67,8 +67,6 @@#define RCC_DCKCFGRX_SDMMC1SEL BIT(28)#define RCC_DCKCFGR2_SDMMC2SEL BIT(29) -#define RCC_APB2ENR_SAI1EN BIT(22) -/* * RCC AHB1ENR specific definitions */
@@ -86,9 +84,9 @@* RCC APB2ENR specific definitions */ #define RCC_APB2ENR_SYSCFGEN BIT(14) +#define RCC_APB2ENR_SAI1EN BIT(22)enum periph_clock { -SYSCFG_CLOCK_CFG ,TIMER2_CLOCK_CFG , };
@@ -227,6 +225,11 @@ static int configure_clocks(struct udevice *dev)/* gate the SAI clock, needed for MMC 1&2 clocks */ setbits_le32 (®s->apb2enr,RCC_APB2ENR_SAI1EN ); +#ifdef CONFIG_ETH_DESIGNWARE +/* gate the SYSCFG clock, needed to set RMII ethernet interface */ +setbits_le32 (®s->apb2enr,RCC_APB2ENR_SYSCFGEN ); +#endif +return 0 ; }
@@ -352,9 +355,6 @@ static int stm32_clk_enable(struct clk *clk)void clock_setup (int peripheral) {switch (peripheral) { -case SYSCFG_CLOCK_CFG : -setbits_le32 (&STM32_RCC ->apb2enr,RCC_APB2ENR_SYSCFGEN ); -break ;case TIMER2_CLOCK_CFG :setbits_le32 (&STM32_RCC ->apb1enr,RCC_APB1ENR_TIM2EN );break ;
Signature · 1 line
1.9.1
PATCH v2 3/3 clk: clk_stm32f: Move SYSCFG clock setup into configure_clocks()
Quoted 5 lines · patrice.chotard at st.com
From: Patrice Chotard <[email protected]>
Move SYSCFG clock setup into
configure_clocks()instead of callingclock_setup()from board file.
Quoted 8 lines
As this clock is only needed in case of ethernet enabled and as both stm32f4 and stm32f7 are using the Designware ethernet IP, we use
CONFIG_ETH_DESIGNWAREto only enable this clock if needed.Move the RMII setup from
board_early_init_f()toboard_init()to insure that RMII bit is set only when clock driver is initialized.Signed-off-by Patrice Chotard <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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