arm64: dts: marvell: add CP110 uart peripherals
Subsystems (3)
PATCH 1/2 arm64: dts: marvell: add CP110 uart peripherals
The CP110 component has 4 uart peripherals. All of them use the same clock gate for slow peripherals that is shared with the i2c and spi peripherals.
--- arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 40 +++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)
arch/arm64/boot/dts/marvell/armada-cp110.dtsi +40 -0
@@ -290,6 +290,46 @@ status = "disabled"; }; + CP110_LABEL(uart0): serial at 702000 { + compatible = "snps,dw-apb-uart"; + reg = <0x702000 0x100>; + reg-shift = <2>; + interrupts = <ICU_GRP_NSR 122 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <1>; + clocks = <&CP110_LABEL(clk) 1 21>; + status = "disabled"; + }; + + CP110_LABEL(uart1): serial at 702100 { + compatible = "snps,dw-apb-uart"; + reg = <0x702100 0x100>; + reg-shift = <2>; + interrupts = <ICU_GRP_NSR 123 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <1>; + clocks = <&CP110_LABEL(clk) 1 21>; + status = "disabled"; + }; + + CP110_LABEL(uart2): serial at 702200 { + compatible = "snps,dw-apb-uart"; + reg = <0x702200 0x100>; + reg-shift = <2>; + interrupts = <ICU_GRP_NSR 124 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <1>; + clocks = <&CP110_LABEL(clk) 1 21>; + status = "disabled"; + }; + + CP110_LABEL(uart3): serial at 702300 { + compatible = "snps,dw-apb-uart"; + reg = <0x702300 0x100>; + reg-shift = <2>; + interrupts = <ICU_GRP_NSR 125 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <1>; + clocks = <&CP110_LABEL(clk) 1 21>; + status = "disabled"; + }; + CP110_LABEL(nand): nand at 720000 { /* * Due to the limitation of the pins available
Signature · 1 line
2.15.1
PATCH 2/2 arm64: dts: marvell: mcbin: enable uart headers
Add description of the J25 and J27 UART headers of the Macchiatobin. They use uart peripherals that the CP0 (J25) and CP1 (J27) provides.
--- arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts +20 -0
@@ -163,6 +163,12 @@ }; }; +&cp0_uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&cp0_uart1_pins>; + status = "okay"; +}; + &cp0_mdio { pinctrl-names = "default"; pinctrl-0 = <&cp0_ge_mdio_pins>;
@@ -195,6 +201,10 @@ marvell,pins = "mpp37", "mpp38"; marvell,function = "i2c0"; }; + cp0_uart1_pins: uart1-pins { + marvell,pins = "mpp40", "mpp41"; + marvell,function = "uart1"; + }; cp0_xhci_vbus_pins: xhci0-vbus-pins { marvell,pins = "mpp47"; marvell,function = "gpio";
@@ -290,6 +300,16 @@ marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16"; marvell,function = "spi1"; }; + cp1_uart0_pins: uart0-pins { + marvell,pins = "mpp6", "mpp7"; + marvell,function = "uart0"; + }; +}; + +&cp1_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&cp1_uart0_pins>; + status = "okay"; }; &cp1_sata0 {
Signature · 1 line
2.15.1
PATCH 2/2 arm64: dts: marvell: mcbin: enable uart headers
Hello,
Quoted 4 lines · Baruch Siach
Add description of the J25 and J27 UART headers of the Macchiatobin. They use uart peripherals that the CP0 (J25) and CP1 (J27) provides.
Signed-off-by Baruch Siach <[email protected]>
Thanks. One minor nit below.
Quoted 9 lines
--- arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts +0
-0
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts line 170
Quoted 8 lines
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts +5
-0@@ -163,6 +163,12 @@ }; }; +&cp0_uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&cp0_uart1_pins>; + status = "okay"; +};
It'd be nice to indicate in the DT that this is accessible through J25.
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts line 313
Quoted 5 lines
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts +4
-0+&cp1_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&cp1_uart0_pins>; + status = "okay"; };
And this through J27.
Thanks!
Thomas
Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
Russell King - ARM Linux
maintainerPATCH 2/2 arm64: dts: marvell: mcbin: enable uart headers
In reply to Baruch SiachQuoted 2 lines · Baruch Siach
Add description of the J25 and J27 UART headers of the Macchiatobin. They use uart peripherals that the CP0 (J25) and CP1 (J27) provides.
The headers are just fed with the GPIO-level signals, which means any industry standard usage would require additional RS232 level shifting hardware. So, they're certainly not "generic" serial ports.
While these are labelled up as UARTs, there's no reason to dedicate them as such, they could equally be used to connect to a smart battery/ UPS system as a SMBus port, or even to control system LEDs / read the status of system buttons.
Do you have an application for these headers? If not, it's probably best to leave them alone (until we have DT overlay support sorted to allow boot-loader configuration of hardware such as these - which is being worked on for TI and other boards.)
Signature · 3 lines
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up According to speedtest.net: 8.21Mbps down 510kbps up
PATCH 2/2 arm64: dts: marvell: mcbin: enable uart headers
Hi Russell,
Quoted 13 lines · Russell King - ARM Linux
Quoted 2 lines · Baruch Siach
Add description of the J25 and J27 UART headers of the Macchiatobin. They use uart peripherals that the CP0 (J25) and CP1 (J27) provides.
The headers are just fed with the GPIO-level signals, which means any industry standard usage would require additional RS232 level shifting hardware. So, they're certainly not "generic" serial ports.
While these are labelled up as UARTs, there's no reason to dedicate them as such, they could equally be used to connect to a smart battery/ UPS system as a SMBus port, or even to control system LEDs / read the status of system buttons.
Quoted 4 lines
Do you have an application for these headers? If not, it's probably best to leave them alone (until we have DT overlay support sorted to allow boot-loader configuration of hardware such as these - which is being worked on for TI and other boards.)
The console UART on the FTDI CON9 microUSB is not accessible when the board is mounted on a COTS ATX enclosure. So some users would like UART access through the UART headers.
Would you be fine with this patch when 'status = "okay"' is omitted?
baruch
Signature · 3 lines
http://baruch.siach.name/blog/ ~. .~ Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
- baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -Russell King - ARM Linux
maintainerPATCH 2/2 arm64: dts: marvell: mcbin: enable uart headers
Quoted 16 lines · Baruch Siach
Hi Russell,
Quoted 13 lines · Russell King - ARM Linux
Quoted 2 lines · Baruch Siach
Add description of the J25 and J27 UART headers of the Macchiatobin. They use uart peripherals that the CP0 (J25) and CP1 (J27) provides.
The headers are just fed with the GPIO-level signals, which means any industry standard usage would require additional RS232 level shifting hardware. So, they're certainly not "generic" serial ports.
While these are labelled up as UARTs, there's no reason to dedicate them as such, they could equally be used to connect to a smart battery/ UPS system as a SMBus port, or even to control system LEDs / read the status of system buttons.
Quoted 8 lines
Quoted 4 lines
Do you have an application for these headers? If not, it's probably best to leave them alone (until we have DT overlay support sorted to allow boot-loader configuration of hardware such as these - which is being worked on for TI and other boards.)
The console UART on the FTDI CON9 microUSB is not accessible when the board is mounted on a COTS ATX enclosure. So some users would like UART access through the UART headers.
Please include this information in the commit log.
I'll also point out that the latest board revision also offers a UART header for the standard console port too, so even if the microUSB is not available, the standard console is still usable.
Signature · 3 lines
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up According to speedtest.net: 8.21Mbps down 510kbps up