clk: at91: add usb and plladiv drivers
cover clk: at91: add usb and plladiv drivers
In order to provide the clocks UHP48MHz and UHP12MHz to the USB Host OHCI, add the USB clock and PLLADIV clock driver.
Wenyou Yang (3):
clk: at91: add USB Host clock driver
clk: at91: add PLLADIV driver
clk: at91: clk-system: add set/get_rate operations
arch/arm/mach-at91/include/mach/at91_pmc.h | 6 ++ drivers/clk/at91/Kconfig | 8 ++ drivers/clk/at91/Makefile | 3 +- drivers/clk/at91/clk-plladiv.c | 88 +++++++++++++++++ drivers/clk/at91/clk-system.c | 26 +++++ drivers/clk/at91/clk-usb.c | 146 +++++++++++++++++++++++++++++ 6 files changed, 276 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/at91/clk-plladiv.c create mode 100644 drivers/clk/at91/clk-usb.c
Signature · 1 line
2.16.0.rc1
PATCH 1/3 clk: at91: add USB Host clock driver
Add USB clock driver to configure the input clock and the divider in the PMC_USB register to generate a 48MHz and a 12MHz signal to the USB Host OHCI.
---
arch/arm/mach-at91/include/mach/at91_pmc.h | 6 ++ drivers/clk/at91/Kconfig | 8 ++ drivers/clk/at91/Makefile | 1 + drivers/clk/at91/clk-usb.c | 146 +++++++++++++++++++++++++++++ 4 files changed, 161 insertions(+) create mode 100644 drivers/clk/at91/clk-usb.c
arch/arm/mach-at91/include/mach/at91_pmc.h +6 -0
@@ -233,9 +233,15 @@ typedef struct at91_pmc {#define AT91_PMC_PDIV_1 (0 << 12)#define AT91_PMC_PDIV_2 (1 << 12) +#define AT91_PMC_USB_USBS_MASK 0x1 +#define AT91_PMC_USB_USBS_OFFSET 0 +#define AT91_PMC_USB_USBS_ (x) (x & 0x1)#define AT91_PMC_USBS_USB_PLLA (0x0)/* USB Clock Input is PLLA */ #define AT91_PMC_USBS_USB_UPLL (0x1)/* USB Clock Input is UPLL */ #define AT91_PMC_USBS_USB_PLLB (0x1)/* USB Clock Input is PLLB, AT91SAM9N12 only */ +#define AT91_PMC_USB_DIV_MASK 0xf +#define AT91_PMC_USB_DIV_OFFSET 8 +#define AT91_PMC_USB_DIV_ (x) ((x & 0xf) << 8)#define AT91_PMC_USB_DIV_2 (0x1 << 8)/* USB Clock divided by 2 */ #define AT91_PMC_USBDIV_8 (0x7 << 8)/* USB Clock divided by 8 */ #define AT91_PMC_USBDIV_10 (0x9 << 8)/* USB Clock divided by 10 */
drivers/clk/at91/Kconfig +8 -0
@@ -27,6 +27,14 @@ config AT91_UTMI fast crystal oscillator to meet the frequency accuracy required by USB. +config AT91_USB_CLK + bool "Support USB OHCI Input Clock" + depends on CLK_AT91 + help + This option is used to enable the USB Input Clock, from + the device tree, configure the USBS bit (PLLA or UTMI PLL) + and USBDIV field of the PMC_USB register. + config AT91_H32MX bool "Support H32MX 32-bit Matrix Clock" depends on CLK_AT91
drivers/clk/at91/Makefile +1 -0
@@ -7,5 +7,6 @@ obj-y += clk-slow.o clk-main.o clk-plla.o clk-master.o obj-y += clk-system.o clk-peripheral.o obj-$(CONFIG_AT91_UTMI) += clk-utmi.o +obj-$(CONFIG_AT91_USB_CLK) += clk-usb.o obj-$(CONFIG_AT91_H32MX) += clk-h32mx.o obj-$(CONFIG_AT91_GENERIC_CLK) += clk-generated.o
drivers/clk/at91/clk-usb.c new file +146 -0
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Signature · 1 line
2.16.0.rc1
PATCH 1/3 clk: at91: add USB Host clock driver
Quoted 5 lines · Wenyou Yang
Add USB clock driver to configure the input clock and the divider in the
PMC_USBregister to generate a 48MHz and a 12MHz signal to the USB Host OHCI.Signed-off-by Wenyou Yang <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH 2/3 clk: at91: add PLLADIV driver
In reply to Wenyou YangAs said in the SAMA5D2 datasheet, the PLLA clock must be divided by 2 by writing the PLLADIV2 bit in PMC_MCKR, if the ratio between PCK and MCK is 3 (MDIV = 3). This is the purpose of the driver.
---
drivers/clk/at91/Makefile | 2 +- drivers/clk/at91/clk-plladiv.c | 88 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 89 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/at91/clk-plladiv.c
drivers/clk/at91/Makefile +1 -1
@@ -3,7 +3,7 @@ # obj-y += pmc.o sckc.o -obj-y += clk-slow.o clk-main.o clk-plla.o clk-master.o +obj-y += clk-slow.o clk-main.o clk-plla.o clk-plladiv.o clk-master.o obj-y += clk-system.o clk-peripheral.o obj-$(CONFIG_AT91_UTMI) += clk-utmi.o
drivers/clk/at91/clk-plladiv.c new file +88 -0
88 lines not on this page · raw message
Signature · 1 line
2.16.0.rc1
PATCH 2/3 clk: at91: add PLLADIV driver
Quoted 5 lines · Wenyou Yang
As said in the SAMA5D2 datasheet, the PLLA clock must be divided by 2 by writing the PLLADIV2 bit in
PMC_MCKR, if the ratio between PCK and MCK is 3 (MDIV = 3). This is the purpose of the driver.Signed-off-by Wenyou Yang <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH 3/3 clk: at91: clk-system: add set/get_rate operations
In reply to Wenyou YangTo support set/get the clock rate, add set/get_rate operations.
---
drivers/clk/at91/clk-system.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+)
drivers/clk/at91/clk-system.c +26 -0
@@ -44,6 +44,30 @@ static inline int is_pck(int id)return (id >=8 ) && (id <=15 ); } +static ulong system_clk_get_rate (struct clk *clk) +{ +struct clk clk_dev; +int ret; + + ret =clk_get_by_index (clk->dev,0 , &clk_dev); +if (ret) +return -EINVAL ; + +return clk_get_rate (&clk_dev); +} + +static ulong system_clk_set_rate (struct clk *clk,ulong rate) +{ +struct clk clk_dev; +int ret; + + ret =clk_get_by_index (clk->dev,0 , &clk_dev); +if (ret) +return -EINVAL ; + +return clk_set_rate (&clk_dev, rate); +} +static int system_clk_enable (struct clk *clk) {struct pmc_platdata *plat =dev_get_platdata (clk->dev);
@@ -73,6 +97,8 @@ static int system_clk_enable(struct clk *clk)static struct clk_ops system_clk_ops = { .of_xlate = at91_clk_of_xlate, + .get_rate = system_clk_get_rate, + .set_rate = system_clk_set_rate, .enable = system_clk_enable, };
Signature · 1 line
2.16.0.rc1
PATCH 3/3 clk: at91: clk-system: add set/get_rate operations
Quoted 3 lines · Wenyou Yang
To support set/get the clock rate, add set/get_rate operations.
Signed-off-by Wenyou Yang <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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cover clk: at91: add usb and plladiv drivers
In reply to Wenyou YangHi,
Do you have any comments?
Quoted 16 lines · Wenyou Yang
In order to provide the clocks UHP48MHz and UHP12MHz to the USB Host OHCI, add the USB clock and PLLADIV clock driver.
Wenyou Yang (3):
clk: at91: add USB Host clock driver
clk: at91: add PLLADIV driver
clk: at91: clk-system: add set/get_rate operationsarch/arm/mach-at91/include/mach/at91_pmc.h | 6 ++ drivers/clk/at91/Kconfig | 8 ++ drivers/clk/at91/Makefile | 3 +- drivers/clk/at91/clk-plladiv.c | 88 +++++++++++++++++ drivers/clk/at91/clk-system.c | 26 +++++ drivers/clk/at91/clk-usb.c | 146 +++++++++++++++++++++++++++++ 6 files changed, 276 insertions(+), 1 deletion(-)
Quoted 3 lines
create mode 100644
drivers/clk/at91/clk-plladiv.ccreate mode 100644drivers/clk/at91/clk-usb.c
Best Regards,
Wenyou Yang