x86/mce: Save microcode revision in machine check records

PATCH In review Tony Luck 3 participants 5 messages Mar 1, 2018 – Mar 8, 2018

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x86 EDAC-core

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Tony Luck

author maintainer

2018-03-01 23:34 UTC #0 lore raw

PATCH 1/1 x86/mce: Save microcode revision in machine check records

Updating microcode used to be relatively rare. Now that it has become more common we should save the microcode version in a machine check record to make sure that those people looking at the error have this important information bundled with the rest of the logged information.

Signed-off-by Tony Luck <[email protected]>

---
 arch/x86/include/uapi/asm/mce.h  | 1 +
 arch/x86/kernel/cpu/mcheck/mce.c | 5 +++++
 2 files changed, 6 insertions(+)

arch/x86/include/uapi/asm/mce.h +1 -0

index 91723461dc1f..435db58a7bad 100644
@@ -30,6 +30,7 @@ struct mce {
 	__u64 synd;	/* MCA_SYND MSR: only valid on SMCA systems */
 	__u64 ipid;	/* MCA_IPID MSR: only valid on SMCA systems */
 	__u64 ppin;	/* Protected Processor Inventory Number */
+	__u32 microcode;/* Microcode revision */
 };
 
 #define MCE_GET_RECORD_LEN   _IOR('M', 1, int)

arch/x86/kernel/cpu/mcheck/mce.c +5 -0

index 8ff94d1e2dce..b9403c446e05 100644
@@ -118,6 +118,8 @@ BLOCKING_NOTIFIER_HEAD(x86_mce_decoder_chain);
 /* Do initial initialization of a struct mce */
 void mce_setup(struct mce *m)
 {
+	struct cpuinfo_x86 *c;
+
 	memset(m, 0, sizeof(struct mce));
 	m->cpu = m->extcpu = smp_processor_id();
 	/* We hope get_seconds stays lockless */

@@ -130,6 +132,9 @@ void mce_setup(struct mce *m)
 
 	if (this_cpu_has(X86_FEATURE_INTEL_PPIN))
 		rdmsrl(MSR_PPIN, m->ppin);
+
+	c = &cpu_data(m->cpu);
+	m->microcode = c->microcode;
 }
 
 DEFINE_PER_CPU(struct mce, injectm);

Luck, Tony

author maintainer

2018-03-01 23:40 UTC #1 lore raw

+ c = &cpu_data(m->cpu);

Bother. Breaks on systems with >255 cpus because "cpu" is __u8.

s/m->cpu/m->extcpu/

-Tony
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Borislav Petkov

maintainer

2018-03-02 11:45 UTC #2 lore raw

Quoted 3 lines · Tony

(quoted diff) +1 -0
+	c = &cpu_data(m->cpu);
Bother. Breaks on systems with >255 cpus because "cpu" is __u8.

No worries, I committed an even better version:
---
From: Tony Luck <[email protected]>
Date: Thu, 1 Mar 2018 15:34:49 -0800
Subject: [PATCH] x86/MCE: Save microcode revision in machine check records

Signed-off-by Tony Luck <[email protected]>

Cc Yazen Ghannam <[email protected]>

Cc linux-edac <[email protected]>

Cc x86-ml <[email protected]>

Link http://lkml.kernel.org/r/[email protected] open here

[ Simplify a bit. ]

Signed-off-by Borislav Petkov <[email protected]>

---
 arch/x86/include/uapi/asm/mce.h  | 1 +
 arch/x86/kernel/cpu/mcheck/mce.c | 4 +++-
 2 files changed, 4 insertions(+), 1 deletion(-)

arch/x86/include/uapi/asm/mce.h +1 -0

index 91723461dc1f..435db58a7bad 100644
@@ -30,6 +30,7 @@ struct mce {
 	__u64 synd;	/* MCA_SYND MSR: only valid on SMCA systems */
 	__u64 ipid;	/* MCA_IPID MSR: only valid on SMCA systems */
 	__u64 ppin;	/* Protected Processor Inventory Number */
+	__u32 microcode;/* Microcode revision */
 };
 
 #define MCE_GET_RECORD_LEN   _IOR('M', 1, int)

arch/x86/kernel/cpu/mcheck/mce.c +3 -1

index 3c9a25b93538..181f6cf25895 100644
@@ -130,6 +130,8 @@ void mce_setup(struct mce *m)
 
 	if (this_cpu_has(X86_FEATURE_INTEL_PPIN))
 		rdmsrl(MSR_PPIN, m->ppin);
+
+	m->microcode = boot_cpu_data.microcode;
 }
 
 DEFINE_PER_CPU(struct mce, injectm);

@@ -262,7 +264,7 @@ static void __print_mce(struct mce *m)
 	 */
 	pr_emerg(HW_ERR "PROCESSOR %u:%x TIME %llu SOCKET %u APIC %x microcode %x\n",
 		m->cpuvendor, m->cpuid, m->time, m->socketid, m->apicid,
-		cpu_data(m->extcpu).microcode);
+		m->microcode);
 }
 
 static void print_mce(struct mce *m)

Borislav Petkov

maintainer

2018-03-02 12:03 UTC #3 lore raw

PATCH 1/1 x86/MCE: Cleanup and complete struct mce fields definitions

Ontop:
---
From: Borislav Petkov <[email protected]>

Struct is part of the uapi, document all fields properly and fix formatting.

No functionality change.

Signed-off-by Borislav Petkov <[email protected]>

---
 arch/x86/include/uapi/asm/mce.h | 46 ++++++++++++++++++++---------------------
 1 file changed, 23 insertions(+), 23 deletions(-)

arch/x86/include/uapi/asm/mce.h +23 ~~-23~~

index 435db58a7bad..15ba7802531b 100644
@@ -7,30 +7,30 @@
 
 /* Fields are zero when not available */
 struct mce {
-	__u64 status;
-	__u64 misc;
-	__u64 addr;
-	__u64 mcgstatus;
-	__u64 ip;
-	__u64 tsc;	/* cpu time stamp counter */
-	__u64 time;	/* wall time_t when error was detected */
-	__u8  cpuvendor;	/* cpu vendor as encoded in system.h */
-	__u8  inject_flags;	/* software inject flags */
-	__u8  severity;
+	__u64 status;		/* Bank's MCi_STATUS MSR */
+	__u64 misc;		/* Bank's MCi_MISC MSR */
+	__u64 addr;		/* Bank's MCi_ADDR MSR */
+	__u64 mcgstatus;	/* Machine Check Global Status MSR */
+	__u64 ip;		/* Instruction Pointer when the error happened. */
+	__u64 tsc;		/* CPU time stamp counter */
+	__u64 time;		/* Wall time_t when error was detected */
+	__u8  cpuvendor;	/* Kernel's X86_VENDOR enum */
+	__u8  inject_flags;	/* Software inject flags */
+	__u8  severity;		/* Error severity */
 	__u8  pad;
-	__u32 cpuid;	/* CPUID 1 EAX */
-	__u8  cs;		/* code segment */
-	__u8  bank;	/* machine check bank */
-	__u8  cpu;	/* cpu number; obsolete; use extcpu now */
-	__u8  finished;   /* entry is valid */
-	__u32 extcpu;	/* linux cpu number that detected the error */
-	__u32 socketid;	/* CPU socket ID */
-	__u32 apicid;	/* CPU initial apic ID */
-	__u64 mcgcap;	/* MCGCAP MSR: machine check capabilities of CPU */
-	__u64 synd;	/* MCA_SYND MSR: only valid on SMCA systems */
-	__u64 ipid;	/* MCA_IPID MSR: only valid on SMCA systems */
-	__u64 ppin;	/* Protected Processor Inventory Number */
-	__u32 microcode;/* Microcode revision */
+	__u32 cpuid;		/* CPUID 1 EAX */
+	__u8  cs;		/* Code segment */
+	__u8  bank;		/* Machine check bank reporting the error */
+	__u8  cpu;		/* CPU number; obsoleted by extcpu */
+	__u8  finished;		/* Entry is valid */
+	__u32 extcpu;		/* Linux CPU number that detected the error */
+	__u32 socketid;		/* CPU socket ID */
+	__u32 apicid;		/* CPU initial APIC ID */
+	__u64 mcgcap;		/* MCGCAP MSR: machine check capabilities of CPU */
+	__u64 synd;		/* MCA_SYND MSR: only valid on SMCA systems */
+	__u64 ipid;		/* MCA_IPID MSR: only valid on SMCA systems */
+	__u64 ppin;		/* Protected Processor Inventory Number */
+	__u32 microcode;	/* Microcode revision */
 };
 
 #define MCE_GET_RECORD_LEN   _IOR('M', 1, int)

tip-bot for Tony Luck

merge bot

2018-03-08 14:39 UTC #4 lore raw

[tip:ras/urgent] x86/MCE: Save microcode revision in machine check records

In reply to Tony Luck

x86/MCE: Save microcode revision in machine check records

Commit-ID:  fa94d0c6e0f3431523f5701084d799c77c7d4a4f
Gitweb:     https://git.kernel.org/tip/fa94d0c6e0f3431523f5701084d799c77c7d4a4f
Author:     Tony Luck <[email protected]>
AuthorDate: Tue, 6 Mar 2018 15:21:41 +0100
Committer:  Thomas Gleixner <[email protected]>
CommitDate: Thu, 8 Mar 2018 15:34:49 +0100

x86/MCE: Save microcode revision in machine check records

[ Borislav: Simplify a bit. ]

Signed-off-by Tony Luck <[email protected]>

Signed-off-by Borislav Petkov <[email protected]>

Signed-off-by Thomas Gleixner <[email protected]>

Cc Yazen Ghannam <[email protected]>

Cc linux-edac <[email protected]>

Cc [email protected]

Link http://lkml.kernel.org/r/[email protected] open here

---
 arch/x86/include/uapi/asm/mce.h  | 1 +
 arch/x86/kernel/cpu/mcheck/mce.c | 4 +++-
 2 files changed, 4 insertions(+), 1 deletion(-)

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arch/x86/include/uapi/asm/mce.h +1 -0

index 91723461dc1f..435db58a7bad 100644
@@ -30,6 +30,7 @@ struct mce {
 	__u64 synd;	/* MCA_SYND MSR: only valid on SMCA systems */
 	__u64 ipid;	/* MCA_IPID MSR: only valid on SMCA systems */
 	__u64 ppin;	/* Protected Processor Inventory Number */
+	__u32 microcode;/* Microcode revision */
 };
 
 #define MCE_GET_RECORD_LEN   _IOR('M', 1, int)

arch/x86/kernel/cpu/mcheck/mce.c +3 -1

index 8ff94d1e2dce..b3323cab9139 100644
@@ -130,6 +130,8 @@ void mce_setup(struct mce *m)
 
 	if (this_cpu_has(X86_FEATURE_INTEL_PPIN))
 		rdmsrl(MSR_PPIN, m->ppin);
+
+	m->microcode = boot_cpu_data.microcode;
 }
 
 DEFINE_PER_CPU(struct mce, injectm);

@@ -262,7 +264,7 @@ static void __print_mce(struct mce *m)
 	 */
 	pr_emerg(HW_ERR "PROCESSOR %u:%x TIME %llu SOCKET %u APIC %x microcode %x\n",
 		m->cpuvendor, m->cpuid, m->time, m->socketid, m->apicid,
-		cpu_data(m->extcpu).microcode);
+		m->microcode);
 }
 
 static void print_mce(struct mce *m)