splash screen on the stm32f746 disco board

index b417ac2..d8784f1 100644
@@ -11,6 +11,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <panel.h>
+#include <reset.h>
 #include <video.h>
 #include <asm/io.h>
 #include <asm/arch/gpio.h>

@@ -302,6 +303,7 @@ static int stm32_ltdc_probe(struct udevice *dev)
 	struct stm32_ltdc_priv *priv = dev_get_priv(dev);
 	struct udevice *panel;
 	struct clk pclk, pxclk;
+	struct reset_ctl rst;
 	int ret;
 
 	priv->regs = (void *)dev_read_addr(dev);

@@ -316,6 +318,15 @@ static int stm32_ltdc_probe(struct udevice *dev)
 		return ret;
 	}
 
+	ret = reset_get_by_index(dev, 0, &rst);
+	if (ret) {
+		debug("%s: missing ltdc hardware reset\n", __func__);
+		return -ENODEV;
+	}
+
+	/* Reset */
+	reset_deassert(&rst);
+
 	ret = panel_enable_backlight(panel);
 	if (ret) {
 		debug("%s: panel %s enable backlight error %d\n",

index d8784f1..8d89b58 100644
@@ -1,8 +1,7 @@
 /*
- * Copyright (C) STMicroelectronics SA 2017
- *
- * Authors: Philippe Cornu <[email protected]>
- *          Yannick Fertre <[email protected]>
+ * Copyright (C) 2017-2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Philippe Cornu <[email protected]> for STMicroelectronics.
+ *	      Yannick Fertre <[email protected]> for STMicroelectronics.
  *
  * SPDX-License-Identifier: GPL-2.0+
  */

@@ -408,10 +407,10 @@ static const struct udevice_id stm32_ltdc_ids[] = {
 };
 
 U_BOOT_DRIVER(stm32_ltdc) = {
-	.name	= "stm32_ltdc",
-	.id	= UCLASS_VIDEO,
-	.of_match = stm32_ltdc_ids,
-	.probe	= stm32_ltdc_probe,
-	.bind	= stm32_ltdc_bind,
+	.name			= "stm32_display",
+	.id			= UCLASS_VIDEO,
+	.of_match		= stm32_ltdc_ids,
+	.probe			= stm32_ltdc_probe,
+	.bind			= stm32_ltdc_bind,
 	.priv_auto_alloc_size	= sizeof(struct stm32_ltdc_priv),
 };

index 8d89b58..08e0afc 100644
@@ -301,9 +301,9 @@ static int stm32_ltdc_probe(struct udevice *dev)
 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
 	struct stm32_ltdc_priv *priv = dev_get_priv(dev);
 	struct udevice *panel;
-	struct clk pclk, pxclk;
+	struct clk pclk;
 	struct reset_ctl rst;
-	int ret;
+	int rate, ret;
 
 	priv->regs = (void *)dev_read_addr(dev);
 	if ((fdt_addr_t)priv->regs == FDT_ADDR_T_NONE) {

@@ -311,9 +311,16 @@ static int stm32_ltdc_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
-	ret = uclass_first_device(UCLASS_PANEL, &panel);
+	ret = clk_get_by_index(dev, 0, &pclk);
 	if (ret) {
-		debug("%s: panel device error %d\n", __func__, ret);
+		debug("%s: peripheral clock get error %d\n", __func__, ret);
+		return ret;
+	}
+
+	ret = clk_enable(&pclk);
+	if (ret) {
+		debug("%s: peripheral clock enable error %d\n",
+		      __func__, ret);
 		return ret;
 	}
 

@@ -326,6 +333,12 @@ static int stm32_ltdc_probe(struct udevice *dev)
 	/* Reset */
 	reset_deassert(&rst);
 
+	ret = uclass_first_device(UCLASS_PANEL, &panel);
+	if (ret) {
+		debug("%s: panel device error %d\n", __func__, ret);
+		return ret;
+	}
+
 	ret = panel_enable_backlight(panel);
 	if (ret) {
 		debug("%s: panel %s enable backlight error %d\n",

@@ -333,31 +346,24 @@ static int stm32_ltdc_probe(struct udevice *dev)
 		return ret;
 	}
 
-	ret = fdtdec_decode_display_timing(gd->fdt_blob, dev_of_offset(dev),
-					   0, &priv->timing);
+	ret = fdtdec_decode_display_timing(gd->fdt_blob,
+					   dev_of_offset(dev), 0,
+					   &priv->timing);
 	if (ret) {
-		debug("%s: decode display timing error %d\n", __func__, ret);
+		debug("%s: decode display timing error %d\n",
+		      __func__, ret);
 		return -EINVAL;
 	}
 
-	ret = clk_get_by_name(dev, "pclk", &pclk);
-	if (ret) {
-		debug("%s: peripheral clock get error %d\n", __func__, ret);
-		return ret;
+	rate = clk_set_rate(&pclk, priv->timing.pixelclock.typ);
+	if (rate < 0) {
+		debug("%s: fail to set pixel clock %d hz %d hz\n",
+		      __func__, priv->timing.pixelclock.typ, rate);
+		return rate;
 	}
 
-	ret = clk_enable(&pclk);
-	if (ret) {
-		debug("%s: peripheral clock enable error %d\n", __func__, ret);
-		return ret;
-	}
-
-	/* Verify pixel clock value if any & inform user accordingly */
-	ret = clk_get_by_name(dev, "pxclk", &pxclk);
-	if (!ret) {
-		if (clk_get_rate(&pxclk) != priv->timing.pixelclock.typ)
-			printf("Warning: please adjust ltdc pixel clock\n");
-	}
+	debug("%s: Set pixel clock req %d hz get %d hz\n", __func__,
+	      priv->timing.pixelclock.typ, rate);
 
 	/* TODO Below parameters are hard-coded for the moment... */
 	priv->l2bpp = VIDEO_BPP16;

index 08e0afc..6c3557b 100644
@@ -219,6 +219,8 @@ static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv)
 	val = (total_w << 16) | total_h;
 	clrsetbits_le32(regs + LTDC_TWCR, TWCR_TOTALH | TWCR_TOTALW, val);
 
+	setbits_le32(regs + LTDC_LIPCR, acc_act_h + 1);
+
 	/* Signal polarities */
 	val = 0;
 	debug("%s: timing->flags 0x%08x\n", __func__, timing->flags);

index 6c3557b..e160c77 100644
@@ -138,7 +138,9 @@ struct stm32_ltdc_priv {
 #define LXCFBLNR_CFBLN	GENMASK(10, 0)	/* Color Frame Buffer Line Number */
 
 #define BF1_PAXCA	0x600		/* Pixel Alpha x Constant Alpha */
+#define BF1_CA		0x400		/* Constant Alpha */
 #define BF2_1PAXCA	0x007		/* 1 - (Pixel Alpha x Constant Alpha) */
+#define BF2_1CA		0x005		/* 1 - Constant Alpha */
 
 enum stm32_ltdc_pix_fmt {
 	PF_ARGB8888 = 0,

@@ -161,11 +163,17 @@ static u32 stm32_ltdc_get_pixel_format(enum video_log2_bpp l2bpp)
 		pf = PF_RGB565;
 		break;
 
+	case VIDEO_BPP32:
+		pf = PF_ARGB8888;
+		break;
+
+	case VIDEO_BPP8:
+		pf = PF_L8;
+		break;
+
 	case VIDEO_BPP1:
 	case VIDEO_BPP2:
 	case VIDEO_BPP4:
-	case VIDEO_BPP8:
-	case VIDEO_BPP32:
 	default:
 		debug("%s: warning %dbpp not supported yet, %dbpp instead\n",
 		      __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));

@@ -178,6 +186,23 @@ static u32 stm32_ltdc_get_pixel_format(enum video_log2_bpp l2bpp)
 	return (u32)pf;
 }
 
+static bool has_alpha(u32 fmt)
+{
+	switch (fmt) {
+	case PF_ARGB8888:
+	case PF_ARGB1555:
+	case PF_ARGB4444:
+	case PF_AL44:
+	case PF_AL88:
+		return true;
+	case PF_RGB888:
+	case PF_RGB565:
+	case PF_L8:
+	default:
+		return false;
+	}
+}
+
 static void stm32_ltdc_enable(struct stm32_ltdc_priv *priv)
 {
 	/* Reload configuration immediately & enable LTDC */

@@ -247,6 +272,7 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv *priv, ulong fb_addr)
 	u32 line_length;
 	u32 bus_width;
 	u32 val, tmp, bpp;
+	u32 format;
 
 	x0 = priv->crop_x;
 	x1 = priv->crop_x + priv->crop_w - 1;

@@ -277,15 +303,18 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv *priv, ulong fb_addr)
 	clrsetbits_le32(regs + LTDC_L1CFBLR, LXCFBLR_CFBLL | LXCFBLR_CFBP, val);
 
 	/* Pixel format */
-	val = stm32_ltdc_get_pixel_format(priv->l2bpp);
-	clrsetbits_le32(regs + LTDC_L1PFCR, LXPFCR_PF, val);
+	format = stm32_ltdc_get_pixel_format(priv->l2bpp);
+	clrsetbits_le32(regs + LTDC_L1PFCR, LXPFCR_PF, format);
 
 	/* Constant alpha value */
 	clrsetbits_le32(regs + LTDC_L1CACR, LXCACR_CONSTA, priv->alpha);
 
+	/* Specifies the blending factors : with or without pixel alpha */
+	/* Manage hw-specific capabilities */
+	val = has_alpha(format) ? BF1_PAXCA | BF2_1PAXCA : BF1_CA | BF2_1CA;
+
 	/* Blending factors */
-	clrsetbits_le32(regs + LTDC_L1BFCR, LXBFCR_BF2 | LXBFCR_BF1,
-			BF1_PAXCA | BF2_1PAXCA);
+	clrsetbits_le32(regs + LTDC_L1BFCR, LXBFCR_BF2 | LXBFCR_BF1, val);
 
 	/* Frame buffer line number */
 	clrsetbits_le32(regs + LTDC_L1CFBLNR, LXCFBLNR_CFBLN, priv->crop_h);

index 8da7028..ae4539f 100644
@@ -7,8 +7,12 @@
 
 #include <common.h>
 #include <dm.h>
+#include <lcd.h>
 #include <ram.h>
 #include <spl.h>
+#include <splash.h>
+#include <st_logo_data.h>
+#include <video.h>
 #include <asm/io.h>
 #include <asm/armv7m.h>
 #include <asm/arch/stm32.h>

@@ -155,5 +159,10 @@ int board_init(void)
 	STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
 #endif
 
+#if defined(CONFIG_CMD_BMP)
+	bmp_display((ulong)stmicroelectronics_uboot_logo_8bit_rle,
+		    BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
+#endif /* CONFIG_CMD_BMP */
+
 	return 0;
 }

index 3e952c2..6f0b722 100644
@@ -85,4 +85,14 @@
 #endif
 /* For SPL ends */
 
+/* For splashcreen */
+#ifdef CONFIG_DM_VIDEO
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_BMP_16BPP
+#define CONFIG_BMP_24BPP
+#define CONFIG_BMP_32BPP
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN_ALIGN
+#endif
+
 #endif /* __CONFIG_H */

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