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powerpc/mm/hugetlb: initialize the pagetable cache correctly for hugetlb

PATCH In review Aneesh Kumar K.V 2 participants 2 messages Mar 7, 2018 – Mar 29, 2018 PowerPC

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#0 lore raw

PATCH v2 1/1 powerpc/mm/hugetlb: initialize the pagetable cache correctly for hugetlb

With 64k page size, we have hugetlb pte entries at the pmd and pud level for book3s64. We don't need to create a separate page table cache for that. With 4k we need to make sure hugepd page table cache for 16M is placed at PUD level and 16G at the PGD level.

Simplify all these by not using HUGEPD_PD_SHIFT which is confusing for book3s64.

Without this patch, with 64k page size we create pagetable caches with shift value 10 and 7 which are not used at all.

Fixes 419df06eea5bfa81("powerpc: Reduce the PTE_INDEX_SIZE")
---
 arch/powerpc/mm/hugetlbpage.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)
arch/powerpc/mm/hugetlbpage.c +12 -3
index 876da2bc1796..3b509b268030 100644
@@ -122,9 +122,6 @@ static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_8xx)
 #define HUGEPD_PGD_SHIFT PGDIR_SHIFT
 #define HUGEPD_PUD_SHIFT PUD_SHIFT
-#else
-#define HUGEPD_PGD_SHIFT PUD_SHIFT
-#define HUGEPD_PUD_SHIFT PMD_SHIFT
 #endif
 
 /*
@@ -669,12 +666,24 @@ static int __init hugetlbpage_init(void)
 		if (add_huge_page_size(1ULL << shift) < 0)
 			continue;
 
+
+#ifdef CONFIG_PPC_BOOK3S_64
+		if (shift > PGDIR_SHIFT)
+			BUG();
+		else if (shift > PUD_SHIFT)
+			pdshift = PGDIR_SHIFT;
+		else if (shift > PMD_SHIFT)
+			pdshift = PUD_SHIFT;
+		else
+			pdshift = PMD_SHIFT;
+#else
 		if (shift < HUGEPD_PUD_SHIFT)
 			pdshift = PMD_SHIFT;
 		else if (shift < HUGEPD_PGD_SHIFT)
 			pdshift = PUD_SHIFT;
 		else
 			pdshift = PGDIR_SHIFT;
+#endif
 		/*
 		 * if we have pdshift and shift value same, we don't
 		 * use pgt cache for hugepd.
Signature · 1 line
2.14.3
#1 lore raw
Quoted 11 lines · Aneesh Kumar K.V

With 64k page size, we have hugetlb pte entries at the pmd and pud level for book3s64. We don't need to create a separate page table cache for that. With 4k we need to make sure hugepd page table cache for 16M is placed at PUD level and 16G at the PGD level.

Simplify all these by not using HUGEPD_PD_SHIFT which is confusing for book3s64.

Without this patch, with 64k page size we create pagetable caches with shift value 10 and 7 which are not used at all.

Fixes 419df06eea5bfa81("powerpc: Reduce the PTE_INDEX_SIZE")

That's:

Fixes 419df06eea5b ("powerpc: Reduce the PTE_INDEX_SIZE")

In ~/.gitconfig:

[pretty]

	fixes = Fixes: %h (\"%s\")

arch/powerpc/mm/hugetlbpage.c static int __init hugetlbpage_init(void) · line 672

Quoted 12 lines
arch/powerpc/mm/hugetlbpage.c +4 -0
index 876da2bc1796..3b509b268030 100644
@@ -669,12 +666,24 @@ static int __init hugetlbpage_init(void)
 		if (add_huge_page_size(1ULL << shift) < 0)
 			continue;
 
+
+#ifdef CONFIG_PPC_BOOK3S_64
+		if (shift > PGDIR_SHIFT)
+			BUG();

Can we not add BUG()s for things that aren't utterly fatal.

In this case I think we could move this whole block above add_huge_page_size() above, and then instead of BUG() we could just WARN() and continue?

Quoted 7 lines
arch/powerpc/mm/hugetlbpage.c +7 -0
+		else if (shift > PUD_SHIFT)
+			pdshift = PGDIR_SHIFT;
+		else if (shift > PMD_SHIFT)
+			pdshift = PUD_SHIFT;
+		else
+			pdshift = PMD_SHIFT;
+#else

arch/powerpc/mm/hugetlbpage.c static int __init hugetlbpage_init(void) · line 689

Quoted 10 lines
arch/powerpc/mm/hugetlbpage.c +1 -0
 		if (shift < HUGEPD_PUD_SHIFT)
 			pdshift = PMD_SHIFT;
 		else if (shift < HUGEPD_PGD_SHIFT)
 			pdshift = PUD_SHIFT;
 		else
 			pdshift = PGDIR_SHIFT;
+#endif
 		/*
 		 * if we have pdshift and shift value same, we don't
 		 * use pgt cache for hugepd.

cheers