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Enable thermal management on MSM8916

PATCH Superseded Amit Kucheria 3 participants 10 messages Mar 6, 2018 – Mar 8, 2018

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Amit Kucheria

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#0 lore raw

cover Enable thermal management on MSM8916

Add DT entries to create cooling devices on MSM8916, enable the thermal sensor on the platform and turn on other cpufreq governors to make it easy for developers.

This patchset requires
http://patchwork.kernel.org/bundle/amitkucheria/8016-cpufreq-dts/ to be applied first to enable thermal functionality by cpu frequency throttling.

Amit Kucheria (2):
arm64: defconfig: enable thermal sensor on QCOM platforms
arm64: defconfig: enable more cpufreq governors

Rajendra Nayak (1):
arm64: dts: msm8916: Add cpu cooling maps

 arch/arm64/boot/dts/qcom/msm8916.dtsi | 31 +++++++++++++++++++++++++++++++
 arch/arm64/configs/defconfig          | 10 ++++++++++
 2 files changed, 41 insertions(+)
Signature · 1 line
2.7.4
author
#1 lore raw

PATCH 1/3 arm64: dts: msm8916: Add cpu cooling maps

From: Rajendra Nayak <[email protected]>

Add cpu cooling maps for cpu passive trip points. The cpu cooling device states are mapped to cpufreq based scaling frequencies.

Signed-off-by Rajendra Nayak <[email protected]>
Signed-off-by Amit Kucheria <[email protected]>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)
arch/arm64/boot/dts/qcom/msm8916.dtsi +31 -0
index e468277..acac9e3 100644
@@ -15,6 +15,7 @@
 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	model = "Qualcomm Technologies, Inc. MSM8916";

@@ -115,6 +116,10 @@
 			cpu-idle-states = <&CPU_SPC>;
 			clocks = <&apcs 0>;
 			operating-points-v2 = <&cpu_opp_table>;
+			/* cooling options */
+			cooling-min-level = <0>;
+			cooling-max-level = <7>;
+			#cooling-cells = <2>;
 		};
 
 		CPU1: cpu at 1 {

@@ -126,6 +131,10 @@
 			cpu-idle-states = <&CPU_SPC>;
 			clocks = <&apcs 0>;
 			operating-points-v2 = <&cpu_opp_table>;
+			/* cooling options */
+			cooling-min-level = <0>;
+			cooling-max-level = <7>;
+			#cooling-cells = <2>;
 		};
 
 		CPU2: cpu at 2 {

@@ -137,6 +146,10 @@
 			cpu-idle-states = <&CPU_SPC>;
 			clocks = <&apcs 0>;
 			operating-points-v2 = <&cpu_opp_table>;
+			/* cooling options */
+			cooling-min-level = <0>;
+			cooling-max-level = <7>;
+			#cooling-cells = <2>;
 		};
 
 		CPU3: cpu at 3 {

@@ -148,6 +161,10 @@
 			cpu-idle-states = <&CPU_SPC>;
 			clocks = <&apcs 0>;
 			operating-points-v2 = <&cpu_opp_table>;
+			/* cooling options */
+			cooling-min-level = <0>;
+			cooling-max-level = <7>;
+			#cooling-cells = <2>;
 		};
 
 		L2_0: l2-cache {

@@ -196,6 +213,13 @@
 					type = "critical";
 				};
 			};
+
+			cooling-maps {
+				map0 {
+					trip = <&cpu_alert0>;
+					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
 		};
 
 		cpu-thermal1 {

@@ -216,6 +240,13 @@
 					type = "critical";
 				};
 			};
+
+			cooling-maps {
+				map0 {
+					trip = <&cpu_alert1>;
+					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
 		};
 
 	};
Signature · 1 line
2.7.4
#2 lore raw

Re: [PATCH 1/3] arm64: dts: msm8916: Add cpu cooling maps

+Viresh

Quoted 24 lines · Amit Kucheria

From: Rajendra Nayak <[email protected]>

Add cpu cooling maps for cpu passive trip points. The cpu cooling device states are mapped to cpufreq based scaling frequencies.

Signed-off-by Rajendra Nayak <[email protected]>
Signed-off-by Amit Kucheria <[email protected]>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)
arch/arm64/boot/dts/qcom/msm8916.dtsi +1 -0
index e468277..acac9e3 100644
@@ -15,6 +15,7 @@
 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
        model = "Qualcomm Technologies, Inc. MSM8916";

arch/arm64/boot/dts/qcom/msm8916.dtsi line 121

Quoted 6 lines
arch/arm64/boot/dts/qcom/msm8916.dtsi +3 -0
@@ -115,6 +116,10 @@
                        cpu-idle-states = <&CPU_SPC>;
                        clocks = <&apcs 0>;
                        operating-points-v2 = <&cpu_opp_table>;
+                       /* cooling options */
+                       cooling-min-level = <0>;
+                       cooling-max-level = <7>;

Viresh is working on removing these from the binding...

Quoted 4 lines
arch/arm64/boot/dts/qcom/msm8916.dtsi +1 -0
+                       #cooling-cells = <2>;
                };
 
                CPU1: cpu at 1 {
#3 lore raw

Re: [PATCH 1/3] arm64: dts: msm8916: Add cpu cooling maps

Quoted 12 lines · Rob Herring

arch/arm64/boot/dts/qcom/msm8916.dtsi line 121

Quoted 8 lines · Amit Kucheria
        model = "Qualcomm Technologies, Inc. MSM8916";
arch/arm64/boot/dts/qcom/msm8916.dtsi +3 -0
@@ -115,6 +116,10 @@
                        cpu-idle-states = <&CPU_SPC>;
                        clocks = <&apcs 0>;
                        operating-points-v2 = <&cpu_opp_table>;
+                       /* cooling options */
+                       cooling-min-level = <0>;
+                       cooling-max-level = <7>;

Viresh is working on removing these from the binding...

Yep, just drop all cooling-{min|max}-level lines from your code. That is not used
anywhere by the kernel.

author
#4 lore raw

PATCH v2 1/1 arm64: dts: msm8916: Add cpu cooling maps

In reply to Amit Kucheria

From: Rajendra Nayak <[email protected]>

Add cpu cooling maps for cpu passive trip points. The cpu cooling device states are mapped to cpufreq based scaling frequencies.

Signed-off-by Rajendra Nayak <[email protected]>
Signed-off-by Amit Kucheria <[email protected]>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
arch/arm64/boot/dts/qcom/msm8916.dtsi +19 -0
index e468277..66b318e 100644
@@ -15,6 +15,7 @@
 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	model = "Qualcomm Technologies, Inc. MSM8916";

@@ -115,6 +116,7 @@
 			cpu-idle-states = <&CPU_SPC>;
 			clocks = <&apcs 0>;
 			operating-points-v2 = <&cpu_opp_table>;
+			#cooling-cells = <2>;
 		};
 
 		CPU1: cpu at 1 {

@@ -126,6 +128,7 @@
 			cpu-idle-states = <&CPU_SPC>;
 			clocks = <&apcs 0>;
 			operating-points-v2 = <&cpu_opp_table>;
+			#cooling-cells = <2>;
 		};
 
 		CPU2: cpu at 2 {

@@ -137,6 +140,7 @@
 			cpu-idle-states = <&CPU_SPC>;
 			clocks = <&apcs 0>;
 			operating-points-v2 = <&cpu_opp_table>;
+			#cooling-cells = <2>;
 		};
 
 		CPU3: cpu at 3 {

@@ -148,6 +152,7 @@
 			cpu-idle-states = <&CPU_SPC>;
 			clocks = <&apcs 0>;
 			operating-points-v2 = <&cpu_opp_table>;
+			#cooling-cells = <2>;
 		};
 
 		L2_0: l2-cache {

@@ -196,6 +201,13 @@
 					type = "critical";
 				};
 			};
+
+			cooling-maps {
+				map0 {
+					trip = <&cpu_alert0>;
+					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
 		};
 
 		cpu-thermal1 {

@@ -216,6 +228,13 @@
 					type = "critical";
 				};
 			};
+
+			cooling-maps {
+				map0 {
+					trip = <&cpu_alert1>;
+					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
 		};
 
 	};
Signature · 1 line
2.7.4
#5 lore raw

Re: [PATCH v2] arm64: dts: msm8916: Add cpu cooling maps

Quoted 24 lines · Amit Kucheria

From: Rajendra Nayak <[email protected]>

Add cpu cooling maps for cpu passive trip points. The cpu cooling device states are mapped to cpufreq based scaling frequencies.

Signed-off-by Rajendra Nayak <[email protected]>
Signed-off-by Amit Kucheria <[email protected]>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
arch/arm64/boot/dts/qcom/msm8916.dtsi +1 -0
index e468277..66b318e 100644
@@ -15,6 +15,7 @@
 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
        model = "Qualcomm Technologies, Inc. MSM8916";

arch/arm64/boot/dts/qcom/msm8916.dtsi line 119

Quoted 4 lines
arch/arm64/boot/dts/qcom/msm8916.dtsi +1 -0
@@ -115,6 +116,7 @@
                        cpu-idle-states = <&CPU_SPC>;
                        clocks = <&apcs 0>;
                        operating-points-v2 = <&cpu_opp_table>;
+                       #cooling-cells = <2>;

LGTM.

author
#6 lore raw

Re: [PATCH v2] arm64: dts: msm8916: Add cpu cooling maps

Quoted 22 lines · Viresh Kumar
Quoted 21 lines · Amit Kucheria

From: Rajendra Nayak <[email protected]>

Add cpu cooling maps for cpu passive trip points. The cpu cooling device states are mapped to cpufreq based scaling frequencies.

Signed-off-by Rajendra Nayak <[email protected]>
Signed-off-by Amit Kucheria <[email protected]>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
arch/arm64/boot/dts/qcom/msm8916.dtsi +1 -0
index e468277..66b318e 100644
@@ -15,6 +15,7 @@
 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
+#include <dt-bindings/thermal/thermal.h>
Quoted 9 lines

arch/arm64/boot/dts/qcom/msm8916.dtsi line 119

Quoted 7 lines
arch/arm64/boot/dts/qcom/msm8916.dtsi +1 -0
 / {
        model = "Qualcomm Technologies, Inc. MSM8916";

@@ -115,6 +116,7 @@
                        cpu-idle-states = <&CPU_SPC>;
                        clocks = <&apcs 0>;
                        operating-points-v2 = <&cpu_opp_table>;
+                       #cooling-cells = <2>;

LGTM.

Can I take that as a Reviewed-by?

Reviewed-by
#7 lore raw

Re: [PATCH v2] arm64: dts: msm8916: Add cpu cooling maps

Quoted 33 lines · Amit Kucheria
Quoted 22 lines · Viresh Kumar
Quoted 21 lines · Amit Kucheria

From: Rajendra Nayak <[email protected]>

Add cpu cooling maps for cpu passive trip points. The cpu cooling device states are mapped to cpufreq based scaling frequencies.

Signed-off-by Rajendra Nayak <[email protected]>
Signed-off-by Amit Kucheria <[email protected]>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
arch/arm64/boot/dts/qcom/msm8916.dtsi +1 -0
index e468277..66b318e 100644
@@ -15,6 +15,7 @@
 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
+#include <dt-bindings/thermal/thermal.h>
Quoted 9 lines

arch/arm64/boot/dts/qcom/msm8916.dtsi line 119

Quoted 7 lines
arch/arm64/boot/dts/qcom/msm8916.dtsi +1 -0
 / {
        model = "Qualcomm Technologies, Inc. MSM8916";

@@ -115,6 +116,7 @@
                        cpu-idle-states = <&CPU_SPC>;
                        clocks = <&apcs 0>;
                        operating-points-v2 = <&cpu_opp_table>;
+                       #cooling-cells = <2>;

LGTM.

Quoted 1 line

Can I take that as a Reviewed-by?

Sure.

Reviewed-by Viresh Kumar <[email protected]>
Signature · 1 line
viresh
author
#8 lore raw

PATCH 2/3 arm64: defconfig: enable thermal sensor on QCOM platforms

In reply to Amit Kucheria

Enable the driver for the TSENS IP that is present across several QCOM SoCs.

Signed-off-by Amit Kucheria <[email protected]>
---
 arch/arm64/configs/defconfig | 2 ++
 1 file changed, 2 insertions(+)
arch/arm64/configs/defconfig +2 -0
index 634b373..80530cb 100644
@@ -327,6 +327,7 @@ CONFIG_THERMAL_EMULATION=y
 CONFIG_BRCMSTB_THERMAL=m
 CONFIG_EXYNOS_THERMAL=y
 CONFIG_RCAR_GEN3_THERMAL=y
+CONFIG_QCOM_TSENS=y
 CONFIG_ROCKCHIP_THERMAL=m
 CONFIG_WATCHDOG=y
 CONFIG_S3C2410_WATCHDOG=y

@@ -562,6 +563,7 @@ CONFIG_PHY_XGENE=y
 CONFIG_PHY_TEGRA_XUSB=y
 CONFIG_QCOM_L2_PMU=y
 CONFIG_QCOM_L3_PMU=y
+CONFIG_QCOM_QFPROM=y
 CONFIG_UNIPHIER_EFUSE=y
 CONFIG_TEE=y
 CONFIG_OPTEE=y
Signature · 1 line
2.7.4
author
#9 lore raw

PATCH 3/3 arm64: defconfig: enable more cpufreq governors

In reply to Amit Kucheria

Enable the various CPUFREQ governors and statistics to ease development. Don't change the default governor - performance governor.

Signed-off-by Amit Kucheria <[email protected]>
---
 arch/arm64/configs/defconfig | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm64/configs/defconfig +8 -0
index 80530cb..1f542fd 100644
@@ -99,6 +99,14 @@ CONFIG_HIBERNATION=y
 CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
 CONFIG_ARM_CPUIDLE=y
 CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_GOV_ATTR_SET=y
+CONFIG_CPU_FREQ_GOV_COMMON=y
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=m
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
 CONFIG_CPUFREQ_DT=y
 CONFIG_ARM_ARMADA_37XX_CPUFREQ=y
 CONFIG_ARM_BIG_LITTLE_CPUFREQ=y
Signature · 1 line
2.7.4