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Enable Video Decoder on Tegra30

PATCH Applied Dmitry Osipenko 2 participants 4 messages Feb 18, 2018 – Mar 8, 2018

Subsystems (2)
Device tree bindings Tegra architecture support
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Dmitry Osipenko

author
#0 lore raw

v2 cover Enable Video Decoder on Tegra30

VDE on Terga30 is compatible with VDE on Tegra20, hence the 'tegra-vde' driver works fine on Terga30. Let's add missing DT nodes to expose Video Decoder Engine on Terga30.

Changelog:

V2:
1) Appended unit address to the name of VDE pool node to fix DTC warning as per Andreas's Färber suggestion.

2) Correctly placed IRAM DT node in the address-ascending order.

Dmitry Osipenko (2):
ARM: dts: tegra30: Add IRAM node
ARM: dts: tegra30: Add video decoder node

 arch/arm/boot/dts/tegra30.dtsi | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)
Signature · 1 line
2.16.1
author
#1 lore raw

PATCH v2 1/2 ARM: dts: tegra30: Add IRAM node

IRAM is a static RAM that consists of four contiguous 64 KiB blocks, it is currently used to store CPU resume code, utilized by the video decoder engine and could be used as a general-purpose fast memory.

Signed-off-by Dmitry Osipenko <[email protected]>
---
 arch/arm/boot/dts/tegra30.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/boot/dts/tegra30.dtsi +8 -0
index c3e9f1e847db..833d97206aef 100644
@@ -91,6 +91,14 @@
 		};
 	};
 
+	iram@40000000 {
+		compatible = "mmio-sram";
+		reg = <0x40000000 0x40000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x40000000 0x40000>;
+	};
+
 	host1x@50000000 {
 		compatible = "nvidia,tegra30-host1x", "simple-bus";
 		reg = <0x50000000 0x00024000>;
Signature · 1 line
2.16.1
author
#2 lore raw

PATCH v2 2/2 ARM: dts: tegra30: Add video decoder node

In reply to Dmitry Osipenko

Add device tree node for the Video Decoder Engine found on Tegra30 SoC's.

Signed-off-by Dmitry Osipenko <[email protected]>
---
 arch/arm/boot/dts/tegra30.dtsi | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)
arch/arm/boot/dts/tegra30.dtsi +27 -0
index 833d97206aef..a110cf84d85f 100644
@@ -97,6 +97,11 @@
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0 0x40000000 0x40000>;
+
+		vde_pool: vde@400 {
+			reg = <0x400 0x3fc00>;
+			pool;
+		};
 	};
 
 	host1x@50000000 {

@@ -366,6 +371,28 @@
 		*/
 	};
 
+	vde@6001a000 {
+		compatible = "nvidia,tegra30-vde", "nvidia,tegra20-vde";
+		reg = <0x6001a000 0x1000   /* Syntax Engine */
+		       0x6001b000 0x1000   /* Video Bitstream Engine */
+		       0x6001c000  0x100   /* Macroblock Engine */
+		       0x6001c200  0x100   /* Post-processing Engine */
+		       0x6001c400  0x100   /* Motion Compensation Engine */
+		       0x6001c600  0x100   /* Transform Engine */
+		       0x6001c800  0x100   /* Pixel prediction block */
+		       0x6001ca00  0x100   /* Video DMA */
+		       0x6001d800  0x400>; /* Video frame controls */
+		reg-names = "sxe", "bsev", "mbe", "ppe", "mce",
+			    "tfe", "ppb", "vdma", "frameid";
+		iram = <&vde_pool>; /* IRAM region */
+		interrupts = <GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>, /* Sync token interrupt */
+			     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, /* BSE-V interrupt */
+			     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; /* SXE interrupt */
+		interrupt-names = "sync-token", "bsev", "sxe";
+		clocks = <&tegra_car TEGRA30_CLK_VDE>;
+		resets = <&tegra_car 61>;
+	};
+
 	apbmisc@70000800 {
 		compatible = "nvidia,tegra30-apbmisc", "nvidia,tegra20-apbmisc";
 		reg = <0x70000800 0x64   /* Chip revision */
Signature · 1 line
2.16.1
Applied
#3 lore raw
In reply to Dmitry Osipenko
Quoted 10 lines · Dmitry Osipenko

VDE on Terga30 is compatible with VDE on Tegra20, hence the 'tegra-vde' driver works fine on Terga30. Let's add missing DT nodes to expose Video Decoder Engine on Terga30.

Changelog:

V2:
1) Appended unit address to the name of VDE pool node to fix DTC warning as per Andreas's Färber suggestion.

Quoted 8 lines

2) Correctly placed IRAM DT node in the address-ascending order.

Dmitry Osipenko (2):
ARM: dts: tegra30: Add IRAM node
ARM: dts: tegra30: Add video decoder node

 arch/arm/boot/dts/tegra30.dtsi | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

Applied, thanks.

Thierry