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driver: clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux

PATCH Superseded Bai Ping 2 participants 8 messages Mar 8, 2018 – Mar 9, 2018

Subsystems (4)
Device tree bindings Arm i.MX and Layerscape Common clk NXP i.MX clock drivers

v4 of 6 Superseded Latest is v6 →

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Bai Ping

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#0 lore raw

PATCH v4 1/4 driver: clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux

The busy divider and busy mux is actually used by the system critical clocks, so add 'CLK_IS_CRITICAL' to clocks registered with these two type.

Signed-off-by Bai Ping <[email protected]>

---
change from V3->v4:
- fix a typo in commit log

---
 drivers/clk/imx/clk-busy.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/clk/imx/clk-busy.c +2 -2
index 6df3389..9903652 100644
@@ -101,7 +101,7 @@ struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
 
 	init.name = name;
 	init.ops = &clk_busy_divider_ops;
-	init.flags = CLK_SET_RATE_PARENT;
+	init.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL;
 	init.parent_names = &parent_name;
 	init.num_parents = 1;
 

@@ -175,7 +175,7 @@ struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
 
 	init.name = name;
 	init.ops = &clk_busy_mux_ops;
-	init.flags = 0;
+	init.flags = CLK_IS_CRITICAL;
 	init.parent_names = parent_names;
 	init.num_parents = num_parents;
Signature · 1 line
1.9.1
author
#1 lore raw

PATCH v4 2/4 driver: clk: imx: add new gate/gate2 wrapper funtion

Add new gate/gate2 wrapper function to register clocks with optional flags.

Signed-off-by Bai Ping <[email protected]>

---
change from v3->v4:
- no

---
 drivers/clk/imx/clk.h | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
drivers/clk/imx/clk.h +14 -0
index d69c4bb..8076ec0 100644
@@ -123,6 +123,13 @@ static inline struct clk *imx_clk_gate(const char *name, const char *parent,
 			shift, 0, &imx_ccm_lock);
 }
 
+static inline struct clk *imx_clk_gate_flags(const char *name, const char *parent,
+		void __iomem *reg, u8 shift, unsigned long flags)
+{
+	return clk_register_gate(NULL, name, parent, flags | CLK_SET_RATE_PARENT, reg,
+			shift, 0, &imx_ccm_lock);
+}
+
 static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent,
 		void __iomem *reg, u8 shift)
 {

@@ -137,6 +144,13 @@ static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
 			shift, 0x3, 0, &imx_ccm_lock, NULL);
 }
 
+static inline struct clk *imx_clk_gate2_flags(const char *name, const char *parent,
+		void __iomem *reg, u8 shift, unsigned long flags)
+{
+	return clk_register_gate2(NULL, name, parent, flags | CLK_SET_RATE_PARENT, reg,
+			shift, 0x3, 0, &imx_ccm_lock, NULL);
+}
+
 static inline struct clk *imx_clk_gate2_shared(const char *name,
 		const char *parent, void __iomem *reg, u8 shift,
 		unsigned int *share_count)
Signature · 1 line
1.9.1
author
#2 lore raw

PATCH v4 3/4 Document: dt: binding: imx: update clock doc for imx6sll

In reply to Bai Ping

Add clock binding doc update for imx6sll.

Signed-off-by Bai Ping <[email protected]>

---
change from v3-> v4:
- use SPDX license identifier
- correct the binding doc format

---
 .../devicetree/bindings/clock/imx6sll-clock.txt    |  36 ++++
 include/dt-bindings/clock/imx6sll-clock.h          | 202 +++++++++++++++++++++
 2 files changed, 238 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/imx6sll-clock.txt
 create mode 100644 include/dt-bindings/clock/imx6sll-clock.h
Documentation/devicetree/bindings/clock/imx6sll-clock.txt new file +36 -0
new file mode 100644
index 0000000..fee849d
@@ -0,0 +1,36 @@
+* Clock bindings for Freescale i.MX6 SLL
+
+Required properties:
+- compatible: Should be "fsl,imx6sll-ccm"
+- reg: Address and length of the register set
+- #clock-cells: Should be <1>
+- clocks: list of clock specifiers, must contain an entry for each required
+  entry in clock-names
+- clock-names: should include entries "ckil", "osc", "ipp_di0" and "ipp_di1"
+
+The clock consumer should specify the desired clock by having the clock
+ID in its "clocks" phandle cell.  See include/dt-bindings/clock/imx6sll-clock.h
+for the full list of i.MX6 SLL clock IDs.
+
+Examples:
+
+#include <dt-bindings/clock/imx6sll-clock.h>
+
+clks: clock-controller@20c4000 {
+		compatible = "fsl,imx6sll-ccm";
+		reg = <0x020c4000 0x4000>;
+		interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+		#clock-cells = <1>;
+		clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
+		clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
+};
+
+uart1: serial@2020000 {
+		compatible = "fsl,imx6sl-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
+		reg = <0x02020000 0x4000>;
+		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clks IMX6SLL_CLK_UART1_IPG>,
+			 <&clks IMX6SLL_CLK_UART1_SERIAL>;
+		clock-names = "ipg", "per";
+};
include/dt-bindings/clock/imx6sll-clock.h new file +202 -0

202 lines not on this page · raw message

Signature · 1 line
1.9.1
author
#3 lore raw

PATCH v4 4/4 driver: clk: imx: add clock driver for imx6sll

In reply to Bai Ping

Add clk driver support for imx6sll.

Signed-off-by Bai Ping <[email protected]>

---
change v1->v2
- fix minor comment from stephen
change v2->v3
- remove init_on array, use CLK_IS_CRITICAL flag to make sure system critical clock is always on
change v3->v4:
- update the license identifier to SPDX
- reformat the code indent
---

 drivers/clk/imx/Makefile      |   1 +
 drivers/clk/imx/clk-imx6sll.c | 344 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 345 insertions(+)
 create mode 100644 drivers/clk/imx/clk-imx6sll.c
drivers/clk/imx/Makefile +1 -0
index f91f2b2..8c3baa7 100644
@@ -22,6 +22,7 @@ obj-$(CONFIG_SOC_IMX35)  += clk-imx35.o
 obj-$(CONFIG_SOC_IMX5)   += clk-imx51-imx53.o
 obj-$(CONFIG_SOC_IMX6Q)  += clk-imx6q.o
 obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o
+obj-$(CONFIG_SOC_IMX6SLL) += clk-imx6sll.o
 obj-$(CONFIG_SOC_IMX6SX) += clk-imx6sx.o
 obj-$(CONFIG_SOC_IMX6UL) += clk-imx6ul.o
 obj-$(CONFIG_SOC_IMX7D)  += clk-imx7d.o
drivers/clk/imx/clk-imx6sll.c new file +344 -0

344 lines not on this page · raw message

Signature · 1 line
1.9.1
#4 lore raw

PATCH v4 4/4 driver: clk: imx: add clock driver for imx6sll

Quoted 18 lines · Bai Ping
drivers/clk/imx/clk-imx6sll.c new file +12 -0
new file mode 100644
index 0000000..e938db5
@@ -0,0 +1,344 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017-2018 NXP.
+ */
+
+#include <dt-bindings/clock/imx6sll-clock.h>
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/io.h>

drivers/clk/imx/clk-imx6sll.c line 22

Quoted 10 lines
drivers/clk/imx/clk-imx6sll.c new file +10 -0
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/types.h>
+
+#include "clk.h"
+
+#define CCM_ANALOG_PLL_BYPASS		(0x1 << 16)
+#define BM_CCM_CCDR_MMDC_CH0_MASK	(0x2 << 16)
+#define CCDR				0x4

We agreed to remove this define, right?

Shawn

Quoted 1 line
drivers/clk/imx/clk-imx6sll.c new file +1 -0
+#define xPLL_CLR(offset)		(offset + 0x8)
author
#5 lore raw

PATCH v4 4/4 driver: clk: imx: add clock driver for imx6sll

Quoted 25 lines

Subject: Re: [PATCH v4 4/4] driver: clk: imx: add clock driver for imx6sll

Quoted 22 lines · Bai Ping
(quoted diff) +0 -0

b/drivers/clk/imx/clk-imx6sll.c new file mode 100644 index 0000000..e938db5

drivers/clk/imx/clk-imx6sll.c new file +16 -0
@@ -0,0 +1,344 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017-2018 NXP.
+ */
+
+#include <dt-bindings/clock/imx6sll-clock.h>
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/types.h>
Quoted 8 lines

drivers/clk/imx/clk-imx6sll.c line 22

Quoted 6 lines
drivers/clk/imx/clk-imx6sll.c new file +6 -0
+
+#include "clk.h"
+
+#define CCM_ANALOG_PLL_BYPASS		(0x1 << 16)
+#define BM_CCM_CCDR_MMDC_CH0_MASK	(0x2 << 16)
+#define CCDR				0x4

We agreed to remove this define, right?

Sorry, this is missed, will correct it.
Jacky

Quoted 4 lines

Shawn

Quoted 1 line
drivers/clk/imx/clk-imx6sll.c new file +1 -0
+#define xPLL_CLR(offset)		(offset + 0x8)
#6 lore raw

PATCH v4 1/4 driver: clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux

In reply to Bai Ping
Quoted 4 lines · Bai Ping

The busy divider and busy mux is actually used by the system critical clocks, so add 'CLK_IS_CRITICAL' to clocks registered with these two type.

Signed-off-by Bai Ping <[email protected]>

"clk: imx: ..." for patch prefix is good enough.

Shawn

author
#7 lore raw

PATCH v4 1/4 driver: clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux

Quoted 11 lines

Subject: Re: [PATCH v4 1/4] driver: clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux

Quoted 4 lines · Bai Ping

The busy divider and busy mux is actually used by the system critical clocks, so add 'CLK_IS_CRITICAL' to clocks registered with these two type.

Signed-off-by Bai Ping <[email protected]>

"clk: imx: ..." for patch prefix is good enough.

OK, will be updated in V5.

Jacky

Quoted 1 line

Shawn