Please pull JSON files for POWR9 PMU events
Hi Arnaldo,
Please pull an update to the JSON files for POWER9 PMU events.
The following changes since commit 90d2614c4d10c2f9d0ada9a3b01e5f43ca8d1ae3:
perf test: Fix exit code for record+probe_libc_inet_pton.sh (2018-03-13 15:14:43 -0300)
are available in the git repository at:
https://github.com/sukadev/linux/ p9-json-v5
for you to fetch changes up to 99c9dff949f2502964005f9afa8d60c89b446f2c:
perf vendor events: Update POWER9 events (2018-03-13 16:48:12 -0500)
----------------------------------------------------------------
Sukadev Bhattiprolu (1):
perf vendor events: Update POWER9 events
.../perf/pmu-events/arch/powerpc/power9/cache.json | 25 --- .../pmu-events/arch/powerpc/power9/frontend.json | 10 - .../pmu-events/arch/powerpc/power9/marked.json | 5 - .../pmu-events/arch/powerpc/power9/memory.json | 5 - .../perf/pmu-events/arch/powerpc/power9/other.json | 241 ++++++++++++++------- .../pmu-events/arch/powerpc/power9/pipeline.json | 50 ++--- tools/perf/pmu-events/arch/powerpc/power9/pmc.json | 5 - .../arch/powerpc/power9/translation.json | 10 +- 8 files changed, 178 insertions(+), 173 deletions(-)
Arnaldo Carvalho de Melo
maintainerEm Tue, Mar 13, 2018 at 03:46:47PM -0700, Sukadev Bhattiprolu escreveu:
Quoted 4 lines
Hi Arnaldo,
Please pull an update to the JSON files for POWER9 PMU events.
Can you please be a bit more verbose in the next pull requets, something like describing what is the nature of this specific pull request, say it is to better support some specific measurements, etc, so that people don't have to go and peruse the patches looking for what has changed.
If you could even show it being used and drawind some interesting conclusion, even better. Or point to documentation describing it being used, a blog post, whatever that clarifies these updates and encourages potential users to try the perf tools with those events.
- Arnaldo
Quoted 25 lines
The following changes since commit
90d2614c4d10c2f9d0ada9a3b01e5f43ca8d1ae3:perf test: Fix exit code for
record+probe_libc_inet_pton.sh(2018-03-13 15:14:43 -0300)are available in the git repository at:
https://github.com/sukadev/linux/ p9-json-v5
for you to fetch changes up to
99c9dff949f2502964005f9afa8d60c89b446f2c:perf vendor events: Update POWER9 events (2018-03-13 16:48:12 -0500)
----------------------------------------------------------------
Sukadev Bhattiprolu (1):
perf vendor events: Update POWER9 events.../perf/pmu-events/arch/powerpc/power9/cache.json | 25 --- .../pmu-events/arch/powerpc/power9/frontend.json | 10 - .../pmu-events/arch/powerpc/power9/marked.json | 5 - .../pmu-events/arch/powerpc/power9/memory.json | 5 - .../perf/pmu-events/arch/powerpc/power9/other.json | 241 ++++++++++++++------- .../pmu-events/arch/powerpc/power9/pipeline.json | 50 ++--- tools/perf/pmu-events/arch/powerpc/power9/pmc.json | 5 - .../arch/powerpc/power9/translation.json | 10 +- 8 files changed, 178 insertions(+), 173 deletions(-)
tip-bot for Sukadev Bhattiprolu
merge bot[tip:perf/core] perf vendor events: Update POWER9 events
In reply to Sukadev Bhattiproluperf vendor events: Update POWER9 events
Commit-ID: 9749adc3b2a23c91b2eda8758ff0c650d731aa2f Gitweb: https://git.kernel.org/tip/9749adc3b2a23c91b2eda8758ff0c650d731aa2f Author: Sukadev Bhattiprolu <[email protected]> AuthorDate: Tue, 13 Mar 2018 12:33:29 -0500 Committer: Arnaldo Carvalho de Melo <[email protected]> CommitDate: Fri, 16 Mar 2018 13:57:08 -0300
perf vendor events: Update POWER9 events
--- .../perf/pmu-events/arch/powerpc/power9/cache.json | 25 --- .../pmu-events/arch/powerpc/power9/frontend.json | 10 - .../pmu-events/arch/powerpc/power9/marked.json | 5 - .../pmu-events/arch/powerpc/power9/memory.json | 5 - .../perf/pmu-events/arch/powerpc/power9/other.json | 241 ++++++++++++++------- .../pmu-events/arch/powerpc/power9/pipeline.json | 50 ++--- tools/perf/pmu-events/arch/powerpc/power9/pmc.json | 5 - .../arch/powerpc/power9/translation.json | 10 +- 8 files changed, 178 insertions(+), 173 deletions(-)
tools/perf/pmu-events/arch/powerpc/power9/cache.json +0 -25
@@ -19,11 +19,6 @@ "EventName": "PM_CMPLU_STALL_FXU", "BriefDescription": "Finish stall due to a scalar fixed point or CR instruction in the execution pipeline. These instructions get routed to the ALU, ALU2, and DIV pipes" }, - {, - "EventCode": "0x1D15C", - "EventName": "PM_MRK_DTLB_MISS_1G", - "BriefDescription": "Marked Data TLB reload (after a miss) page size 2M. Implies radix translation was used" - }, {, "EventCode": "0x4D12A", "EventName": "PM_MRK_DATA_FROM_RL4_CYC",
@@ -79,21 +74,6 @@ "EventName": "PM_THRESH_EXC_4096", "BriefDescription": "Threshold counter exceed a count of 4096" }, - {, - "EventCode": "0x3D156", - "EventName": "PM_MRK_DTLB_MISS_64K", - "BriefDescription": "Marked Data TLB Miss page size 64K" - }, - {, - "EventCode": "0x4C15E", - "EventName": "PM_MRK_DTLB_MISS_16M", - "BriefDescription": "Marked Data TLB Miss page size 16M" - }, - {, - "EventCode": "0x2D15E", - "EventName": "PM_MRK_DTLB_MISS_16G", - "BriefDescription": "Marked Data TLB Miss page size 16G" - }, {, "EventCode": "0x3F14A", "EventName": "PM_MRK_DPTEG_FROM_RMEM",
@@ -123,10 +103,5 @@ "EventCode": "0x1002A", "EventName": "PM_CMPLU_STALL_LARX", "BriefDescription": "Finish stall because the NTF instruction was a larx waiting to be satisfied" - }, - {, - "EventCode": "0x1C058", - "EventName": "PM_DTLB_MISS_16G", - "BriefDescription": "Data TLB Miss page size 16G" } ]
tools/perf/pmu-events/arch/powerpc/power9/frontend.json +0 -10
@@ -154,11 +154,6 @@ "EventName": "PM_MRK_DATA_FROM_RL2L3_SHR_CYC", "BriefDescription": "Duration in cycles to reload with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load" }, - {, - "EventCode": "0x3C056", - "EventName": "PM_DTLB_MISS_64K", - "BriefDescription": "Data TLB Miss page size 64K" - }, {, "EventCode": "0x30060", "EventName": "PM_TM_TRANS_RUN_INST",
@@ -344,11 +339,6 @@ "EventName": "PM_MRK_LARX_FIN", "BriefDescription": "Larx finished" }, - {, - "EventCode": "0x4C056", - "EventName": "PM_DTLB_MISS_16M", - "BriefDescription": "Data TLB Miss page size 16M" - }, {, "EventCode": "0x1003A", "EventName": "PM_CMPLU_STALL_LSU_FIN",
tools/perf/pmu-events/arch/powerpc/power9/marked.json +0 -5
@@ -529,11 +529,6 @@ "EventName": "PM_L1_ICACHE_RELOADED_ALL", "BriefDescription": "Counts all Icache reloads includes demand, prefetch, prefetch turned into demand and demand turned into prefetch" }, - {, - "EventCode": "0x4003C", - "EventName": "PM_DISP_HELD_SYNC_HOLD", - "BriefDescription": "Cycles in which dispatch is held because of a synchronizing instruction in the pipeline" - }, {, "EventCode": "0x3003C", "EventName": "PM_CMPLU_STALL_NESTED_TEND",
tools/perf/pmu-events/arch/powerpc/power9/memory.json +0 -5
@@ -44,11 +44,6 @@ "EventName": "PM_LD_CMPL", "BriefDescription": "count of Loads completed" }, - {, - "EventCode": "0x2D156", - "EventName": "PM_MRK_DTLB_MISS_4K", - "BriefDescription": "Marked Data TLB Miss page size 4k" - }, {, "EventCode": "0x4C042", "EventName": "PM_DATA_FROM_L3",
tools/perf/pmu-events/arch/powerpc/power9/other.json +158 -83
618 lines not on this page · raw message
tools/perf/pmu-events/arch/powerpc/power9/pipeline.json +15 -35
110 lines not on this page · raw message
tools/perf/pmu-events/arch/powerpc/power9/pmc.json +0 -5
@@ -9,11 +9,6 @@ "EventName": "PM_MEM_LOC_THRESH_LSU_HIGH", "BriefDescription": "Local memory above threshold for LSU medium" }, - {, - "EventCode": "0x2C056", - "EventName": "PM_DTLB_MISS_4K", - "BriefDescription": "Data TLB Miss page size 4k" - }, {, "EventCode": "0x40118", "EventName": "PM_MRK_DCACHE_RELOAD_INTV",
tools/perf/pmu-events/arch/powerpc/power9/translation.json +5 -5
@@ -29,11 +29,6 @@ "EventName": "PM_ST_FIN", "BriefDescription": "Store finish count. Includes speculative activity" }, - {, - "EventCode": "0x44042", - "EventName": "PM_INST_FROM_L3", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 due to an instruction fetch (not prefetch)" - }, {, "EventCode": "0x1504A", "EventName": "PM_IPTEG_FROM_RL2L3_SHR",
@@ -124,6 +119,11 @@ "EventName": "PM_PMC1_SAVED", "BriefDescription": "PMC1 Rewind Value saved" }, + {, + "EventCode": "0x44042", + "EventName": "PM_INST_FROM_L3", + "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 due to an instruction fetch (not prefetch)" + }, {, "EventCode": "0x200FE", "EventName": "PM_DATA_FROM_L2MISS",