ARM: dts: aspeed: Add Portwell Neptune machine
Subsystems (3)
PATCH 1/1 ARM: dts: aspeed: Add Portwell Neptune machine
Initial introduction of Portwell Neptune family equipped with Aspeed 2500 BMC SoC. This adds the neptune platform device tree file including the flash layout used by the neptune machines.
--- .../devicetree/bindings/vendor-prefixes.txt | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts | 145 +++++++++++++++++++++ 3 files changed, 147 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts
Documentation/devicetree/bindings/vendor-prefixes.txt +1 -0
@@ -228,6 +228,7 @@ pine64 Pine64 pixcir PIXCIR MICROELECTRONICS Co., Ltd plathome Plat'Home Co., Ltd. plda PLDA +portwell Portwell Inc. powervr PowerVR (deprecated, use img) pulsedlight PulsedLight, Inc qca Qualcomm Atheros, Inc.
arch/arm/boot/dts/Makefile +1 -0
@@ -993,6 +993,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += aspeed-bmc-opp-palmetto.dtb \ aspeed-bmc-mellanox-msn.dtb \ aspeed-bmc-quanta-q71l.dtb \ aspeed-bmc-intel-s2600wf.dtb \ + aspeed-bmc-portwell-neptune.dtb \ aspeed-ast2500-evb.dtb endif
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts new file +145 -0
145 lines not on this page · raw message
Signature · 1 line
2.9.5
Hi Amithash,
I have some pinmux-related comments inline below.
Quoted 80 lines · Amithash Prasad
Initial introduction of Portwell Neptune family equipped with Aspeed 2500 BMC SoC. This adds the neptune platform device tree file including the flash layout used by the neptune machines.
Signed-off-by Amithash Prasad <[email protected]>--- .../devicetree/bindings/vendor-prefixes.txt | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts | 145 +++++++++++++++++++++ 3 files changed, 147 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts(quoted diff) renamed from Documentation/devicetree/bindings/vendor-prefixes.txt +0
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Documentation/devicetree/bindings/vendor-prefixes.txtindex 84601d8..9dbbe7d 100644Documentation/devicetree/bindings/vendor-prefixes.txt +1
-0@@ -228,6 +228,7 @@ pine64 Pine64 pixcir PIXCIR MICROELECTRONICS Co., Ltd plathome Plat'Home Co., Ltd. plda PLDA +portwell Portwell Inc. powervr PowerVR (deprecated, use img) pulsedlight PulsedLight, Inc qca Qualcomm Atheros, Inc.arch/arm/boot/dts/Makefile +1
-0@@ -993,6 +993,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += aspeed-bmc-opp- palmetto.dtb \ aspeed-bmc-mellanox-msn.dtb \ aspeed-bmc-quanta-q71l.dtb \ aspeed-bmc-intel-s2600wf.dtb \ + aspeed-bmc-portwell-neptune.dtb \ aspeed-ast2500-evb.dtb endifarch/ renamed from arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts +0
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arm/boot/dts/aspeed-bmc-portwell-neptune.dts
new file mode 100644
index 0000000..542a4cadarch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts new file +35
-0@@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2017 Facebook Inc. +/dts-v1/; + +#include "aspeed-g5.dtsi" +#include <dt-bindings/gpio/aspeed-gpio.h> + +/ { + model = "Portwell Neptune BMC"; + compatible = "portwell,neptune-bmc", "aspeed,ast2500"; + aliases { + serial0 = &uart1; + serial4 = &uart5; + }; + chosen { + stdout-path = &uart5; + bootargs = "console=ttyS4,115200 earlyprintk"; + }; + + memory { + reg = <0x80000000 0x20000000>; + }; + + leds { + compatible = "gpio-leds"; + postcode0 { + label="BMC_UP"; + gpios = <&gpio ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + postcode1 { + label="BMC_HB"; + gpios = <&gpio ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + };
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts line 45
Quoted 10 lines
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts new file +10
-0+ postcode2 { + label="FAULT"; + gpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>; + }; + // postcode3-7 are GPIOH3-H7 + }; +}; + +&wdt2 { + status = "okay";
If you're doing anything with the watchdog reset lines you'll need to mux the WDTRST2 function. Obviously if not then you don't need to worry.
Quoted 15 lines
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts new file +15
-0+}; + +&fmc { + status = "okay"; + flash@0 { + status = "okay"; + m25p,fast-read; +#include "openbmc-flash-layout.dtsi" + }; +}; + +&spi1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1_default>;
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts line 70
Quoted 10 lines
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts new file +10
-0+ flash@0 { + status = "okay"; + m25p,fast-read; + label = "pnor"; + }; +}; + +&uart1 { + // Host Console + status = "okay";
You'll need something like the following here:
pinctrl-names = "default"; pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default &pinctrl_nrts1_default &pinctrl_ndtr1_default &pinctrl_ndsr1_default &pinctrl_ncts1_default &pinctrl_ndcd1_default &pinctrl_nri1_default>;
It depends on how you've wired up your UART to the connector as to how many of those pins you'll want to mux.
Quoted 20 lines
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts new file +20
-0+}; + +&uart5 { + // BMC Console + status = "okay"; +}; + +&mac0 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii1_default>; + use-ncsi; +}; + +&i2c3 { + status = "okay"; + // SMBus to COMe AB +}; +
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts line 100
Quoted 10 lines
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts new file +10
-0+&i2c4 { + status = "okay"; + // I2C to COMe AB +}; + +&i2c5 { + status = "okay"; + pca9555@4e { + compatible = "nxp,pca9555"; + pinctrl-names = "default";
I think you'll need to say what function you wish to mux here, unless this is some quirk of the pca9555. Certainly the example in the documentation has a pinctrl-0 = <...> property.
Quoted 48 lines
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts new file +45
-0+ gpio-controller; + #gpio-cells = <2>; + reg = <0x27>; + }; +}; + +&i2c6 { + status = "okay"; + tpm@20 { + compatible = "infineon,slb9645tt"; + reg = <0x20>; + }; + tmp421@9c { + compatible = "ti,tmp421"; + reg = <0x4e>; + }; + tmp421@9e { + compatible = "ti,tmp421"; + reg = <0x4f>; + }; +}; + +&i2c8 { + status = "okay"; + eeprom@a2 { + compatible = "atmel,24c128"; + reg = <0x51>; + pagesize = <0x32>; + }; +}; + +&pwm_tacho { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>; + fan@0 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x00>; + }; + + fan@1 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x01>; + }; +};Signature · 1 line
2.9.5
Looks okay otherwise.
Cheers,
Andrew
Quoted 6 lines
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts line 100
Quoted 5 lines
+&i2c5 {
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts new file +4
-0+ status = "okay"; + pca9555@4e { + compatible = "nxp,pca9555"; + pinctrl-names = "default";I think you'll need to say what function you wish to mux here, unless this is some quirk of the pca9555. Certainly the example in the documentation has a pinctrl-0 = <...> property.
This is still one part of the board I am studying. I removed the pinctrl part from the v2 patch and will include them when I have a better understanding of the function.