rtlwifi: correct comment
PATCH 1/1 rtlwifi: correct comment
Correct comment. Set bit 3 and bit 4 of 0x0005 register (REG_APS_FSMCO + 1) to 0 which means disable WL suspend, not enable WL suspend.
---
drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h +2 -2
@@ -142,7 +142,7 @@ /*wait power state to suspend*/}, \ {0x0005 ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_ALL_MSK , \PWR_BASEADDR_MAC ,PWR_CMD_WRITE ,BIT (3 ) |BIT (4 ),0 \ - /*0x04[12:11] = 2b'01enable WL suspend*/}, + /*0x04[12:11] = 2b'00 disable WL suspend*/}, #define RTL8188EE_TRANS_CARDEMU_TO_CARDDIS \ {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
@@ -179,7 +179,7 @@ /*wait power state to suspend*/}, \ {0x0005 ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_ALL_MSK , \PWR_BASEADDR_MAC ,PWR_CMD_WRITE ,BIT (3 )|BIT (4 ),0 \ - /*0x04[12:11] = 2b'01enable WL suspend*/}, + /*0x04[12:11] = 2b'00 disable WL suspend*/}, #define RTL8188EE_TRANS_CARDEMU_TO_PDN \ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h +2 -2
@@ -134,7 +134,7 @@/*wait power state to suspend*/ \ {0x0086 ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_SDIO_MSK , \ PWR_BASEADDR_SDIO , PWR_CMD_POLLING, BIT(1), BIT(1)}, \ -/*0x04[12:11] = 2b'01enable WL suspend*/ \ +/*0x04[12:11] = 2b'00 disable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ PWR_BASEADDR_MAC , PWR_CMD_WRITE, BIT(3) | BIT(4), 0},
@@ -181,7 +181,7 @@/*Lock small LDO Register*/ \ {0x00CC ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_SDIO_MSK , \ PWR_BASEADDR_MAC , PWR_CMD_WRITE, BIT(2), 0}, \ -/*0x04[12:11] = 2b'01enable WL suspend*/ \ +/*0x04[12:11] = 2b'00 disable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ PWR_BASEADDR_MAC , PWR_CMD_WRITE, BIT(3) | BIT(4), 0},
drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.h +2 -2
@@ -135,7 +135,7 @@/*wait power state to suspend*/ \ {0x0086 ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_SDIO_MSK ,\ PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), BIT(1)},\ -/*0x04[12:11] = 2b'01enable WL suspend*/ \ +/*0x04[12:11] = 2b'00 disable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,\ PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3)|BIT(4), 0},
@@ -172,7 +172,7 @@ {0x0086 ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK , \PWR_INTF_SDIO_MSK ,PWR_BASEADDR_SDIO ,\ PWR_CMD_POLLING, BIT(1), BIT(1)},\ -/*0x04[12:11] = 2b'00enable WL suspend*/ \ +/*0x04[12:11] = 2b'00 disable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, \PWR_INTF_ALL_MSK ,PWR_BASEADDR_MAC ,\ PWR_CMD_WRITE, BIT(3)|BIT(4), 0},\
drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h +2 -2
@@ -204,7 +204,7 @@/*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ {0x0023 ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_SDIO_MSK , \ PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, \ -/*0x04[12:11] = 2b'01enable WL suspend*/ \ +/*0x04[12:11] = 2b'00 disable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3)|BIT(4), 0},
@@ -251,7 +251,7 @@/*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ {0x004A ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_USB_MSK , \ PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0}, \ -/*0x04[12:11] = 2b'01enable WL suspend*/ \ +/*0x04[12:11] = 2b'00 disable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3)|BIT(4), 0}, \ /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \
drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h +2 -2
@@ -531,7 +531,7 @@ extern struct wlan_pwr_cfg rtl8812_leave_lps_flow /*0x23[4] = 1b'0 12H LDO enter normal mode*/}, \ {0x0005 ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_ALL_MSK ,\PWR_BASEADDR_MAC ,PWR_CMD_WRITE ,BIT3 |BIT4 ,0 \ - /*0x04[12:11] = 2b'01enable WL suspend*/}, + /*0x04[12:11] = 2b'00 disable WL suspend*/}, #define RTL8821A_TRANS_CARDEMU_TO_CARDDIS \ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
@@ -572,7 +572,7 @@ extern struct wlan_pwr_cfg rtl8812_leave_lps_flow /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/}, \ {0x0005 ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_ALL_MSK ,\PWR_BASEADDR_MAC ,PWR_CMD_WRITE ,BIT3 |BIT4 ,0 \ - /*0x04[12:11] = 2b'01enable WL suspend*/},\ + /*0x04[12:11] = 2b'00 disable WL suspend*/},\ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\PWR_BASEADDR_MAC ,PWR_CMD_WRITE ,BIT4 ,0 \ /*0x23[4] = 1b'0 12H LDO enter normal mode*/}, \
Pkshih
maintainerT24gU2F0LCAyMDE4LTAzLTE3IGF0IDIyOjI2ICswODAwLCBLZXZpbiBMbyB3cm90ZToNCj4gQ29y cmVjdCBjb21tZW50LsKgwqBTZXQgYml0IDMgYW5kIGJpdCA0IG9mIDB4MDAwNSByZWdpc3RlciAo UkVHX0FQU19GU01DTyArIDEpDQo+IHRvIDAgd2hpY2ggbWVhbnMgZGlzYWJsZSBXTCBzdXNwZW5k LCBub3QgZW5hYmxlIFdMIHN1c3BlbmQuDQo+IA0KPiBTaWduZWQtb2ZmLWJ5OiBLZXZpbiBMbyA8 a2V2bG9Aa2V2bG8ub3JnPg0KQWNrZWQtYnk6IFBpbmctS2UgU2hpaCA8cGtzaGloQHJlYWx0ZWsu Y29tPg0KPiAtLS0NCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvbmV0L3dpcmVsZXNzL3JlYWx0ZWsv cnRsd2lmaS9ydGw4MTg4ZWUvcHdyc2VxLmgNCj4gYi9kcml2ZXJzL25ldC93aXJlbGVzcy9yZWFs dGVrL3J0bHdpZmkvcnRsODE4OGVlL3B3cnNlcS5oDQo+IGluZGV4IGYyZDljNjExNmU1Yy4uODM3 OWEzZTUxOThjIDEwMDY0NA0KPiAtLS0gYS9kcml2ZXJzL25ldC93aXJlbGVzcy9yZWFsdGVrL3J0 bHdpZmkvcnRsODE4OGVlL3B3cnNlcS5oDQo+ICsrKyBiL2RyaXZlcnMvbmV0L3dpcmVsZXNzL3Jl YWx0ZWsvcnRsd2lmaS9ydGw4MTg4ZWUvcHdyc2VxLmgNCj4gQEAgLTE0Miw3ICsxNDIsNyBAQA0K PiDCoAkvKndhaXQgcG93ZXIgc3RhdGUgdG8gc3VzcGVuZCovfSwJCQkJXA0KPiDCoAl7MHgwMDA1 LCBQV1JfQ1VUX0FMTF9NU0ssIFBXUl9GQUJfQUxMX01TSywgUFdSX0lOVEZfQUxMX01TSywJXA0K PiDCoAlQV1JfQkFTRUFERFJfTUFDLCBQV1JfQ01EX1dSSVRFLCBCSVQoMykgfCBCSVQoNCksIDAJ CVwNCj4gLQkvKjB4MDRbMTI6MTFdID0gMmInMDFlbmFibGUgV0wgc3VzcGVuZCovfSwNCj4gKwkv KjB4MDRbMTI6MTFdID0gMmInMDAgZGlzYWJsZSBXTCBzdXNwZW5kKi99LA0KPiDCoA0KDQpbLi4u XQ0KDQo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL25ldC93aXJlbGVzcy9yZWFsdGVrL3J0bHdpZmkv cnRsODE5MmVlL3B3cnNlcS5oDQo+IGIvZHJpdmVycy9uZXQvd2lyZWxlc3MvcmVhbHRlay9ydGx3 aWZpL3J0bDgxOTJlZS9wd3JzZXEuaA0KPiBpbmRleCA3ODFlZWFhNmFmNDkuLmM1NzA4MDE1MDhj YyAxMDA2NDQNCj4gLS0tIGEvZHJpdmVycy9uZXQvd2lyZWxlc3MvcmVhbHRlay9ydGx3aWZpL3J0 bDgxOTJlZS9wd3JzZXEuaA0KPiArKysgYi9kcml2ZXJzL25ldC93aXJlbGVzcy9yZWFsdGVrL3J0 bHdpZmkvcnRsODE5MmVlL3B3cnNlcS5oDQo+IEBAIC0xMzQsNyArMTM0LDcgQEANCj4gwqAJLyp3 YWl0IHBvd2VyIHN0YXRlIHRvIHN1c3BlbmQqLwkJCQkJXA0KPiDCoAl7MHgwMDg2LCBQV1JfQ1VU X0FMTF9NU0ssIFBXUl9GQUJfQUxMX01TSywgUFdSX0lOVEZfU0RJT19NU0ssCVwNCj4gwqAJwqBQ V1JfQkFTRUFERFJfU0RJTyAsIFBXUl9DTURfUE9MTElORywgQklUKDEpLCBCSVQoMSl9LAkJXA0K PiAtCS8qMHgwNFsxMjoxMV0gPSAyYicwMWVuYWJsZSBXTCBzdXNwZW5kKi8JCQlcDQo+ICsJLyow eDA0WzEyOjExXSA9IDJiJzAwIGRpc2FibGUgV0wgc3VzcGVuZCovCQkJXA0KPiDCoAl7MHgwMDA1 LCBQV1JfQ1VUX0FMTF9NU0ssIFBXUl9GQUJfQUxMX01TSywgUFdSX0lOVEZfQUxMX01TSywJXA0K PiDCoAnCoFBXUl9CQVNFQUREUl9NQUMgLCBQV1JfQ01EX1dSSVRFLCBCSVQoMykgfCBCSVQoNCks IDB9LA0KPiDCoA0KDQpGb3IgZnVydGhlciByZXZpZXdlcnMsIHBsZWFzZSBwYXkgYXR0ZW50aW9u IHRvIGNvbW1lbnRzIGV4aXN0IGFib3ZlIG9ywqANCmJlbG93IHRoZSBzdGF0ZW1lbnRzLg0KDQo=
Quoted 108 lines · Kevin Lo
Correct comment. Set bit 3 and bit 4 of
0x0005register (REG_APS_FSMCO+ 1) to 0 which means disable WL suspend, not enable WL suspend.Signed-off-by Kevin Lo <[email protected]>Acked-by Ping-Ke Shih <[email protected]>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h +2
-2@@ -142,7 +142,7 @@ /*wait power state to suspend*/}, \ {0x0005 ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_ALL_MSK , \PWR_BASEADDR_MAC ,PWR_CMD_WRITE ,BIT (3 ) |BIT (4 ),0 \ - /*0x04[12:11] = 2b'01enable WL suspend*/}, + /*0x04[12:11] = 2b'00 disable WL suspend*/}, #define RTL8188EE_TRANS_CARDEMU_TO_CARDDIS \ {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \@@ -179,7 +179,7 @@ /*wait power state to suspend*/}, \ {0x0005 ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_ALL_MSK , \PWR_BASEADDR_MAC ,PWR_CMD_WRITE ,BIT (3 )|BIT (4 ),0 \ - /*0x04[12:11] = 2b'01enable WL suspend*/}, + /*0x04[12:11] = 2b'00 disable WL suspend*/}, #define RTL8188EE_TRANS_CARDEMU_TO_PDN \ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h +2
-2@@ -134,7 +134,7 @@/*wait power state to suspend*/ \ {0x0086 ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_SDIO_MSK , \ PWR_BASEADDR_SDIO , PWR_CMD_POLLING, BIT(1), BIT(1)}, \ -/*0x04[12:11] = 2b'01enable WL suspend*/ \ +/*0x04[12:11] = 2b'00 disable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ PWR_BASEADDR_MAC , PWR_CMD_WRITE, BIT(3) | BIT(4), 0},@@ -181,7 +181,7 @@/*Lock small LDO Register*/ \ {0x00CC ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_SDIO_MSK , \ PWR_BASEADDR_MAC , PWR_CMD_WRITE, BIT(2), 0}, \ -/*0x04[12:11] = 2b'01enable WL suspend*/ \ +/*0x04[12:11] = 2b'00 disable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ PWR_BASEADDR_MAC , PWR_CMD_WRITE, BIT(3) | BIT(4), 0},drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.h +2
-2@@ -135,7 +135,7 @@/*wait power state to suspend*/ \ {0x0086 ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_SDIO_MSK ,\ PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), BIT(1)},\ -/*0x04[12:11] = 2b'01enable WL suspend*/ \ +/*0x04[12:11] = 2b'00 disable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,\ PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3)|BIT(4), 0},@@ -172,7 +172,7 @@ {0x0086 ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK , \PWR_INTF_SDIO_MSK ,PWR_BASEADDR_SDIO ,\ PWR_CMD_POLLING, BIT(1), BIT(1)},\ -/*0x04[12:11] = 2b'00enable WL suspend*/ \ +/*0x04[12:11] = 2b'00 disable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, \PWR_INTF_ALL_MSK ,PWR_BASEADDR_MAC ,\ PWR_CMD_WRITE, BIT(3)|BIT(4), 0},\drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h +2
-2@@ -204,7 +204,7 @@/*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ {0x0023 ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_SDIO_MSK , \ PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, \ -/*0x04[12:11] = 2b'01enable WL suspend*/ \ +/*0x04[12:11] = 2b'00 disable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3)|BIT(4), 0},@@ -251,7 +251,7 @@/*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ {0x004A ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_USB_MSK , \ PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0}, \ -/*0x04[12:11] = 2b'01enable WL suspend*/ \ +/*0x04[12:11] = 2b'00 disable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \ PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3)|BIT(4), 0}, \ /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h +1
-1@@ -531,7 +531,7 @@ extern struct wlan_pwr_cfg rtl8812_leave_lps_flow /*0x23[4] = 1b'0 12H LDO enter normal mode*/}, \ {0x0005 ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_ALL_MSK ,\PWR_BASEADDR_MAC ,PWR_CMD_WRITE ,BIT3 |BIT4 ,0 \ - /*0x04[12:11] = 2b'01enable WL suspend*/}, + /*0x04[12:11] = 2b'00 disable WL suspend*/}, #define RTL8821A_TRANS_CARDEMU_TO_CARDDIS \ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h extern struct wlan_pwr_cfg rtl8812_leave_lps_flow · line 578
Quoted 8 lines
drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h +1
-1@@ -572,7 +572,7 @@ extern struct wlan_pwr_cfg rtl8812_leave_lps_flow /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/}, \ {0x0005 ,PWR_CUT_ALL_MSK ,PWR_FAB_ALL_MSK ,PWR_INTF_ALL_MSK ,\PWR_BASEADDR_MAC ,PWR_CMD_WRITE ,BIT3 |BIT4 ,0 \ - /*0x04[12:11] = 2b'01enable WL suspend*/},\ + /*0x04[12:11] = 2b'00 disable WL suspend*/},\ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\PWR_BASEADDR_MAC ,PWR_CMD_WRITE ,BIT4 ,0 \ /*0x23[4] = 1b'0 12H LDO enter normal mode*/}, \
Patch applied to wireless-drivers-next.git, thanks.
692f5deccdae rtlwifi: correct comment
Signature · 3 lines
https://patchwork.kernel.org/patch/10290843/ https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches