Cleanup excessive DSI host controller version checks
v2 cover Cleanup excessive DSI host controller version checks
This patch series aims to create and bind dsi host controller helper functions to functionalities that vary across DSI v2, DSI 6G 1.x and DSI 6G v2.0+ controllers. These functionalities are currently under excessive version checks which is now replaced with the corresponding helper function.
V2:
Removes command broadcast support for DSI 6G v2.0+ controllers from the patch series and incorporates all the suggested corrections
Sibi S (3):
drm/msm/dsi: add dsi host helper functions support drm/msm/dsi: add implementation for helper functions drm/msm/dsi: replace version checks with helper functions
drivers/gpu/drm/msm/dsi/dsi.h | 16 ++ drivers/gpu/drm/msm/dsi/dsi_cfg.c | 56 +++++- drivers/gpu/drm/msm/dsi/dsi_cfg.h | 12 ++ drivers/gpu/drm/msm/dsi/dsi_host.c | 362 +++++++++++++++++++++---------------- 4 files changed, 280 insertions(+), 166 deletions(-)
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The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
PATCH v2 1/3 drm/msm/dsi: add dsi host helper functions support
Add dsi host helper functions support for DSI v2 and DSI 6G 1.x controllers that are under version checks
Signed-off-by Sibi S <[email protected]>
--- drivers/gpu/drm/msm/dsi/dsi.h | 1 + drivers/gpu/drm/msm/dsi/dsi_cfg.h | 12 ++++++++++++ 2 files changed, 13 insertions(+)
drivers/gpu/drm/msm/dsi/dsi.h +1 -0
@@ -149,6 +149,7 @@ static inline int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll,#endif /* dsi host */ +struct msm_dsi_host ;int msm_dsi_host_xfer_prepare (struct mipi_dsi_host *host,const struct mipi_dsi_msg *msg); void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host,
drivers/gpu/drm/msm/dsi/dsi_cfg.h +12 -0
@@ -40,10 +40,22 @@ struct msm_dsi_config {const int num_dsi; }; +struct msm_dsi_host_cfg_ops { +int (*link_clk_enable)(struct msm_dsi_host *msm_host); +void (*link_clk_disable)(struct msm_dsi_host *msm_host); +int (*clk_init_ver)(struct msm_dsi_host *msm_host); +int (*tx_buf_alloc)(struct msm_dsi_host *msm_host,int size); +void * (*tx_buf_get)(struct msm_dsi_host *msm_host); +void (*tx_buf_put)(struct msm_dsi_host *msm_host); +int (*dma_base_get)(struct msm_dsi_host *msm_host,uint64_t *iova); +int (*calc_clk_rate)(struct msm_dsi_host *msm_host); +}; +struct msm_dsi_cfg_handler {u32 major;u32 minor;const struct msm_dsi_config *cfg; +const struct msm_dsi_host_cfg_ops *ops; };const struct msm_dsi_cfg_handler *msm_dsi_cfg_get (u32 major,u32 minor);
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The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
PATCH v2 2/3 drm/msm/dsi: add implementation for helper functions
In reply to Sibi SAdd dsi host helper function implementation for DSI v2 DSI 6G 1.x and DSI 6G v2.0+ controllers
Signed-off-by Sibi S <[email protected]>
--- drivers/gpu/drm/msm/dsi/dsi.h | 15 +++ drivers/gpu/drm/msm/dsi/dsi_cfg.c | 56 +++++++-- drivers/gpu/drm/msm/dsi/dsi_host.c | 236 ++++++++++++++++++++++++++++++++++++- 3 files changed, 296 insertions(+), 11 deletions(-)
drivers/gpu/drm/msm/dsi/dsi.h +15 -0
@@ -183,6 +183,21 @@ int msm_dsi_host_modeset_init(struct mipi_dsi_host *host,int msm_dsi_host_init (struct msm_dsi *msm_dsi);int msm_dsi_runtime_suspend (struct device *dev);int msm_dsi_runtime_resume (struct device *dev); +int dsi_link_clk_enable_6g (struct msm_dsi_host *msm_host); +int dsi_link_clk_enable_v2 (struct msm_dsi_host *msm_host); +void dsi_link_clk_disable_6g (struct msm_dsi_host *msm_host); +void dsi_link_clk_disable_v2 (struct msm_dsi_host *msm_host); +int dsi_tx_buf_alloc_6g (struct msm_dsi_host *msm_host,int size); +int dsi_tx_buf_alloc_v2 (struct msm_dsi_host *msm_host,int size); +void *dsi_tx_buf_get_6g (struct msm_dsi_host *msm_host); +void *dsi_tx_buf_get_v2 (struct msm_dsi_host *msm_host); +void dsi_tx_buf_put_6g (struct msm_dsi_host *msm_host); +int dsi_dma_base_get_6g (struct msm_dsi_host *msm_host,uint64_t *iova); +int dsi_dma_base_get_v2 (struct msm_dsi_host *msm_host,uint64_t *iova); +int dsi_clk_init_v2 (struct msm_dsi_host *msm_host); +int dsi_clk_init_6g_v2 (struct msm_dsi_host *msm_host); +int dsi_calc_clk_rate_v2 (struct msm_dsi_host *msm_host); +int dsi_calc_clk_rate_6g (struct msm_dsi_host *msm_host);/* dsi phy */ struct msm_dsi_phy ;
drivers/gpu/drm/msm/dsi/dsi_cfg.c +47 -9
67 lines not on this page · raw message
drivers/gpu/drm/msm/dsi/dsi_host.c +234 -2
284 lines not on this page · raw message
Signature · 7 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v2 2/3] drm/msm/dsi: add implementation for helper functions
Quoted 214 lines · Sibi S
Add dsi host helper function implementation for DSI v2 DSI 6G 1.x and DSI 6G v2.0+ controllers
Signed-off-by Sibi S <[email protected]>--- drivers/gpu/drm/msm/dsi/dsi.h | 15 +++ drivers/gpu/drm/msm/dsi/dsi_cfg.c | 56 +++++++-- drivers/gpu/drm/msm/dsi/dsi_host.c | 236 ++++++++++++++++++++++++++++++++++++- 3 files changed, 296 insertions(+), 11 deletions(-)drivers/gpu/drm/msm/dsi/dsi.h +15
-0@@ -183,6 +183,21 @@ int msm_dsi_host_modeset_init(struct mipi_dsi_host *host,int msm_dsi_host_init (struct msm_dsi *msm_dsi);int msm_dsi_runtime_suspend (struct device *dev);int msm_dsi_runtime_resume (struct device *dev); +int dsi_link_clk_enable_6g (struct msm_dsi_host *msm_host); +int dsi_link_clk_enable_v2 (struct msm_dsi_host *msm_host); +void dsi_link_clk_disable_6g (struct msm_dsi_host *msm_host); +void dsi_link_clk_disable_v2 (struct msm_dsi_host *msm_host); +int dsi_tx_buf_alloc_6g (struct msm_dsi_host *msm_host,int size); +int dsi_tx_buf_alloc_v2 (struct msm_dsi_host *msm_host,int size); +void *dsi_tx_buf_get_6g (struct msm_dsi_host *msm_host); +void *dsi_tx_buf_get_v2 (struct msm_dsi_host *msm_host); +void dsi_tx_buf_put_6g (struct msm_dsi_host *msm_host); +int dsi_dma_base_get_6g (struct msm_dsi_host *msm_host,uint64_t *iova); +int dsi_dma_base_get_v2 (struct msm_dsi_host *msm_host,uint64_t *iova); +int dsi_clk_init_v2 (struct msm_dsi_host *msm_host); +int dsi_clk_init_6g_v2 (struct msm_dsi_host *msm_host); +int dsi_calc_clk_rate_v2 (struct msm_dsi_host *msm_host); +int dsi_calc_clk_rate_6g (struct msm_dsi_host *msm_host);/* dsi phy */ struct msm_dsi_phy ;drivers/gpu/drm/msm/dsi/dsi_cfg.c +47
-9@@ -136,20 +136,58 @@ static const struct msm_dsi_config sdm845_dsi_cfg = { .num_dsi = 2, }; +const static struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = { + .link_clk_enable = dsi_link_clk_enable_v2, + .link_clk_disable = dsi_link_clk_disable_v2, + .clk_init_ver = dsi_clk_init_v2, + .tx_buf_alloc = dsi_tx_buf_alloc_v2, + .tx_buf_get = dsi_tx_buf_get_v2, + .tx_buf_put =NULL , + .dma_base_get = dsi_dma_base_get_v2, + .calc_clk_rate = dsi_calc_clk_rate_v2, +}; + +const static struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = { + .link_clk_enable = dsi_link_clk_enable_6g, + .link_clk_disable = dsi_link_clk_disable_6g, + .clk_init_ver =NULL , + .tx_buf_alloc = dsi_tx_buf_alloc_6g, + .tx_buf_get = dsi_tx_buf_get_6g, + .tx_buf_put = dsi_tx_buf_put_6g, + .dma_base_get = dsi_dma_base_get_6g, + .calc_clk_rate = dsi_calc_clk_rate_6g, +}; + +const static struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = { + .link_clk_enable = dsi_link_clk_enable_6g, + .link_clk_disable = dsi_link_clk_disable_6g, + .clk_init_ver = dsi_clk_init_6g_v2, + .tx_buf_alloc = dsi_tx_buf_alloc_6g, + .tx_buf_get = dsi_tx_buf_get_6g, + .tx_buf_put = dsi_tx_buf_put_6g, + .dma_base_get = dsi_dma_base_get_6g, + .calc_clk_rate = dsi_calc_clk_rate_6g, +}; +static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = { - {MSM_DSI_VER_MAJOR_V2 ,MSM_DSI_V2_VER_MINOR_8064 , &apq8064_dsi_cfg}, + {MSM_DSI_VER_MAJOR_V2 ,MSM_DSI_V2_VER_MINOR_8064 , + &apq8064_dsi_cfg, &msm_dsi_v2_host_ops}, {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_0 , - &msm8974_apq8084_dsi_cfg}, + &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_1 , - &msm8974_apq8084_dsi_cfg}, + &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_1_1 , - &msm8974_apq8084_dsi_cfg}, + &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_2 , - &msm8974_apq8084_dsi_cfg}, - {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_3 , &msm8994_dsi_cfg}, - {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_3_1 , &msm8916_dsi_cfg}, - {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_4_1 , &msm8996_dsi_cfg}, - {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V2_2_1 , &sdm845_dsi_cfg}, + &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, + {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_3 , + &msm8994_dsi_cfg, &msm_dsi_6g_host_ops}, + {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_3_1 , + &msm8916_dsi_cfg, &msm_dsi_6g_host_ops}, + {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_4_1 , + &msm8996_dsi_cfg, &msm_dsi_6g_host_ops}, + {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V2_2_1 , + &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, };const struct msm_dsi_cfg_handler *msm_dsi_cfg_get (u32 major,u32 minor)drivers/gpu/drm/msm/dsi/dsi_host.c +68
-2@@ -331,6 +331,54 @@ static int dsi_regulator_init(struct msm_dsi_host *msm_host)return 0 ; } +int dsi_clk_init_v2 (struct msm_dsi_host *msm_host) +{ +struct platform_device *pdev = msm_host->pdev; +int ret =0 ; + + msm_host->src_clk =msm_clk_get (pdev,"src" ); + +if (IS_ERR (msm_host->src_clk)) { + ret =PTR_ERR (msm_host->src_clk); +pr_err ("%s: can't find src clock. ret=%d\n" , + __func__, ret); + msm_host->src_clk =NULL ; +return ret; + } + + msm_host->esc_clk_src =clk_get_parent (msm_host->esc_clk); +if (!msm_host->esc_clk_src) { + ret = -ENODEV ; +pr_err ("%s: can't get esc clock parent. ret=%d\n" , + __func__, ret); +return ret; + } + + msm_host->dsi_clk_src =clk_get_parent (msm_host->src_clk); +if (!msm_host->dsi_clk_src) { + ret = -ENODEV ; +pr_err ("%s: can't get src clock parent. ret=%d\n" , + __func__, ret); + } + +return ret; +} + +int dsi_clk_init_6g_v2 (struct msm_dsi_host *msm_host) +{ +struct platform_device *pdev = msm_host->pdev; +int ret =0 ; + + msm_host->byte_intf_clk =msm_clk_get (pdev,"byte_intf" ); +if (IS_ERR (msm_host->byte_intf_clk)) { + ret =PTR_ERR (msm_host->byte_intf_clk); +pr_err ("%s: can't find byte_intf clock. ret=%d\n" , + __func__, ret); + } + +return ret; +} +static int dsi_clk_init (struct msm_dsi_host *msm_host) {struct platform_device *pdev = msm_host->pdev;@@ -497,7 +545,7 @@ int msm_dsi_runtime_resume(struct device *dev)return dsi_bus_clk_enable (msm_host); } -static int dsi_link_clk_enable_6g (struct msm_dsi_host *msm_host) +int dsi_link_clk_enable_6g (struct msm_dsi_host *msm_host) {int ret;@@ -565,7 +613,7 @@ static int dsi_link_clk_enable_6g(struct msm_dsi_host *msm_host)return ret; } -static int dsi_link_clk_enable_v2 (struct msm_dsi_host *msm_host) +int dsi_link_clk_enable_v2 (struct msm_dsi_host *msm_host) {int ret;@@ -643,6 +691,23 @@ static int dsi_link_clk_enable(struct msm_dsi_host *msm_host)return dsi_link_clk_enable_v2 (msm_host); } +void dsi_link_clk_disable_6g (struct msm_dsi_host *msm_host) +{ +clk_disable_unprepare (msm_host->esc_clk); +clk_disable_unprepare (msm_host->pixel_clk); +if (msm_host->byte_intf_clk) +clk_disable_unprepare (msm_host->byte_intf_clk); +clk_disable_unprepare (msm_host->byte_clk); +} + +void dsi_link_clk_disable_v2 (struct msm_dsi_host *msm_host) +{ +clk_disable_unprepare (msm_host->pixel_clk); +clk_disable_unprepare (msm_host->src_clk); +clk_disable_unprepare (msm_host->esc_clk); +clk_disable_unprepare (msm_host->byte_clk); +} +static void dsi_link_clk_disable (struct msm_dsi_host *msm_host) {const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;@@ -661,6 +726,94 @@ static void dsi_link_clk_disable(struct msm_dsi_host *msm_host) } } +int dsi_calc_clk_rate_6g (struct msm_dsi_host *msm_host)
drivers/gpu/drm/msm/dsi/dsi_host.c static void dsi_link_clk_disable(struct msm_dsi_host *msm_host) · line 739
Quoted 10 lines
drivers/gpu/drm/msm/dsi/dsi_host.c +10
-0+{ +struct drm_display_mode *mode = msm_host->mode; +u8 lanes = msm_host->lanes; +u32 bpp =dsi_get_bpp (msm_host->format); +u32 pclk_rate; + +if (!mode) { +pr_err ("%s: mode not set\n" , __func__); +return -EINVAL ; + }
As far as I can tell from patch 3/3 the calc_clk_rate() function hook is only called once and mode_host is guaranteed to be not null. I don't think this check is needed.
Quoted 19 lines
drivers/gpu/drm/msm/dsi/dsi_host.c +19
-0+ pclk_rate = mode->clock *1000 ; +if (lanes >0 ) { + msm_host->byte_clk_rate = (pclk_rate * bpp) / (8 * lanes); + }else { +pr_err ("%s: forcing mdss_dsi lanes to 1\n" , __func__); + msm_host->byte_clk_rate = (pclk_rate * bpp) /8 ; + } + +DBG ("pclk=%d, bclk=%d" , pclk_rate, msm_host->byte_clk_rate); + + msm_host->esc_clk_rate =clk_get_rate (msm_host->esc_clk); + +return 0 ; +} + +int dsi_calc_clk_rate_v2 (struct msm_dsi_host *msm_host) +{ +struct drm_display_mode *mode = msm_host->mode; +u8 lanes = msm_host->lanes;
drivers/gpu/drm/msm/dsi/dsi_host.c static void dsi_link_clk_disable(struct msm_dsi_host *msm_host)
Quoted 10 lines
drivers/gpu/drm/msm/dsi/dsi_host.c +9
-0+u32 bpp =dsi_get_bpp (msm_host->format); +u32 pclk_rate; +unsigned int esc_mhz, esc_div; +unsigned long byte_mhz; + +if (!mode) { +pr_err ("%s: mode not set\n" , __func__); +return -EINVAL ; + }
Or this.
Quoted 67 lines
drivers/gpu/drm/msm/dsi/dsi_host.c +60
-0+ pclk_rate = mode->clock *1000 ; +if (lanes >0 ) { + msm_host->byte_clk_rate = (pclk_rate * bpp) / (8 * lanes); + }else { +pr_err ("%s: forcing mdss_dsi lanes to 1\n" , __func__); + msm_host->byte_clk_rate = (pclk_rate * bpp) /8 ; + } + +DBG ("pclk=%d, bclk=%d" , pclk_rate, msm_host->byte_clk_rate); + + msm_host->src_clk_rate = (pclk_rate * bpp) /8 ; + +/* +* esc clock is byte clock followed by a 4 bit divider, +* we need to find an escape clock frequency within the +* mipi DSI spec range within the maximum divider limit +* We iterate here between an escape clock frequencey +* between 20 Mhz to 5 Mhz and pick up the first one +* that can be supported by our divider +*/ + + byte_mhz = msm_host->byte_clk_rate /1000000 ; + +for (esc_mhz =20 ; esc_mhz >=5 ; esc_mhz--) { + esc_div =DIV_ROUND_UP (byte_mhz, esc_mhz); + +/* +* TODO: Ideally, we shouldn't know what sort of divider +* is available in mmss_cc, we're just assuming that +* it'll always be a 4 bit divider. Need to come up with +* a better way here. +*/ +if (esc_div >=1 && esc_div <=16 ) +break ; + } + +if (esc_mhz <5 ) +return -EINVAL ; + + msm_host->esc_clk_rate = msm_host->byte_clk_rate / esc_div; + +DBG ("esc=%d, src=%d" , msm_host->esc_clk_rate, + msm_host->src_clk_rate); + +return 0 ; +} +static int dsi_calc_clk_rate (struct msm_dsi_host *msm_host) {struct drm_display_mode *mode = msm_host->mode;@@ -1008,6 +1161,49 @@ static void dsi_wait4video_eng_busy(struct msm_dsi_host *msm_host) } } +int dsi_tx_buf_alloc_6g (struct msm_dsi_host *msm_host,int size) +{ +struct drm_device *dev = msm_host->dev; +struct msm_drm_private *priv = dev->dev_private; +int ret; +uint64_t iova; + + msm_host->tx_gem_obj =msm_gem_new (dev, size,MSM_BO_UNCACHED ); +if (IS_ERR (msm_host->tx_gem_obj)) { + ret =PTR_ERR (msm_host->tx_gem_obj); +pr_err ("%s: failed to allocate gem, %d\n" , + __func__, ret); + msm_host->tx_gem_obj =NULL ;
drivers/gpu/drm/msm/dsi/dsi_host.c static void dsi_wait4video_eng_busy(struct msm_dsi_host *msm_host) · line 1186
Quoted 10 lines
drivers/gpu/drm/msm/dsi/dsi_host.c +10
-0+return ret; + } + + ret =msm_gem_get_iova (msm_host->tx_gem_obj, + priv->kms->aspace, &iova); +mutex_unlock (&dev->struct_mutex); +if (ret) { +pr_err ("%s: failed to get iova, %d\n" , __func__, ret); +return ret; + }
I'm not sure if you also need to vmap this at some point, but we have a handy helper function for in-kernel gem objects to automate a bit of this:
void *msm_gem_kernel_new(struct drm_device *dev, uint32_t size,
uint32_t flags, struct msm_gem_address_space *aspace, struct drm_gem_object **bo, uint64_t *iova);
Jordan
Signature · 6 lines
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v2 2/3] drm/msm/dsi: add implementation for helper functions
Hi Jordan,
Thanks for the review.
Quoted 214 lines · Jordan Crouse
Quoted 213 lines · Sibi S
Add dsi host helper function implementation for DSI v2 DSI 6G 1.x and DSI 6G v2.0+ controllers
Signed-off-by Sibi S <[email protected]>--- drivers/gpu/drm/msm/dsi/dsi.h | 15 +++ drivers/gpu/drm/msm/dsi/dsi_cfg.c | 56 +++++++-- drivers/gpu/drm/msm/dsi/dsi_host.c | 236 ++++++++++++++++++++++++++++++++++++- 3 files changed, 296 insertions(+), 11 deletions(-)drivers/gpu/drm/msm/dsi/dsi.h +15
-0@@ -183,6 +183,21 @@ int msm_dsi_host_modeset_init(struct mipi_dsi_host *host,int msm_dsi_host_init (struct msm_dsi *msm_dsi);int msm_dsi_runtime_suspend (struct device *dev);int msm_dsi_runtime_resume (struct device *dev); +int dsi_link_clk_enable_6g (struct msm_dsi_host *msm_host); +int dsi_link_clk_enable_v2 (struct msm_dsi_host *msm_host); +void dsi_link_clk_disable_6g (struct msm_dsi_host *msm_host); +void dsi_link_clk_disable_v2 (struct msm_dsi_host *msm_host); +int dsi_tx_buf_alloc_6g (struct msm_dsi_host *msm_host,int size); +int dsi_tx_buf_alloc_v2 (struct msm_dsi_host *msm_host,int size); +void *dsi_tx_buf_get_6g (struct msm_dsi_host *msm_host); +void *dsi_tx_buf_get_v2 (struct msm_dsi_host *msm_host); +void dsi_tx_buf_put_6g (struct msm_dsi_host *msm_host); +int dsi_dma_base_get_6g (struct msm_dsi_host *msm_host,uint64_t *iova); +int dsi_dma_base_get_v2 (struct msm_dsi_host *msm_host,uint64_t *iova); +int dsi_clk_init_v2 (struct msm_dsi_host *msm_host); +int dsi_clk_init_6g_v2 (struct msm_dsi_host *msm_host); +int dsi_calc_clk_rate_v2 (struct msm_dsi_host *msm_host); +int dsi_calc_clk_rate_6g (struct msm_dsi_host *msm_host);/* dsi phy */ struct msm_dsi_phy ;drivers/gpu/drm/msm/dsi/dsi_cfg.c +47
-9@@ -136,20 +136,58 @@ static const struct msm_dsi_config sdm845_dsi_cfg = { .num_dsi = 2, }; +const static struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = { + .link_clk_enable = dsi_link_clk_enable_v2, + .link_clk_disable = dsi_link_clk_disable_v2, + .clk_init_ver = dsi_clk_init_v2, + .tx_buf_alloc = dsi_tx_buf_alloc_v2, + .tx_buf_get = dsi_tx_buf_get_v2, + .tx_buf_put =NULL , + .dma_base_get = dsi_dma_base_get_v2, + .calc_clk_rate = dsi_calc_clk_rate_v2, +}; + +const static struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = { + .link_clk_enable = dsi_link_clk_enable_6g, + .link_clk_disable = dsi_link_clk_disable_6g, + .clk_init_ver =NULL , + .tx_buf_alloc = dsi_tx_buf_alloc_6g, + .tx_buf_get = dsi_tx_buf_get_6g, + .tx_buf_put = dsi_tx_buf_put_6g, + .dma_base_get = dsi_dma_base_get_6g, + .calc_clk_rate = dsi_calc_clk_rate_6g, +}; + +const static struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = { + .link_clk_enable = dsi_link_clk_enable_6g, + .link_clk_disable = dsi_link_clk_disable_6g, + .clk_init_ver = dsi_clk_init_6g_v2, + .tx_buf_alloc = dsi_tx_buf_alloc_6g, + .tx_buf_get = dsi_tx_buf_get_6g, + .tx_buf_put = dsi_tx_buf_put_6g, + .dma_base_get = dsi_dma_base_get_6g, + .calc_clk_rate = dsi_calc_clk_rate_6g, +}; +static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = { - {MSM_DSI_VER_MAJOR_V2 ,MSM_DSI_V2_VER_MINOR_8064 , &apq8064_dsi_cfg}, + {MSM_DSI_VER_MAJOR_V2 ,MSM_DSI_V2_VER_MINOR_8064 , + &apq8064_dsi_cfg, &msm_dsi_v2_host_ops}, {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_0 , - &msm8974_apq8084_dsi_cfg}, + &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_1 , - &msm8974_apq8084_dsi_cfg}, + &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_1_1 , - &msm8974_apq8084_dsi_cfg}, + &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_2 , - &msm8974_apq8084_dsi_cfg}, - {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_3 , &msm8994_dsi_cfg}, - {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_3_1 , &msm8916_dsi_cfg}, - {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_4_1 , &msm8996_dsi_cfg}, - {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V2_2_1 , &sdm845_dsi_cfg}, + &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, + {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_3 , + &msm8994_dsi_cfg, &msm_dsi_6g_host_ops}, + {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_3_1 , + &msm8916_dsi_cfg, &msm_dsi_6g_host_ops}, + {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V1_4_1 , + &msm8996_dsi_cfg, &msm_dsi_6g_host_ops}, + {MSM_DSI_VER_MAJOR_6G ,MSM_DSI_6G_VER_MINOR_V2_2_1 , + &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, };const struct msm_dsi_cfg_handler *msm_dsi_cfg_get (u32 major,u32 minor)drivers/gpu/drm/msm/dsi/dsi_host.c +67
-2@@ -331,6 +331,54 @@ static int dsi_regulator_init(struct msm_dsi_host *msm_host)return 0 ; } +int dsi_clk_init_v2 (struct msm_dsi_host *msm_host) +{ +struct platform_device *pdev = msm_host->pdev; +int ret =0 ; + + msm_host->src_clk =msm_clk_get (pdev,"src" ); + +if (IS_ERR (msm_host->src_clk)) { + ret =PTR_ERR (msm_host->src_clk); +pr_err ("%s: can't find src clock. ret=%d\n" , + __func__, ret); + msm_host->src_clk =NULL ; +return ret; + } + + msm_host->esc_clk_src =clk_get_parent (msm_host->esc_clk); +if (!msm_host->esc_clk_src) { + ret = -ENODEV ; +pr_err ("%s: can't get esc clock parent. ret=%d\n" , + __func__, ret); +return ret; + } + + msm_host->dsi_clk_src =clk_get_parent (msm_host->src_clk); +if (!msm_host->dsi_clk_src) { + ret = -ENODEV ; +pr_err ("%s: can't get src clock parent. ret=%d\n" , + __func__, ret); + } + +return ret; +} + +int dsi_clk_init_6g_v2 (struct msm_dsi_host *msm_host) +{ +struct platform_device *pdev = msm_host->pdev; +int ret =0 ; + + msm_host->byte_intf_clk =msm_clk_get (pdev,"byte_intf" ); +if (IS_ERR (msm_host->byte_intf_clk)) { + ret =PTR_ERR (msm_host->byte_intf_clk); +pr_err ("%s: can't find byte_intf clock. ret=%d\n" , + __func__, ret); + } + +return ret; +} +static int dsi_clk_init (struct msm_dsi_host *msm_host) {struct platform_device *pdev = msm_host->pdev;@@ -497,7 +545,7 @@ int msm_dsi_runtime_resume(struct device *dev)return dsi_bus_clk_enable (msm_host); } -static int dsi_link_clk_enable_6g (struct msm_dsi_host *msm_host) +int dsi_link_clk_enable_6g (struct msm_dsi_host *msm_host) {int ret;@@ -565,7 +613,7 @@ static int dsi_link_clk_enable_6g(struct msm_dsi_host *msm_host)return ret; } -static int dsi_link_clk_enable_v2 (struct msm_dsi_host *msm_host) +int dsi_link_clk_enable_v2 (struct msm_dsi_host *msm_host) {int ret;@@ -643,6 +691,23 @@ static int dsi_link_clk_enable(struct msm_dsi_host *msm_host)return dsi_link_clk_enable_v2 (msm_host); } +void dsi_link_clk_disable_6g (struct msm_dsi_host *msm_host) +{ +clk_disable_unprepare (msm_host->esc_clk); +clk_disable_unprepare (msm_host->pixel_clk); +if (msm_host->byte_intf_clk) +clk_disable_unprepare (msm_host->byte_intf_clk); +clk_disable_unprepare (msm_host->byte_clk); +} + +void dsi_link_clk_disable_v2 (struct msm_dsi_host *msm_host) +{ +clk_disable_unprepare (msm_host->pixel_clk); +clk_disable_unprepare (msm_host->src_clk); +clk_disable_unprepare (msm_host->esc_clk); +clk_disable_unprepare (msm_host->byte_clk); +} +static void dsi_link_clk_disable (struct msm_dsi_host *msm_host) {const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;@@ -661,6 +726,94 @@ static void dsi_link_clk_disable(struct msm_dsi_host *msm_host) } }
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drivers/gpu/drm/msm/dsi/dsi_host.c static void dsi_link_clk_disable(struct msm_dsi_host *msm_host) · line 739
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drivers/gpu/drm/msm/dsi/dsi_host.c +11
-0+int dsi_calc_clk_rate_6g (struct msm_dsi_host *msm_host) +{ +struct drm_display_mode *mode = msm_host->mode; +u8 lanes = msm_host->lanes; +u32 bpp =dsi_get_bpp (msm_host->format); +u32 pclk_rate; + +if (!mode) { +pr_err ("%s: mode not set\n" , __func__); +return -EINVAL ; + }As far as I can tell from patch 3/3 the
calc_clk_rate()function hook is only called once andmode_hostis guaranteed to be not null. I don't think this check is needed.
yes should work fine
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drivers/gpu/drm/msm/dsi/dsi_host.c +19
-0+ pclk_rate = mode->clock *1000 ; +if (lanes >0 ) { + msm_host->byte_clk_rate = (pclk_rate * bpp) / (8 * lanes); + }else { +pr_err ("%s: forcing mdss_dsi lanes to 1\n" , __func__); + msm_host->byte_clk_rate = (pclk_rate * bpp) /8 ; + } + +DBG ("pclk=%d, bclk=%d" , pclk_rate, msm_host->byte_clk_rate); + + msm_host->esc_clk_rate =clk_get_rate (msm_host->esc_clk); + +return 0 ; +} + +int dsi_calc_clk_rate_v2 (struct msm_dsi_host *msm_host) +{ +struct drm_display_mode *mode = msm_host->mode; +u8 lanes = msm_host->lanes;drivers/gpu/drm/msm/dsi/dsi_host.c static void dsi_link_clk_disable(struct msm_dsi_host *msm_host)
Quoted 10 lines
drivers/gpu/drm/msm/dsi/dsi_host.c +9
-0+u32 bpp =dsi_get_bpp (msm_host->format); +u32 pclk_rate; +unsigned int esc_mhz, esc_div; +unsigned long byte_mhz; + +if (!mode) { +pr_err ("%s: mode not set\n" , __func__); +return -EINVAL ; + }Or this.
Quoted 65 lines
drivers/gpu/drm/msm/dsi/dsi_host.c +58
-0+ pclk_rate = mode->clock *1000 ; +if (lanes >0 ) { + msm_host->byte_clk_rate = (pclk_rate * bpp) / (8 * lanes); + }else { +pr_err ("%s: forcing mdss_dsi lanes to 1\n" , __func__); + msm_host->byte_clk_rate = (pclk_rate * bpp) /8 ; + } + +DBG ("pclk=%d, bclk=%d" , pclk_rate, msm_host->byte_clk_rate); + + msm_host->src_clk_rate = (pclk_rate * bpp) /8 ; + +/* +* esc clock is byte clock followed by a 4 bit divider, +* we need to find an escape clock frequency within the +* mipi DSI spec range within the maximum divider limit +* We iterate here between an escape clock frequencey +* between 20 Mhz to 5 Mhz and pick up the first one +* that can be supported by our divider +*/ + + byte_mhz = msm_host->byte_clk_rate /1000000 ; + +for (esc_mhz =20 ; esc_mhz >=5 ; esc_mhz--) { + esc_div =DIV_ROUND_UP (byte_mhz, esc_mhz); + +/* +* TODO: Ideally, we shouldn't know what sort of divider +* is available in mmss_cc, we're just assuming that +* it'll always be a 4 bit divider. Need to come up with +* a better way here. +*/ +if (esc_div >=1 && esc_div <=16 ) +break ; + } + +if (esc_mhz <5 ) +return -EINVAL ; + + msm_host->esc_clk_rate = msm_host->byte_clk_rate / esc_div; + +DBG ("esc=%d, src=%d" , msm_host->esc_clk_rate, + msm_host->src_clk_rate); + +return 0 ; +} +static int dsi_calc_clk_rate (struct msm_dsi_host *msm_host) {struct drm_display_mode *mode = msm_host->mode;@@ -1008,6 +1161,49 @@ static void dsi_wait4video_eng_busy(struct msm_dsi_host *msm_host) } } +int dsi_tx_buf_alloc_6g (struct msm_dsi_host *msm_host,int size) +{ +struct drm_device *dev = msm_host->dev; +struct msm_drm_private *priv = dev->dev_private; +int ret; +uint64_t iova; + + msm_host->tx_gem_obj =msm_gem_new (dev, size,MSM_BO_UNCACHED ); +if (IS_ERR (msm_host->tx_gem_obj)) { + ret =PTR_ERR (msm_host->tx_gem_obj); + pr_err("%s: failed to allocate gem, %d\n",
Quoted 8 lines
drivers/gpu/drm/msm/dsi/dsi_host.c static void dsi_wait4video_eng_busy(struct msm_dsi_host *msm_host) · line 1182
Quoted 8 lines
drivers/gpu/drm/msm/dsi/dsi_host.c +8
-0+ __func__, ret); + msm_host->tx_gem_obj =NULL ; +return ret; + } + + ret =msm_gem_get_iova (msm_host->tx_gem_obj, + priv->kms->aspace, &iova); +mutex_unlock (&dev->struct_mutex);
Seems like stuct_mutex unlock wasn't removed when they migrated to the new msm_gem_new and msm_gem_get_iova from the previous lock based functions?
Quoted 8 lines
drivers/gpu/drm/msm/dsi/dsi_host.c static void dsi_wait4video_eng_busy(struct msm_dsi_host *msm_host) · line 1186
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drivers/gpu/drm/msm/dsi/dsi_host.c +4
-0+if (ret) { +pr_err ("%s: failed to get iova, %d\n" , __func__, ret); +return ret; + }I'm not sure if you also need to vmap this at some point, but we have a handy helper function for in-kernel gem objects to automate a bit of this:
we eventually do a msm_gem_get_vaddr so msm_gem_kernel_new seems like a good fit which will also help to remove one additional helper function :)
Quoted 6 lines
void *msm_gem_kernel_new(struct
drm_device*dev,uint32_tsize,
uint32_tflags, structmsm_gem_address_space*aspace,
structdrm_gem_object**bo,uint64_t*iova);Jordan
Signature · 7 lines
Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc, is a member of Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
PATCH v2 3/3 drm/msm/dsi: replace version checks with helper functions
In reply to Sibi SReplace version checks with the helper functions bound to cfg_handler for DSI v2, DSI 6G 1.x and DSI 6G v2.0+ controllers
Signed-off-by Sibi S <[email protected]>
--- drivers/gpu/drm/msm/dsi/dsi_host.c | 242 +++++-------------------------------- 1 file changed, 29 insertions(+), 213 deletions(-)
drivers/gpu/drm/msm/dsi/dsi_host.c +29 -213
@@ -426,19 +426,6 @@ static int dsi_clk_init(struct msm_dsi_host *msm_host) goto exit; } -if (cfg_hnd->major ==MSM_DSI_VER_MAJOR_6G && - cfg_hnd->minor >=MSM_DSI_6G_VER_MINOR_V2_2_1 ) { - msm_host->byte_intf_clk =msm_clk_get (pdev,"byte_intf" ); -if (IS_ERR (msm_host->byte_intf_clk)) { - ret =PTR_ERR (msm_host->byte_intf_clk); -pr_err ("%s: can't find byte_intf clock. ret=%d\n" , - __func__, ret); - goto exit; - } - }else { - msm_host->byte_intf_clk =NULL ; - } - msm_host->byte_clk_src =clk_get_parent (msm_host->byte_clk);if (!msm_host->byte_clk_src) { ret = -ENODEV ;
@@ -453,31 +440,8 @@ static int dsi_clk_init(struct msm_dsi_host *msm_host) goto exit; } -if (cfg_hnd->major ==MSM_DSI_VER_MAJOR_V2 ) { - msm_host->src_clk =msm_clk_get (pdev,"src" ); -if (IS_ERR (msm_host->src_clk)) { - ret =PTR_ERR (msm_host->src_clk); -pr_err ("%s: can't find src clock. ret=%d\n" , - __func__, ret); - msm_host->src_clk =NULL ; - goto exit; - } - - msm_host->esc_clk_src =clk_get_parent (msm_host->esc_clk); -if (!msm_host->esc_clk_src) { - ret = -ENODEV ; -pr_err ("%s: can't get esc clock parent. ret=%d\n" , - __func__, ret); - goto exit; - } - - msm_host->dsi_clk_src =clk_get_parent (msm_host->src_clk); -if (!msm_host->dsi_clk_src) { - ret = -ENODEV ; -pr_err ("%s: can't get src clock parent. ret=%d\n" , - __func__, ret); - } - } +if (cfg_hnd->ops->clk_init_ver) + ret = cfg_hnd->ops->clk_init_ver (msm_host); exit:return ret; }
@@ -681,16 +645,6 @@ int dsi_link_clk_enable_v2(struct msm_dsi_host *msm_host)return ret; } -static int dsi_link_clk_enable (struct msm_dsi_host *msm_host) -{ -const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; - -if (cfg_hnd->major ==MSM_DSI_VER_MAJOR_6G ) -return dsi_link_clk_enable_6g (msm_host); -else -return dsi_link_clk_enable_v2 (msm_host); -} -void dsi_link_clk_disable_6g (struct msm_dsi_host *msm_host) {clk_disable_unprepare (msm_host->esc_clk);
@@ -708,24 +662,6 @@ void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host)clk_disable_unprepare (msm_host->byte_clk); } -static void dsi_link_clk_disable (struct msm_dsi_host *msm_host) -{ -const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; - -if (cfg_hnd->major ==MSM_DSI_VER_MAJOR_6G ) { -clk_disable_unprepare (msm_host->esc_clk); -clk_disable_unprepare (msm_host->pixel_clk); -if (msm_host->byte_intf_clk) -clk_disable_unprepare (msm_host->byte_intf_clk); -clk_disable_unprepare (msm_host->byte_clk); - }else { -clk_disable_unprepare (msm_host->pixel_clk); -clk_disable_unprepare (msm_host->src_clk); -clk_disable_unprepare (msm_host->esc_clk); -clk_disable_unprepare (msm_host->byte_clk); - } -} -int dsi_calc_clk_rate_6g (struct msm_dsi_host *msm_host) {struct drm_display_mode *mode = msm_host->mode;
@@ -814,73 +750,6 @@ int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host)return 0 ; } -static int dsi_calc_clk_rate (struct msm_dsi_host *msm_host) -{ -struct drm_display_mode *mode = msm_host->mode; -const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; -u8 lanes = msm_host->lanes; -u32 bpp =dsi_get_bpp (msm_host->format); -u32 pclk_rate; - -if (!mode) { -pr_err ("%s: mode not set\n" , __func__); -return -EINVAL ; - } - - pclk_rate = mode->clock *1000 ; -if (lanes >0 ) { - msm_host->byte_clk_rate = (pclk_rate * bpp) / (8 * lanes); - }else { -pr_err ("%s: forcing mdss_dsi lanes to 1\n" , __func__); - msm_host->byte_clk_rate = (pclk_rate * bpp) /8 ; - } - -DBG ("pclk=%d, bclk=%d" , pclk_rate, msm_host->byte_clk_rate); - - msm_host->esc_clk_rate =clk_get_rate (msm_host->esc_clk); - -if (cfg_hnd->major ==MSM_DSI_VER_MAJOR_V2 ) { -unsigned int esc_mhz, esc_div; -unsigned long byte_mhz; - - msm_host->src_clk_rate = (pclk_rate * bpp) /8 ; - -/* -* esc clock is byte clock followed by a 4 bit divider, -* we need to find an escape clock frequency within the -* mipi DSI spec range within the maximum divider limit -* We iterate here between an escape clock frequencey -* between 20 Mhz to 5 Mhz and pick up the first one -* that can be supported by our divider -*/ - - byte_mhz = msm_host->byte_clk_rate /1000000 ; - -for (esc_mhz =20 ; esc_mhz >=5 ; esc_mhz--) { - esc_div =DIV_ROUND_UP (byte_mhz, esc_mhz); - -/* -* TODO: Ideally, we shouldn't know what sort of divider -* is available in mmss_cc, we're just assuming that -* it'll always be a 4 bit divider. Need to come up with -* a better way here. -*/ -if (esc_div >=1 && esc_div <=16 ) -break ; - } - -if (esc_mhz <5 ) -return -EINVAL ; - - msm_host->esc_clk_rate = msm_host->byte_clk_rate / esc_div; - -DBG ("esc=%d, src=%d" , msm_host->esc_clk_rate, - msm_host->src_clk_rate); - } - -return 0 ; -} -static void dsi_intr_ctrl (struct msm_dsi_host *msm_host,u32 mask,int enable) {u32 intr;
@@ -1204,55 +1073,6 @@ int dsi_tx_buf_alloc_v2(struct msm_dsi_host *msm_host, int size)return 0 ; } -/* dsi_cmd */ -static int dsi_tx_buf_alloc (struct msm_dsi_host *msm_host,int size) -{ -struct drm_device *dev = msm_host->dev; -struct msm_drm_private *priv = dev->dev_private; -const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; -int ret; -uint64_t iova; - -if (cfg_hnd->major ==MSM_DSI_VER_MAJOR_6G ) { - msm_host->tx_gem_obj =msm_gem_new (dev, size,MSM_BO_UNCACHED ); -if (IS_ERR (msm_host->tx_gem_obj)) { - ret =PTR_ERR (msm_host->tx_gem_obj); -pr_err ("%s: failed to allocate gem, %d\n" , - __func__, ret); - msm_host->tx_gem_obj =NULL ; -return ret; - } - - ret =msm_gem_get_iova (msm_host->tx_gem_obj, - priv->kms->aspace, &iova); -mutex_unlock (&dev->struct_mutex); -if (ret) { -pr_err ("%s: failed to get iova, %d\n" , __func__, ret); -return ret; - } - -if (iova &0x07 ) { -pr_err ("%s: buf NOT 8 bytes aligned\n" , __func__); -return -EINVAL ; - } - - msm_host->tx_size = msm_host->tx_gem_obj->size; - }else { - msm_host->tx_buf =dma_alloc_coherent (dev->dev, size, - &msm_host->tx_buf_paddr,GFP_KERNEL ); -if (!msm_host->tx_buf) { - ret = -ENOMEM ; -pr_err ("%s: failed to allocate tx buf, %d\n" , - __func__, ret); -return ret; - } - - msm_host->tx_size = size; - } - -return 0 ; -} -static void dsi_tx_buf_free (struct msm_dsi_host *msm_host) {struct drm_device *dev = msm_host->dev;
@@ -1307,15 +1127,11 @@ static int dsi_cmd_dma_add(struct msm_dsi_host *msm_host,return -EINVAL ; } -if (cfg_hnd->major ==MSM_DSI_VER_MAJOR_6G ) { - data =msm_gem_get_vaddr (msm_host->tx_gem_obj); -if (IS_ERR (data)) { - ret =PTR_ERR (data); -pr_err ("%s: get vaddr failed, %d\n" , __func__, ret); -return ret; - } - }else { - data = msm_host->tx_buf; + data = cfg_hnd->ops->tx_buf_get (msm_host); +if (IS_ERR (data)) { + ret =PTR_ERR (data); +pr_err ("%s: get vaddr failed, %d\n" , __func__, ret); +return ret; }/* MSM specific command format in memory */
@@ -1336,8 +1152,8 @@ static int dsi_cmd_dma_add(struct msm_dsi_host *msm_host,if (packet.size < len)memset (data + packet.size,0xff , len - packet.size); -if (cfg_hnd->major ==MSM_DSI_VER_MAJOR_6G ) -msm_gem_put_vaddr (msm_host->tx_gem_obj); +if (cfg_hnd->ops->tx_buf_put) + cfg_hnd->ops->tx_buf_put (msm_host);return len; }
@@ -1408,21 +1224,14 @@ int dsi_dma_base_get_v2(struct msm_dsi_host *msm_host, uint64_t *dma_base)static int dsi_cmd_dma_tx (struct msm_dsi_host *msm_host,int len) {const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; -struct drm_device *dev = msm_host->dev; -struct msm_drm_private *priv = dev->dev_private;int ret;uint64_t dma_base;bool triggered; -if (cfg_hnd->major ==MSM_DSI_VER_MAJOR_6G ) { - ret =msm_gem_get_iova (msm_host->tx_gem_obj, - priv->kms->aspace, &dma_base); -if (ret) { -pr_err ("%s: failed to get iova: %d\n" , __func__, ret); -return ret; - } - }else { - dma_base = msm_host->tx_buf_paddr; + ret = cfg_hnd->ops->dma_base_get (msm_host, &dma_base); +if (ret) { +pr_err ("%s: failed to get iova: %d\n" , __func__, ret); +return ret; }reinit_completion (&msm_host->dma_comp);
@@ -2060,6 +1869,7 @@ int msm_dsi_host_modeset_init(struct mipi_dsi_host *host, struct drm_device *dev) {struct msm_dsi_host *msm_host =to_msm_dsi_host (host); +const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;struct platform_device *pdev = msm_host->pdev;int ret;
@@ -2080,7 +1890,7 @@ int msm_dsi_host_modeset_init(struct mipi_dsi_host *host, } msm_host->dev = dev; - ret =dsi_tx_buf_alloc (msm_host,SZ_4K ); + ret = cfg_hnd->ops->tx_buf_alloc (msm_host,SZ_4K );if (ret) {pr_err ("%s: alloc tx gem obj failed, %d\n" , __func__, ret);return ret;
@@ -2138,6 +1948,7 @@ int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg) {struct msm_dsi_host *msm_host =to_msm_dsi_host (host); +const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;/* TODO: make sure dsi_cmd_mdp is idle. * Since DSI6G v1.2.0, we can set DSI_TRIG_CTRL.BLOCK_DMA_WITHIN_FRAME
@@ -2150,7 +1961,7 @@ int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host,* mdp clock need to be enabled to receive dsi interrupt */ pm_runtime_get_sync (&msm_host->pdev->dev); -dsi_link_clk_enable (msm_host); + cfg_hnd->ops->link_clk_enable (msm_host);/* TODO: vote for bus bandwidth */
@@ -2171,6 +1982,7 @@ void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg) {struct msm_dsi_host *msm_host =to_msm_dsi_host (host); +const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;dsi_intr_ctrl (msm_host,DSI_IRQ_MASK_CMD_DMA_DONE ,0 );dsi_write (msm_host,REG_DSI_CTRL , msm_host->dma_cmd_ctrl_restore);
@@ -2180,7 +1992,7 @@ void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host,/* TODO: unvote for bus bandwidth */ -dsi_link_clk_disable (msm_host); + cfg_hnd->ops->link_clk_disable (msm_host);pm_runtime_put_autosuspend (&msm_host->pdev->dev); }
@@ -2344,7 +2156,6 @@ int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host, struct msm_dsi_pll *src_pll) {struct msm_dsi_host *msm_host =to_msm_dsi_host (host); -const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;struct clk *byte_clk_provider, *pixel_clk_provider;int ret;
@@ -2370,14 +2181,16 @@ int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host, goto exit; } -if (cfg_hnd->major ==MSM_DSI_VER_MAJOR_V2 ) { +if (msm_host->dsi_clk_src) { ret =clk_set_parent (msm_host->dsi_clk_src, pixel_clk_provider);if (ret) {pr_err ("%s: can't set parent to dsi_clk_src. ret=%d\n" , __func__, ret); goto exit; } + } +if (msm_host->esc_clk_src) { ret =clk_set_parent (msm_host->esc_clk_src, byte_clk_provider);if (ret) { pr_err("%s: can't set parent to esc_clk_src. ret=%d\n",
@@ -2407,9 +2220,10 @@ void msm_dsi_host_get_phy_clk_req(struct mipi_dsi_host *host, struct msm_dsi_phy_clk_request *clk_req) {struct msm_dsi_host *msm_host =to_msm_dsi_host (host); +const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;int ret; - ret =dsi_calc_clk_rate (msm_host); + ret = cfg_hnd->ops->calc_clk_rate (msm_host);if (ret) {pr_err ("%s: unable to calc clk rate, %d\n" , __func__, ret);return ;
@@ -2473,6 +2287,7 @@ int msm_dsi_host_power_on(struct mipi_dsi_host *host, struct msm_dsi_phy_shared_timings *phy_shared_timings) {struct msm_dsi_host *msm_host =to_msm_dsi_host (host); +const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;int ret =0 ;mutex_lock (&msm_host->dev_mutex);
@@ -2491,7 +2306,7 @@ int msm_dsi_host_power_on(struct mipi_dsi_host *host, }pm_runtime_get_sync (&msm_host->pdev->dev); - ret =dsi_link_clk_enable (msm_host); + ret = cfg_hnd->ops->link_clk_enable (msm_host);if (ret) {pr_err ("%s: failed to enable link clocks. ret=%d\n" , __func__, ret);
@@ -2518,7 +2333,7 @@ int msm_dsi_host_power_on(struct mipi_dsi_host *host,return 0 ; fail_disable_clk: -dsi_link_clk_disable (msm_host); + cfg_hnd->ops->link_clk_disable (msm_host);pm_runtime_put_autosuspend (&msm_host->pdev->dev); fail_disable_reg:dsi_host_regulator_disable (msm_host);
@@ -2530,6 +2345,7 @@ int msm_dsi_host_power_on(struct mipi_dsi_host *host,int msm_dsi_host_power_off (struct mipi_dsi_host *host) {struct msm_dsi_host *msm_host =to_msm_dsi_host (host); +const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;mutex_lock (&msm_host->dev_mutex);if (!msm_host->power_on) {
@@ -2544,7 +2360,7 @@ int msm_dsi_host_power_off(struct mipi_dsi_host *host)pinctrl_pm_select_sleep_state (&msm_host->pdev->dev); -dsi_link_clk_disable (msm_host); + cfg_hnd->ops->link_clk_disable (msm_host);pm_runtime_put_autosuspend (&msm_host->pdev->dev);dsi_host_regulator_disable (msm_host);
Signature · 7 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
Quoted 5 lines · Sibi S
This patch series aims to create and bind dsi host controller helper functions to functionalities that vary across DSI v2, DSI 6G 1.x and DSI 6G v2.0+ controllers. These functionalities are currently under excessive version checks which is now replaced with the corresponding helper function.
Reviewed-by Archit Taneja <[email protected]>
Quoted 11 lines
V2:
Removes command broadcast support for DSI 6G v2.0+ controllers from the patch series and incorporates all the suggested correctionsSibi S (3):
drm/msm/dsi: add dsi host helper functions support drm/msm/dsi: add implementation for helper functions drm/msm/dsi: replace version checks with helper functions
Quoted 6 lines
drivers/gpu/drm/msm/dsi/dsi.h | 16 ++ drivers/gpu/drm/msm/dsi/dsi_cfg.c | 56 +++++- drivers/gpu/drm/msm/dsi/dsi_cfg.h | 12 ++ drivers/gpu/drm/msm/dsi/dsi_host.c | 362 +++++++++++++++++++++---------------- 4 files changed, 280 insertions(+), 166 deletions(-)
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