tests/gem_eio: Never re-use contexts which were in the middle of GPU reset

PATCH In review Tvrtko Ursulin 5 participants 13 messages Mar 29, 2018 – Apr 4, 2018

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Tvrtko Ursulin

author

2018-03-29 13:05 UTC #0 lore raw

PATCH v2 1/2 tests/gem_eio: Never re-use contexts which were in the middle of GPU reset

From: Tvrtko Ursulin <[email protected]>

Contexts executing when reset triggers are potentialy corrupt so trying to use them from a subsequent test (like the default context) can hang the GPU or even the driver.

Workaround that by always creating a dedicated context which will be running when GPU reset happens.

v2:
* Export and use gem_reopen_device so the test works on old gens as well. (Chris Wilson)

Signed-off-by Tvrtko Ursulin <[email protected]>

Reviewed-by Chris Wilson <[email protected]>

---
 lib/i915/gem_submission.c | 11 +++++--
 lib/i915/gem_submission.h |  2 ++
 tests/gem_eio.c           | 77 ++++++++++++++++++++++++++++++++---------------
 3 files changed, 64 insertions(+), 26 deletions(-)

lib/i915/gem_submission.c +9 -2

index 7d3cbdbf8e77..2fd460d5ed2b 100644
@@ -165,7 +165,14 @@ bool gem_has_guc_submission(int fd)
 	return gem_submission_method(fd) & GEM_SUBMISSION_GUC;
 }
 
-static int reopen_driver(int fd)
+/**
+ * gem_reopen_driver:
+ * @fd: re-open the i915 drm file descriptor
+ *
+ * Re-opens the drm fd which is useful in instances where a clean default
+ * context is needed.
+ */
+int gem_reopen_driver(int fd)
 {
 	char path[256];

@@ -201,7 +208,7 @@ void gem_test_engine(int i915, unsigned int engine)
 		.buffer_count = 1,
 	};
 
-	i915 = reopen_driver(i915);
+	i915 = gem_reopen_driver(i915);
 	igt_assert(!is_wedged(i915));
 
 	obj.handle = gem_create(i915, 4096);

lib/i915/gem_submission.h +2 -0

index 6b39a0532295..f94eabb201b4 100644
@@ -35,4 +35,6 @@ bool gem_has_guc_submission(int fd);
 
 void gem_test_engine(int fd, unsigned int engine);
 
+int gem_reopen_driver(int fd);
+
 #endif /* GEM_SUBMISSION_H */

tests/gem_eio.c +53 ~~-24~~

186 lines not on this page · raw message

Signature · 6 lines

2.14.1

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Tvrtko Ursulin

author

2018-03-29 13:05 UTC #1 lore raw

PATCH 2/2 tests/gem_eio: Add context destroyer test

From: Tvrtko Ursulin <[email protected]>

Context destroyer is supposed to trigger wedging or resets at incovenient times and then re-use the context so either the context or driver tracking might get confused and break.

Signed-off-by Tvrtko Ursulin <[email protected]>

---
 tests/gem_eio.c | 62 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)

tests/gem_eio.c +62 -0

index b7c5047f0816..f3a452b2265c 100644
@@ -591,6 +591,62 @@ static void test_inflight_internal(int fd, unsigned int wait)
 	close(fd);
 }
 
+static void test_context_destroyer(int fd, unsigned int flags)
+{
+	uint32_t ctx0 = gem_context_create(fd);
+
+	igt_until_timeout(10) {
+		struct drm_i915_gem_execbuffer2 execbuf = { };
+		struct drm_i915_gem_exec_object2 obj = { };
+		uint32_t bbe = MI_BATCH_BUFFER_END;
+		igt_spin_t *hang;
+		unsigned int i;
+		uint32_t ctx;
+
+		gem_quiescent_gpu(fd);
+
+		igt_require(i915_reset_control(flags & TEST_WEDGE ?
+					       false : true));
+
+		ctx = context_create_safe(fd);
+
+		hang = spin_sync(fd, ctx0, 0);
+
+		obj.handle = gem_create(fd, 4096);
+		gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
+
+		execbuf.buffers_ptr = to_user_pointer(&obj);
+		execbuf.buffer_count = 1;
+		execbuf.rsvd1 = ctx0;
+
+		for (i = 0; i < 10; i++)
+			gem_execbuf(fd, &execbuf);
+
+		igt_assert_eq(__check_wait(fd, obj.handle, 100e3), 0);
+
+		igt_assert(i915_reset_control(true));
+		trigger_reset(fd);
+
+		gem_quiescent_gpu(fd);
+
+		execbuf.rsvd1 = ctx;
+		for (i = 0; i < 5; i++)
+			gem_execbuf(fd, &execbuf);
+
+		execbuf.rsvd1 = ctx0;
+		for (i = 0; i < 5; i++)
+			gem_execbuf(fd, &execbuf);
+
+		gem_sync(fd, obj.handle);
+		igt_spin_batch_free(fd, hang);
+		gem_context_destroy(fd, ctx);
+		gem_close(fd, obj.handle);
+
+	}
+
+	gem_context_destroy(fd, ctx0);
+}
+
 static int fd = -1;
 
 static void

@@ -635,6 +691,12 @@ igt_main
 	igt_subtest("in-flight-suspend")
 		test_inflight_suspend(fd);
 
+	igt_subtest("context-destroyer")
+		test_context_destroyer(fd, 0);
+
+	igt_subtest("context-destroyer-wedge")
+		test_context_destroyer(fd, TEST_WEDGE);
+
 	igt_subtest_group {
 		const struct {
 			unsigned int wait;

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Tvrtko Ursulin

author

2018-04-03 11:36 UTC #2 lore raw

PATCH v2 2/2 tests/gem_eio: Add reset and unwedge stress testing

From: Tvrtko Ursulin <[email protected]>

Reset and unwedge stress testing is supposed to trigger wedging or resets at incovenient times and then re-use the context so either the context or driver tracking might get confused and break.

v2:
* Renamed for more sensible naming.
* Added some comments to explain what the test is doing. (Chris Wilson)

Signed-off-by Tvrtko Ursulin <[email protected]>

---
 tests/gem_eio.c | 74 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 74 insertions(+)

tests/gem_eio.c +74 -0

index b7c5047f0816..9599e73db736 100644
@@ -591,6 +591,74 @@ static void test_inflight_internal(int fd, unsigned int wait)
 	close(fd);
 }
 
+/*
+ * Verify that we can submit and execute work after unwedging the GPU.
+ */
+static void test_reset_stress(int fd, unsigned int flags)
+{
+	uint32_t ctx0 = gem_context_create(fd);
+
+	igt_until_timeout(5) {
+		struct drm_i915_gem_execbuffer2 execbuf = { };
+		struct drm_i915_gem_exec_object2 obj = { };
+		uint32_t bbe = MI_BATCH_BUFFER_END;
+		igt_spin_t *hang;
+		unsigned int i;
+		uint32_t ctx;
+
+		gem_quiescent_gpu(fd);
+
+		igt_require(i915_reset_control(flags & TEST_WEDGE ?
+					       false : true));
+
+		ctx = context_create_safe(fd);
+
+		/*
+		 * Start executing a spin batch with some queued batches
+		 * against a different context after it.
+		 */
+		hang = spin_sync(fd, ctx0, 0);
+
+		obj.handle = gem_create(fd, 4096);
+		gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
+
+		execbuf.buffers_ptr = to_user_pointer(&obj);
+		execbuf.buffer_count = 1;
+		execbuf.rsvd1 = ctx0;
+
+		for (i = 0; i < 10; i++)
+			gem_execbuf(fd, &execbuf);
+
+		/* Wedge after a small delay. */
+		igt_assert_eq(__check_wait(fd, obj.handle, 100e3), 0);
+
+		/* Unwedge by forcing a reset. */
+		igt_assert(i915_reset_control(true));
+		trigger_reset(fd);
+
+		gem_quiescent_gpu(fd);
+
+		/*
+		 * Verify that we are able to submit work after unwedging from
+		 * both contexts.
+		 */
+		execbuf.rsvd1 = ctx;
+		for (i = 0; i < 5; i++)
+			gem_execbuf(fd, &execbuf);
+
+		execbuf.rsvd1 = ctx0;
+		for (i = 0; i < 5; i++)
+			gem_execbuf(fd, &execbuf);
+
+		gem_sync(fd, obj.handle);
+		igt_spin_batch_free(fd, hang);
+		gem_context_destroy(fd, ctx);
+		gem_close(fd, obj.handle);
+	}
+
+	gem_context_destroy(fd, ctx0);
+}
+
 static int fd = -1;
 
 static void

@@ -635,6 +703,12 @@ igt_main
 	igt_subtest("in-flight-suspend")
 		test_inflight_suspend(fd);
 
+	igt_subtest("reset-stress")
+		test_reset_stress(fd, 0);
+
+	igt_subtest("unwedge-stress")
+		test_reset_stress(fd, TEST_WEDGE);
+
 	igt_subtest_group {
 		const struct {
 			unsigned int wait;

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Chris Wilson

Reviewed-by on v2 2/2

2018-04-03 11:51 UTC #3 lore raw

Re: [Intel-gfx] [PATCH i-g-t v2 2/2] tests/gem_eio: Add reset and unwedge stress testing

Quoting Tvrtko Ursulin (2018-04-03 12:36:44)

Quoted 9 lines

From: Tvrtko Ursulin <[email protected]>
Reset and unwedge stress testing is supposed to trigger wedging or resets at incovenient times and then re-use the context so either the context or driver tracking might get confused and break.
v2:
* Renamed for more sensible naming.
* Added some comments to explain what the test is doing. (Chris Wilson)

You bring shame unto my tests with such beauty.

Quoted 1 line

Signed-off-by Tvrtko Ursulin <[email protected]>

Reviewed-by Chris Wilson <[email protected]>

-Chris
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Antonio Argenziano

2018-04-03 18:24 UTC #4 lore raw

Re: [igt-dev] [PATCH i-g-t v2 2/2] tests/gem_eio: Add reset and unwedge stress testing

In reply to Tvrtko Ursulin

Quoted 39 lines · Tvrtko Ursulin

From: Tvrtko Ursulin <[email protected]>
Reset and unwedge stress testing is supposed to trigger wedging or resets at incovenient times and then re-use the context so either the context or driver tracking might get confused and break.
v2:
* Renamed for more sensible naming.
* Added some comments to explain what the test is doing. (Chris Wilson)
Signed-off-by Tvrtko Ursulin <[email protected]>
---
  tests/gem_eio.c | 74 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
  1 file changed, 74 insertions(+)
tests/gem_eio.c +16 -0
index b7c5047f0816..9599e73db736 100644
@@ -591,6 +591,74 @@ static void test_inflight_internal(int fd, unsigned int wait)
  	close(fd);
  }
 
+/*
+ * Verify that we can submit and execute work after unwedging the GPU.
+ */
+static void test_reset_stress(int fd, unsigned int flags)
+{
+	uint32_t ctx0 = gem_context_create(fd);
+
+	igt_until_timeout(5) {
+		struct drm_i915_gem_execbuffer2 execbuf = { };
+		struct drm_i915_gem_exec_object2 obj = { };
+		uint32_t bbe = MI_BATCH_BUFFER_END;
+		igt_spin_t *hang;
+		unsigned int i;
+		uint32_t ctx;
+
+		gem_quiescent_gpu(fd);

tests/gem_eio.c static void test_inflight_internal(int fd, unsigned int wait) · line 619

Quoted 10 lines

tests/gem_eio.c +10 -0

+
+		igt_require(i915_reset_control(flags & TEST_WEDGE ?
+					       false : true));
+
+		ctx = context_create_safe(fd);
+
+		/*
+		 * Start executing a spin batch with some queued batches
+		 * against a different context after it.
+		 */

Aren't all batches queued on ctx0? Or is this a reference to the check on ctx you have later in the test.

Thanks,
Antonio

Quoted 49 lines

tests/gem_eio.c +42 -0

+		hang = spin_sync(fd, ctx0, 0);
+
+		obj.handle = gem_create(fd, 4096);
+		gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
+
+		execbuf.buffers_ptr = to_user_pointer(&obj);
+		execbuf.buffer_count = 1;
+		execbuf.rsvd1 = ctx0;
+
+		for (i = 0; i < 10; i++)
+			gem_execbuf(fd, &execbuf);
+
+		/* Wedge after a small delay. */
+		igt_assert_eq(__check_wait(fd, obj.handle, 100e3), 0);
+
+		/* Unwedge by forcing a reset. */
+		igt_assert(i915_reset_control(true));
+		trigger_reset(fd);
+
+		gem_quiescent_gpu(fd);
+
+		/*
+		 * Verify that we are able to submit work after unwedging from
+		 * both contexts.
+		 */
+		execbuf.rsvd1 = ctx;
+		for (i = 0; i < 5; i++)
+			gem_execbuf(fd, &execbuf);
+
+		execbuf.rsvd1 = ctx0;
+		for (i = 0; i < 5; i++)
+			gem_execbuf(fd, &execbuf);
+
+		gem_sync(fd, obj.handle);
+		igt_spin_batch_free(fd, hang);
+		gem_context_destroy(fd, ctx);
+		gem_close(fd, obj.handle);
+	}
+
+	gem_context_destroy(fd, ctx0);
+}
+
  static int fd = -1;
 
  static void

@@ -635,6 +703,12 @@ igt_main
  	igt_subtest("in-flight-suspend")
  		test_inflight_suspend(fd);

tests/gem_eio.c igt_main · line 714

Quoted 10 lines

tests/gem_eio.c +6 -0

 
+	igt_subtest("reset-stress")
+		test_reset_stress(fd, 0);
+
+	igt_subtest("unwedge-stress")
+		test_reset_stress(fd, TEST_WEDGE);
+
  	igt_subtest_group {
  		const struct {
  			unsigned int wait;

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Antonio Argenziano

2018-04-03 18:34 UTC #5 lore raw

Re: [igt-dev] [PATCH i-g-t v2 2/2] tests/gem_eio: Add reset and unwedge stress testing

Quoted 56 lines · Antonio Argenziano

Quoted 40 lines · Tvrtko Ursulin
From: Tvrtko Ursulin <[email protected]>
Reset and unwedge stress testing is supposed to trigger wedging or resets at incovenient times and then re-use the context so either the context or driver tracking might get confused and break.
v2:
* Renamed for more sensible naming.
* Added some comments to explain what the test is doing. (Chris Wilson)
Signed-off-by Tvrtko Ursulin <[email protected]>
---
tests/gem_eio.c | 74
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++
  1 file changed, 74 insertions(+)
tests/gem_eio.c +16 -0
index b7c5047f0816..9599e73db736 100644
@@ -591,6 +591,74 @@ static void test_inflight_internal(int fd, 
 unsigned int wait)
       close(fd);
   }
+/*
+ * Verify that we can submit and execute work after unwedging the GPU.
+ */
+static void test_reset_stress(int fd, unsigned int flags)
+{
+    uint32_t ctx0 = gem_context_create(fd);
+
+    igt_until_timeout(5) {
+        struct drm_i915_gem_execbuffer2 execbuf = { };
+        struct drm_i915_gem_exec_object2 obj = { };
+        uint32_t bbe = MI_BATCH_BUFFER_END;
+        igt_spin_t *hang;
+        unsigned int i;
+        uint32_t ctx;
+
+        gem_quiescent_gpu(fd);
tests/gem_eio.c static void test_inflight_internal(int fd, · line 619
Quoted 10 lines
tests/gem_eio.c +10 -0
+
+        igt_require(i915_reset_control(flags & TEST_WEDGE ?
+                           false : true));
+
+        ctx = context_create_safe(fd);
+
+        /*
+         * Start executing a spin batch with some queued batches
+         * against a different context after it.
+         */
Aren't all batches queued on ctx0? Or is this a reference to the check on ctx you have later in the test.

Quoted 4 lines

Thanks,
Antonio
Quoted 1 line
tests/gem_eio.c +1 -0
+        hang = spin_sync(fd, ctx0, 0);

I think you meant to send this^ on ctx.

Antonio.

Quoted 52 lines

tests/gem_eio.c +41 -0

+
+        obj.handle = gem_create(fd, 4096);
+        gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
+
+        execbuf.buffers_ptr = to_user_pointer(&obj);
+        execbuf.buffer_count = 1;
+        execbuf.rsvd1 = ctx0;
+
+        for (i = 0; i < 10; i++)
+            gem_execbuf(fd, &execbuf);
+
+        /* Wedge after a small delay. */
+        igt_assert_eq(__check_wait(fd, obj.handle, 100e3), 0);
+
+        /* Unwedge by forcing a reset. */
+        igt_assert(i915_reset_control(true));
+        trigger_reset(fd);
+
+        gem_quiescent_gpu(fd);
+
+        /*
+         * Verify that we are able to submit work after unwedging from
+         * both contexts.
+         */
+        execbuf.rsvd1 = ctx;
+        for (i = 0; i < 5; i++)
+            gem_execbuf(fd, &execbuf);
+
+        execbuf.rsvd1 = ctx0;
+        for (i = 0; i < 5; i++)
+            gem_execbuf(fd, &execbuf);
+
+        gem_sync(fd, obj.handle);
+        igt_spin_batch_free(fd, hang);
+        gem_context_destroy(fd, ctx);
+        gem_close(fd, obj.handle);
+    }
+
+    gem_context_destroy(fd, ctx0);
+}
+
   static int fd = -1;

static void

tests/gem_eio.c +6 -0

@@ -635,6 +703,12 @@ igt_main
       igt_subtest("in-flight-suspend")
           test_inflight_suspend(fd);
+    igt_subtest("reset-stress")
+        test_reset_stress(fd, 0);
+
+    igt_subtest("unwedge-stress")
+        test_reset_stress(fd, TEST_WEDGE);
+

Quoted 8 lines

tests/gem_eio.c igt_main
Quoted 4 lines
tests/gem_eio.c +0 -0
       igt_subtest_group {
           const struct {
               unsigned int wait;
 
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Tvrtko Ursulin

2018-04-04 09:58 UTC #6 lore raw

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t v2 2/2] tests/gem_eio: Add reset and unwedge stress testing

Quoted 50 lines · Antonio Argenziano

Quoted 47 lines · Antonio Argenziano
Quoted 44 lines · Tvrtko Ursulin
From: Tvrtko Ursulin <[email protected]>
Reset and unwedge stress testing is supposed to trigger wedging or resets at incovenient times and then re-use the context so either the context or driver tracking might get confused and break.
v2:
* Renamed for more sensible naming.
* Added some comments to explain what the test is doing. (Chris Wilson)
Signed-off-by Tvrtko Ursulin <[email protected]>
---
tests/gem_eio.c | 74
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++
  1 file changed, 74 insertions(+)
tests/gem_eio.c +20 -0
index b7c5047f0816..9599e73db736 100644
@@ -591,6 +591,74 @@ static void test_inflight_internal(int fd, 
 unsigned int wait)
       close(fd);
   }
+/*
+ * Verify that we can submit and execute work after unwedging the GPU.
+ */
+static void test_reset_stress(int fd, unsigned int flags)
+{
+    uint32_t ctx0 = gem_context_create(fd);
+
+    igt_until_timeout(5) {
+        struct drm_i915_gem_execbuffer2 execbuf = { };
+        struct drm_i915_gem_exec_object2 obj = { };
+        uint32_t bbe = MI_BATCH_BUFFER_END;
+        igt_spin_t *hang;
+        unsigned int i;
+        uint32_t ctx;
+
+        gem_quiescent_gpu(fd);
+
+        igt_require(i915_reset_control(flags & TEST_WEDGE ?
+                           false : true));
+

Quoted 8 lines

Quoted 8 lines
tests/gem_eio.c static void test_inflight_internal(int fd, unsigned int wait) · line 619
Quoted 6 lines
tests/gem_eio.c +6 -0
+        ctx = context_create_safe(fd);
+
+        /*
+         * Start executing a spin batch with some queued batches
+         * against a different context after it.
+         */
Aren't all batches queued on ctx0? Or is this a reference to the check on ctx you have later in the test.

Yes, a mistake in comment text.

Quoted 3 lines

Quoted 1 line
tests/gem_eio.c static void test_inflight_internal(int fd, unsigned int wait) · line 620
Quoted 1 line
tests/gem_eio.c +1 -0
+        hang = spin_sync(fd, ctx0, 0);
I think you meant to send this^ on ctx.

Why do you think so? Did you find a different or better way to trigger the bug this test is trying to hit?

Regards,

Tvrtko

Quoted 62 lines

Antonio.

Quoted 52 lines

tests/gem_eio.c +41 -0

+
+        obj.handle = gem_create(fd, 4096);
+        gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
+
+        execbuf.buffers_ptr = to_user_pointer(&obj);
+        execbuf.buffer_count = 1;
+        execbuf.rsvd1 = ctx0;
+
+        for (i = 0; i < 10; i++)
+            gem_execbuf(fd, &execbuf);
+
+        /* Wedge after a small delay. */
+        igt_assert_eq(__check_wait(fd, obj.handle, 100e3), 0);
+
+        /* Unwedge by forcing a reset. */
+        igt_assert(i915_reset_control(true));
+        trigger_reset(fd);
+
+        gem_quiescent_gpu(fd);
+
+        /*
+         * Verify that we are able to submit work after unwedging from
+         * both contexts.
+         */
+        execbuf.rsvd1 = ctx;
+        for (i = 0; i < 5; i++)
+            gem_execbuf(fd, &execbuf);
+
+        execbuf.rsvd1 = ctx0;
+        for (i = 0; i < 5; i++)
+            gem_execbuf(fd, &execbuf);
+
+        gem_sync(fd, obj.handle);
+        igt_spin_batch_free(fd, hang);
+        gem_context_destroy(fd, ctx);
+        gem_close(fd, obj.handle);
+    }
+
+    gem_context_destroy(fd, ctx0);
+}
+
   static int fd = -1;

static void

tests/gem_eio.c +6 -0

@@ -635,6 +703,12 @@ igt_main
       igt_subtest("in-flight-suspend")
           test_inflight_suspend(fd);
+    igt_subtest("reset-stress")
+        test_reset_stress(fd, 0);
+
+    igt_subtest("unwedge-stress")
+        test_reset_stress(fd, TEST_WEDGE);
+

Quoted 8 lines

tests/gem_eio.c igt_main
Quoted 4 lines
tests/gem_eio.c +0 -0
       igt_subtest_group {
           const struct {
               unsigned int wait;
 
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Quoted 4 lines

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Chris Wilson

2018-04-04 10:06 UTC #7 lore raw

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t v2 2/2] tests/gem_eio: Add reset and unwedge stress testing

Quoting Tvrtko Ursulin (2018-04-04 10:58:14)

Quoted 65 lines · Antonio Argenziano

Quoted 54 lines · Antonio Argenziano
Quoted 51 lines · Tvrtko Ursulin
Quoted 48 lines
From: Tvrtko Ursulin <[email protected]>
Reset and unwedge stress testing is supposed to trigger wedging or resets
at incovenient times and then re-use the context so either the context or
driver tracking might get confused and break.
v2:
* Renamed for more sensible naming.
* Added some comments to explain what the test is doing. (Chris Wilson)
Signed-off-by Tvrtko Ursulin <[email protected]>
---
tests/gem_eio.c | 74
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++
  1 file changed, 74 insertions(+)
tests/gem_eio.c +21 -0
index b7c5047f0816..9599e73db736 100644
@@ -591,6 +591,74 @@ static void test_inflight_internal(int fd, 
 unsigned int wait)
       close(fd);
   }
+/*
+ * Verify that we can submit and execute work after unwedging the GPU.
+ */
+static void test_reset_stress(int fd, unsigned int flags)
+{
+    uint32_t ctx0 = gem_context_create(fd);
+
+    igt_until_timeout(5) {
+        struct drm_i915_gem_execbuffer2 execbuf = { };
+        struct drm_i915_gem_exec_object2 obj = { };
+        uint32_t bbe = MI_BATCH_BUFFER_END;
+        igt_spin_t *hang;
+        unsigned int i;
+        uint32_t ctx;
+
+        gem_quiescent_gpu(fd);
+
+        igt_require(i915_reset_control(flags & TEST_WEDGE ?
+                           false : true));
+
+        ctx = context_create_safe(fd);
Quoted 8 lines
Quoted 8 lines
tests/gem_eio.c static void test_inflight_internal(int fd, unsigned int wait) · line 619
Quoted 5 lines
tests/gem_eio.c +5 -0
+
+        /*
+         * Start executing a spin batch with some queued batches
+         * against a different context after it.
+         */
Aren't all batches queued on ctx0? Or is this a reference to the check on ctx you have later in the test.

Quoted 8 lines

Yes, a mistake in comment text.
Quoted 3 lines
Quoted 1 line
tests/gem_eio.c static void test_inflight_internal(int fd, unsigned int wait) · line 620
Quoted 1 line
tests/gem_eio.c +1 -0
+        hang = spin_sync(fd, ctx0, 0);
I think you meant to send this^ on ctx.
Why do you think so? Did you find a different or better way to trigger the bug this test is trying to hit?

You might need to explain that this test was trying to reproduce a kernel bug around unwedging you found earlier, and instead managed to find a similar one. ;)
-Chris
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Antonio Argenziano

2018-04-04 16:54 UTC #8 lore raw

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t v2 2/2] tests/gem_eio: Add reset and unwedge stress testing

In reply to Tvrtko Ursulin

Quoted 61 lines · Tvrtko Ursulin

Quoted 50 lines · Antonio Argenziano
Quoted 47 lines · Antonio Argenziano
Quoted 44 lines · Tvrtko Ursulin
From: Tvrtko Ursulin <[email protected]>
Reset and unwedge stress testing is supposed to trigger wedging or resets at incovenient times and then re-use the context so either the context or driver tracking might get confused and break.
v2:
* Renamed for more sensible naming.
* Added some comments to explain what the test is doing. (Chris Wilson)
Signed-off-by Tvrtko Ursulin <[email protected]>
---
tests/gem_eio.c | 74
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++
  1 file changed, 74 insertions(+)
tests/gem_eio.c +20 -0
index b7c5047f0816..9599e73db736 100644
@@ -591,6 +591,74 @@ static void test_inflight_internal(int fd, 
 unsigned int wait)
       close(fd);
   }
+/*
+ * Verify that we can submit and execute work after unwedging the GPU.
+ */
+static void test_reset_stress(int fd, unsigned int flags)
+{
+    uint32_t ctx0 = gem_context_create(fd);
+
+    igt_until_timeout(5) {
+        struct drm_i915_gem_execbuffer2 execbuf = { };
+        struct drm_i915_gem_exec_object2 obj = { };
+        uint32_t bbe = MI_BATCH_BUFFER_END;
+        igt_spin_t *hang;
+        unsigned int i;
+        uint32_t ctx;
+
+        gem_quiescent_gpu(fd);
+
+        igt_require(i915_reset_control(flags & TEST_WEDGE ?
+                           false : true));
+
Quoted 8 lines
Quoted 8 lines
tests/gem_eio.c static void test_inflight_internal(int fd, unsigned int wait) · line 619
Quoted 6 lines
tests/gem_eio.c +6 -0
+        ctx = context_create_safe(fd);
+
+        /*
+         * Start executing a spin batch with some queued batches
+         * against a different context after it.
+         */
Aren't all batches queued on ctx0? Or is this a reference to the check on ctx you have later in the test.

Quoted 7 lines

Yes, a mistake in comment text.
Quoted 3 lines
Quoted 1 line
tests/gem_eio.c static void test_inflight_internal(int fd, unsigned int wait) · line 620
Quoted 1 line
tests/gem_eio.c +1 -0
+        hang = spin_sync(fd, ctx0, 0);
I think you meant to send this^ on ctx.
Why do you think so? Did you find a different or better way to trigger the bug this test is trying to hit?

Nope, I just misunderstood the code :). I thought you were creating ctx as 'safe' to be not 'bannable' because you were going to reuse the same context across multiple resets and didn't want it to be banned. BTW given that this is not the case wouldn't ctx0 be banned after so many resets?

Apologies for the cryptic comment,
Antonio.

Quoted 71 lines

Regards,

Tvrtko

Quoted 66 lines

Antonio.

Quoted 52 lines

tests/gem_eio.c +41 -0

+
+        obj.handle = gem_create(fd, 4096);
+        gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
+
+        execbuf.buffers_ptr = to_user_pointer(&obj);
+        execbuf.buffer_count = 1;
+        execbuf.rsvd1 = ctx0;
+
+        for (i = 0; i < 10; i++)
+            gem_execbuf(fd, &execbuf);
+
+        /* Wedge after a small delay. */
+        igt_assert_eq(__check_wait(fd, obj.handle, 100e3), 0);
+
+        /* Unwedge by forcing a reset. */
+        igt_assert(i915_reset_control(true));
+        trigger_reset(fd);
+
+        gem_quiescent_gpu(fd);
+
+        /*
+         * Verify that we are able to submit work after unwedging from
+         * both contexts.
+         */
+        execbuf.rsvd1 = ctx;
+        for (i = 0; i < 5; i++)
+            gem_execbuf(fd, &execbuf);
+
+        execbuf.rsvd1 = ctx0;
+        for (i = 0; i < 5; i++)
+            gem_execbuf(fd, &execbuf);
+
+        gem_sync(fd, obj.handle);
+        igt_spin_batch_free(fd, hang);
+        gem_context_destroy(fd, ctx);
+        gem_close(fd, obj.handle);
+    }
+
+    gem_context_destroy(fd, ctx0);
+}
+
   static int fd = -1;

static void

tests/gem_eio.c +6 -0

@@ -635,6 +703,12 @@ igt_main
       igt_subtest("in-flight-suspend")
           test_inflight_suspend(fd);
+    igt_subtest("reset-stress")
+        test_reset_stress(fd, 0);
+
+    igt_subtest("unwedge-stress")
+        test_reset_stress(fd, TEST_WEDGE);
+

Quoted 8 lines

tests/gem_eio.c igt_main
Quoted 4 lines
tests/gem_eio.c +0 -0
       igt_subtest_group {
           const struct {
               unsigned int wait;
 
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Patchwork

2018-03-29 17:50 UTC #9 lore raw

[igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,v2,1/2] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset

In reply to Tvrtko Ursulin

== Series Details ==

Series: series starting with [i-g-t,v2,1/2] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset
URL : https://patchwork.freedesktop.org/series/40879/
State : success

== Summary ==

IGT patchset tested on top of latest successful build 2cbd4ddf11b3eaf01f33d8bc2ad46411ec6c299a lib/igt_kms: Improve connector probing in igt_display_init(), v2.

with latest DRM-Tip kernel build CI_DRM_4008
befd0b655b91 drm-tip: 2018y-03m-29d-16h-19m-32s UTC integration manifest

Testlist changes:
+igt@gem_eio@context-destroyer
+igt@gem_eio@context-destroyer-wedge

---- Known issues:

Test debugfs_test:

        Subgroup read_all_entries:
                pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713
Test gem_mmap_gtt:
        Subgroup basic-small-bo-tiledx:
                pass       -> FAIL       (fi-gdg-551) fdo#102575
Test kms_chamelium:
        Subgroup dp-crc-fast:
                pass       -> DMESG-FAIL (fi-kbl-7500u) fdo#103841
Test prime_vgem:
        Subgroup basic-fence-flip:
                fail       -> PASS       (fi-ilk-650) fdo#104008

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008

fi-bdw-5557u     total:285  pass:264  dwarn:0   dfail:0   fail:0   skip:21  time:430s
fi-bdw-gvtdvm    total:285  pass:261  dwarn:0   dfail:0   fail:0   skip:24  time:443s
fi-blb-e6850     total:285  pass:220  dwarn:1   dfail:0   fail:0   skip:64  time:382s
fi-bsw-n3050     total:285  pass:239  dwarn:0   dfail:0   fail:0   skip:46  time:538s
fi-bwr-2160      total:285  pass:180  dwarn:0   dfail:0   fail:0   skip:105 time:296s
fi-bxt-j4205     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:512s
fi-byt-j1900     total:285  pass:250  dwarn:0   dfail:0   fail:0   skip:35  time:525s
fi-byt-n2820     total:285  pass:246  dwarn:0   dfail:0   fail:0   skip:39  time:507s
fi-cfl-8700k     total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:410s
fi-cfl-s3        total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:559s
fi-cfl-u         total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:511s
fi-cnl-y3        total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:585s
fi-elk-e7500     total:285  pass:225  dwarn:1   dfail:0   fail:0   skip:59  time:421s
fi-gdg-551       total:285  pass:176  dwarn:0   dfail:0   fail:1   skip:108 time:324s
fi-glk-1         total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:550s
fi-hsw-4770      total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:406s
fi-ilk-650       total:285  pass:225  dwarn:0   dfail:0   fail:0   skip:60  time:421s
fi-ivb-3520m     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:474s
fi-ivb-3770      total:285  pass:252  dwarn:0   dfail:0   fail:0   skip:33  time:437s
fi-kbl-7500u     total:285  pass:259  dwarn:1   dfail:1   fail:0   skip:24  time:470s
fi-kbl-7567u     total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:465s
fi-kbl-r         total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:510s
fi-pnv-d510      total:285  pass:219  dwarn:1   dfail:0   fail:0   skip:65  time:663s
fi-skl-6260u     total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:440s
fi-skl-6600u     total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:533s
fi-skl-6700k2    total:285  pass:261  dwarn:0   dfail:0   fail:0   skip:24  time:509s
fi-skl-6770hq    total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:496s
fi-skl-guc       total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:430s
fi-skl-gvtdvm    total:285  pass:262  dwarn:0   dfail:0   fail:0   skip:23  time:448s
fi-snb-2520m     total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-snb-2600      total:285  pass:245  dwarn:0   dfail:0   fail:0   skip:40  time:405s
Blacklisted hosts:
fi-cnl-psr       total:285  pass:256  dwarn:3   dfail:0   fail:0   skip:26  time:517s
fi-glk-j4005     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:485s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1209/issues.html
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Patchwork

2018-03-29 22:14 UTC #10 lore raw

[igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,v2,1/2] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset

In reply to Tvrtko Ursulin

== Series Details ==

Series: series starting with [i-g-t,v2,1/2] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset
URL : https://patchwork.freedesktop.org/series/40879/
State : success

== Summary ==

---- Possible new issues:

Test kms_frontbuffer_tracking:

        Subgroup psr-2p-scndscrn-cur-indfb-draw-mmap-gtt:
                fail       -> SKIP       (shard-snb)

---- Known issues:

Test kms_cursor_legacy:

        Subgroup flip-vs-cursor-toggle:
                fail       -> PASS       (shard-hsw) fdo#102670
Test kms_flip:
        Subgroup 2x-dpms-vs-vblank-race-interruptible:
                pass       -> FAIL       (shard-hsw) fdo#103060 +1
        Subgroup 2x-flip-vs-expired-vblank:
                fail       -> PASS       (shard-hsw) fdo#102887
        Subgroup plain-flip-fb-recreate-interruptible:
                pass       -> FAIL       (shard-hsw) fdo#100368
Test kms_rotation_crc:
        Subgroup sprite-rotation-180:
                fail       -> PASS       (shard-snb) fdo#103925
Test perf:
        Subgroup blocking:
                fail       -> PASS       (shard-hsw) fdo#102252

fdo#102670 https://bugs.freedesktop.org/show_bug.cgi?id=102670
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252

shard-apl        total:3497 pass:1833 dwarn:1   dfail:0   fail:7   skip:1655 time:12966s
shard-hsw        total:3497 pass:1782 dwarn:1   dfail:0   fail:4   skip:1709 time:11824s
shard-snb        total:3497 pass:1377 dwarn:1   dfail:0   fail:2   skip:2117 time:7051s

Blacklisted hosts:
shard-kbl total:3424 pass:1920 dwarn:1 dfail:1 fail:6 skip:1495 time:9102s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1209/shards.html
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Patchwork

2018-04-03 13:39 UTC #11 lore raw

[igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,v2,1/2] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset (rev2)

In reply to Tvrtko Ursulin

== Series Details ==

Series: series starting with [i-g-t,v2,1/2] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset (rev2)
URL : https://patchwork.freedesktop.org/series/40879/
State : success

== Summary ==

IGT patchset tested on top of latest successful build da00bf83aba3b516922efa1f338381189461aa4a tests/kms_plane_scaling: fb height to be min 16 for NV12

with latest DRM-Tip kernel build CI_DRM_4016
9a423e97b1f6 drm-tip: 2018y-04m-03d-11h-50m-53s UTC integration manifest

Testlist changes:
+igt@gem_eio@reset-stress
+igt@gem_eio@unwedge-stress

fi-bdw-5557u     total:285  pass:264  dwarn:0   dfail:0   fail:0   skip:21  time:433s
fi-bdw-gvtdvm    total:285  pass:261  dwarn:0   dfail:0   fail:0   skip:24  time:443s
fi-blb-e6850     total:285  pass:220  dwarn:1   dfail:0   fail:0   skip:64  time:381s
fi-bsw-n3050     total:285  pass:239  dwarn:0   dfail:0   fail:0   skip:46  time:542s
fi-bwr-2160      total:285  pass:180  dwarn:0   dfail:0   fail:0   skip:105 time:301s
fi-bxt-dsi       total:285  pass:255  dwarn:0   dfail:0   fail:0   skip:30  time:519s
fi-bxt-j4205     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:512s
fi-byt-j1900     total:285  pass:250  dwarn:0   dfail:0   fail:0   skip:35  time:525s
fi-byt-n2820     total:285  pass:246  dwarn:0   dfail:0   fail:0   skip:39  time:512s
fi-cfl-8700k     total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:409s
fi-cfl-s3        total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:563s
fi-cfl-u         total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:513s
fi-cnl-y3        total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:587s
fi-elk-e7500     total:285  pass:225  dwarn:1   dfail:0   fail:0   skip:59  time:424s
fi-gdg-551       total:285  pass:176  dwarn:0   dfail:0   fail:1   skip:108 time:316s
fi-glk-1         total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:540s
fi-hsw-4770      total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:408s
fi-ilk-650       total:285  pass:225  dwarn:0   dfail:0   fail:0   skip:60  time:420s
fi-ivb-3520m     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:470s
fi-ivb-3770      total:285  pass:252  dwarn:0   dfail:0   fail:0   skip:33  time:430s
fi-kbl-7500u     total:285  pass:260  dwarn:1   dfail:0   fail:0   skip:24  time:479s
fi-kbl-7567u     total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:461s
fi-kbl-r         total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:511s
fi-pnv-d510      total:285  pass:219  dwarn:1   dfail:0   fail:0   skip:65  time:662s
fi-skl-6260u     total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:440s
fi-skl-6600u     total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:534s
fi-skl-6700k2    total:285  pass:261  dwarn:0   dfail:0   fail:0   skip:24  time:504s
fi-skl-6770hq    total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:497s
fi-skl-guc       total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:432s
fi-skl-gvtdvm    total:285  pass:262  dwarn:0   dfail:0   fail:0   skip:23  time:443s
fi-snb-2520m     total:285  pass:245  dwarn:0   dfail:0   fail:0   skip:40  time:592s
fi-snb-2600      total:285  pass:245  dwarn:0   dfail:0   fail:0   skip:40  time:399s
Blacklisted hosts:
fi-cnl-psr       total:285  pass:256  dwarn:3   dfail:0   fail:0   skip:26  time:513s
fi-glk-j4005     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:486s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1217/issues.html
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Patchwork

2018-04-03 15:26 UTC #12 lore raw

[igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,v2,1/2] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset (rev2)

In reply to Tvrtko Ursulin

== Series Details ==

Series: series starting with [i-g-t,v2,1/2] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset (rev2)
URL : https://patchwork.freedesktop.org/series/40879/
State : success

== Summary ==

---- Possible new issues:

Test kms_draw_crc:

        Subgroup draw-method-xrgb8888-mmap-wc-untiled:
                skip       -> PASS       (shard-snb)
Test kms_flip:
        Subgroup flip-vs-modeset-vs-hang:
                dmesg-warn -> PASS       (shard-hsw)
Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-offscren-pri-indfb-draw-mmap-cpu:
                skip       -> PASS       (shard-snb)
        Subgroup fbc-1p-primscrn-spr-indfb-move:
                skip       -> PASS       (shard-snb)
Test prime_vgem:
        Subgroup basic-fence-flip:
                skip       -> PASS       (shard-snb)
Test syncobj_wait:
        Subgroup multi-wait-for-submit-unsubmitted-signaled:
                incomplete -> PASS       (shard-snb)

---- Known issues:

Test kms_cursor_legacy:

        Subgroup flip-vs-cursor-toggle:
                fail       -> PASS       (shard-hsw) fdo#102670 +1
Test kms_flip:
        Subgroup 2x-dpms-vs-vblank-race-interruptible:
                fail       -> PASS       (shard-hsw) fdo#103060
        Subgroup basic-flip-vs-wf_vblank:
                pass       -> FAIL       (shard-hsw) fdo#100368
        Subgroup flip-vs-expired-vblank-interruptible:
                fail       -> PASS       (shard-hsw) fdo#102887
Test kms_plane_multiple:
        Subgroup atomic-pipe-a-tiling-x:
                pass       -> FAIL       (shard-snb) fdo#103166
Test kms_sysfs_edid_timing:
                pass       -> WARN       (shard-apl) fdo#100047
Test kms_vblank:
        Subgroup pipe-c-accuracy-idle:
                fail       -> PASS       (shard-hsw) fdo#102583

fdo#102670 https://bugs.freedesktop.org/show_bug.cgi?id=102670
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
fdo#102583 https://bugs.freedesktop.org/show_bug.cgi?id=102583

shard-apl        total:3498 pass:1834 dwarn:1   dfail:0   fail:7   skip:1655 time:12869s
shard-hsw        total:3498 pass:1782 dwarn:1   dfail:0   fail:4   skip:1710 time:11332s
shard-snb        total:3498 pass:1376 dwarn:1   dfail:0   fail:3   skip:2118 time:6964s

Blacklisted hosts:
shard-kbl total:3498 pass:1961 dwarn:1 dfail:0 fail:7 skip:1529 time:9359s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1217/shards.html
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