openrisc: define mb() as its mandatory
Stafford Horne
maintainerPATCH 1/1 openrisc: define mb() as its mandatory
Following Peter Z's patch ("asm-generic: Disallow no-op mb() for SMP systems") which makes mb() mandatory for SMP architectures we define it as l.msync. On OpenRISC this will flush the current cores write buffer and trigger remote cores to invalidate their caches of the written memory.
---
Notes:
- Sorry, its been a while since we discussed this patch is the parent to this still going in Peter?
- I have not got around to updating our architecture spec for the TSO/PSO notes we discussed.
arch/openrisc/include/asm/Kbuild | 1 - arch/openrisc/include/asm/barrier.h | 8 ++++++++ 2 files changed, 8 insertions(+), 1 deletion(-) create mode 100644 arch/openrisc/include/asm/barrier.h
arch/openrisc/include/asm/Kbuild +0 -1
@@ -1,4 +1,3 @@ -generic-y += barrier.h generic-y += bug.h generic-y += bugs.h generic-y += checksum.h
arch/openrisc/include/asm/barrier.h new file +8 -0
@@ -0,0 +1,8 @@ +#ifndef _ASM_OPENRISC_BARRIER_H +#define _ASM_OPENRISC_BARRIER_H + +#define mb () asm volatile ("l.msync":::"memory") + +#include <asm-generic/barrier.h> + +#endif /* _ASM_OPENRISC_BARRIER_H */
Signature · 1 line
2.13.6
Quoted 10 lines · Stafford Horne
Following Peter Z's patch ("asm-generic: Disallow no-op
mb()for SMP systems") which makesmb()mandatory for SMP architectures we define it as l.msync. On OpenRISC this will flush the current cores write buffer and trigger remote cores to invalidate their caches of the written memory.Signed-off-by Stafford Horne <[email protected]>Cc Peter Zijlstra <[email protected]>Cc Will Deacon <[email protected]>
Quoted 5 lines
---
Notes:
- Sorry, its been a while since we discussed this patch is the parent to this still going in Peter?
Oops.. yes it should. It seems I also lost track of it. Thanks for the reminder!
Stafford Horne
maintainerQuoted 13 lines · Peter Zijlstra
Quoted 12 lines · Stafford Horne
Following Peter Z's patch ("asm-generic: Disallow no-op
mb()for SMP systems") which makesmb()mandatory for SMP architectures we define it as l.msync. On OpenRISC this will flush the current cores write buffer and trigger remote cores to invalidate their caches of the written memory.Signed-off-by Stafford Horne <[email protected]>Cc Peter Zijlstra <[email protected]>Cc Will Deacon <[email protected]>---
Quoted 6 lines
Quoted 3 lines
Notes:
- Sorry, its been a while since we discussed this patch is the parent to this still going in Peter?Oops.. yes it should. It seems I also lost track of it. Thanks for the reminder!
No Problem,
If you think this patch makes sense I can just put it into my OpenRISC queue for 4.17. I dont see any reason to wait for yours. Any thoughts?
-Stafford
Quoted 18 lines · Stafford Horne
Quoted 17 lines · Peter Zijlstra
Quoted 15 lines · Stafford Horne
Following Peter Z's patch ("asm-generic: Disallow no-op
mb()for SMP systems") which makesmb()mandatory for SMP architectures we define it as l.msync. On OpenRISC this will flush the current cores write buffer and trigger remote cores to invalidate their caches of the written memory.Signed-off-by Stafford Horne <[email protected]>Cc Peter Zijlstra <[email protected]>Cc Will Deacon <[email protected]>---
Notes:
- Sorry, its been a while since we discussed this patch is the parent to this still going in Peter?
Quoted 7 lines
Quoted 2 lines
Oops.. yes it should. It seems I also lost track of it. Thanks for the reminder!
No Problem,
If you think this patch makes sense I can just put it into my OpenRISC queue for 4.17. I dont see any reason to wait for yours. Any thoughts?
I'm fine with you taking the patch, but I just saw the build robot found two failure cases: PARISC and 32-bit SPARC. I send patches for both, if their respective maintainers agree you could do the lot.