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ARM: i.MX6: Add u-boot dtsi files

PATCH Superseded Jagan Teki 1 participant 6 messages Apr 11, 2018 – Apr 19, 2018

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Jagan Teki

author
#0 lore raw

v4 cover ARM: i.MX6: Add u-boot dtsi files

All CONFIG changes from arch/arm/mach-imx fromprevious version [1] since most of them won't agree with new naming convention that sync with Linux.

This series add rest of changes like u-boot dtsi files for U-Boot definitions and arch/arm/boot/Makefile changes wrt imx.

Changes for v4:
- Drop patches related to CONFIG changes on arch/arm/mach-imx
- Revised and rebased on master

Changes for v3:
- Drop patch "Change SYS_SOC from mx6 to imx6"

Changes for v2:
- Add new patch "ARM: dts: imx6ul-isiot: Move usdhc2 into dtsi"
- Fixed *u-boot.dtsi files
- Fixed board/logicpd/imx6/mx6q_2x_MT41K512M16HA.cfg to use imx6

[1] https://patchwork.ozlabs.org/cover/890931/

Jagan Teki (4):
ARM: dts: i.MX6QDL: U-Boot specific dts for u-boot,dm-spl
ARM: dts: imx6ul-isiot: Move usdhc2 into dtsi
ARM: dts: i.MX6UL: U-Boot specific dts for u-boot,dm-spl
ARM: i.MX6: dts: Build dtb based on SOC type

 arch/arm/dts/Makefile                      | 18 ++++++++++++-----
 arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi | 11 +++++++++++
 arch/arm/dts/imx6dl-icore-mipi.dts         |  1 -
 arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi  |  7 +++++++
 arch/arm/dts/imx6dl-icore-u-boot.dtsi      |  7 +++++++
 arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi  | 11 +++++++++++
 arch/arm/dts/imx6q-icore-mipi.dts          |  1 -
 arch/arm/dts/imx6q-icore-rqs-u-boot.dtsi   |  7 +++++++
 arch/arm/dts/imx6q-icore-u-boot.dtsi       |  7 +++++++
 arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi | 23 ++++++++++++++++++++++
 arch/arm/dts/imx6qdl-icore-rqs.dtsi        |  4 ----
 arch/arm/dts/imx6qdl-icore-u-boot.dtsi     | 19 ++++++++++++++++++
 arch/arm/dts/imx6qdl-icore.dtsi            |  3 ---
 arch/arm/dts/imx6qdl-u-boot.dtsi           | 27 ++++++++++++++++++++++++++
 arch/arm/dts/imx6qdl.dtsi                  |  5 -----
 arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi   | 25 ++++++++++++++++++++++++
 arch/arm/dts/imx6ul-geam-kit.dts           |  4 ----
 arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi | 11 +++++++++++
 arch/arm/dts/imx6ul-isiot-emmc.dts         | 25 +-----------------------
 arch/arm/dts/imx6ul-isiot-nand.dts         |  1 +
 arch/arm/dts/imx6ul-isiot-u-boot.dtsi      | 19 ++++++++++++++++++
 arch/arm/dts/imx6ul-isiot.dtsi             | 29 +++++++++++++++++++++++++---
 arch/arm/dts/imx6ul-u-boot.dtsi            | 31 ++++++++++++++++++++++++++++++
 arch/arm/dts/imx6ul.dtsi                   |  6 ------
 board/engicam/imx6q/MAINTAINERS            | 11 ++++++++++-
 board/engicam/imx6ul/MAINTAINERS           |  5 +++++
 26 files changed, 261 insertions(+), 57 deletions(-)
 create mode 100644 arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6dl-icore-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6q-icore-rqs-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6q-icore-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6qdl-icore-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6qdl-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6ul-isiot-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6ul-u-boot.dtsi
Signature · 1 line
2.14.3
author
#1 lore raw

PATCH v4 1/4 ARM: dts: i.MX6QDL: U-Boot specific dts for u-boot, dm-spl

u-boot,dm-spl property is specific to U-Boot, so move it into *u-boot.dtsi files for relevant i.MX6QDL files.

This make syncing Linux dts files straight forward.

Also update the MAINTAINERS file for dts files.

Signed-off-by Jagan Teki <[email protected]>
---
 arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi | 11 +++++++++++
 arch/arm/dts/imx6dl-icore-mipi.dts         |  1 -
 arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi  |  7 +++++++
 arch/arm/dts/imx6dl-icore-u-boot.dtsi      |  7 +++++++
 arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi  | 11 +++++++++++
 arch/arm/dts/imx6q-icore-mipi.dts          |  1 -
 arch/arm/dts/imx6q-icore-rqs-u-boot.dtsi   |  7 +++++++
 arch/arm/dts/imx6q-icore-u-boot.dtsi       |  7 +++++++
 arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi | 23 +++++++++++++++++++++++
 arch/arm/dts/imx6qdl-icore-rqs.dtsi        |  4 ----
 arch/arm/dts/imx6qdl-icore-u-boot.dtsi     | 19 +++++++++++++++++++
 arch/arm/dts/imx6qdl-icore.dtsi            |  3 ---
 arch/arm/dts/imx6qdl-u-boot.dtsi           | 27 +++++++++++++++++++++++++++
 arch/arm/dts/imx6qdl.dtsi                  |  5 -----
 board/engicam/imx6q/MAINTAINERS            | 11 ++++++++++-
 15 files changed, 129 insertions(+), 15 deletions(-)
 create mode 100644 arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6dl-icore-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6q-icore-rqs-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6q-icore-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6qdl-icore-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6qdl-u-boot.dtsi
arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi new file +11 -0
new file mode 100644
index 0000000000..86e8da761d
@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "imx6qdl-icore-u-boot.dtsi"
+
+&usdhc3 {
+	u-boot,dm-spl;
+};
arch/arm/dts/imx6dl-icore-mipi.dts +0 -1
index 3a444c0d98..39bdf2d55b 100644
@@ -16,6 +16,5 @@
 };
 
 &usdhc3 {
-	u-boot,dm-spl;
 	status = "okay";
 };
arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi new file +7 -0
new file mode 100644
index 0000000000..210b930264
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "imx6qdl-icore-rqs-u-boot.dtsi"
arch/arm/dts/imx6dl-icore-u-boot.dtsi new file +7 -0
new file mode 100644
index 0000000000..5bd3df96f5
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "imx6qdl-icore-u-boot.dtsi"
arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi new file +11 -0
new file mode 100644
index 0000000000..86e8da761d
@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "imx6qdl-icore-u-boot.dtsi"
+
+&usdhc3 {
+	u-boot,dm-spl;
+};
arch/arm/dts/imx6q-icore-mipi.dts +0 -1
index 527f52c886..e7c5616a63 100644
@@ -16,6 +16,5 @@
 };
 
 &usdhc3 {
-	u-boot,dm-spl;
 	status = "okay";
 };
arch/arm/dts/imx6q-icore-rqs-u-boot.dtsi new file +7 -0
new file mode 100644
index 0000000000..210b930264
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "imx6qdl-icore-rqs-u-boot.dtsi"
arch/arm/dts/imx6q-icore-u-boot.dtsi new file +7 -0
new file mode 100644
index 0000000000..5bd3df96f5
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "imx6qdl-icore-u-boot.dtsi"
arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi new file +23 -0
new file mode 100644
index 0000000000..458debfbab
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "imx6qdl-u-boot.dtsi"
+
+&usdhc3 {
+	u-boot,dm-spl;
+};
+
+&usdhc4 {
+	u-boot,dm-spl;
+};
+
+&pinctrl_usdhc3 {
+	u-boot,dm-spl;
+};
+
+&pinctrl_usdhc4 {
+	u-boot,dm-spl;
+};
arch/arm/dts/imx6qdl-icore-rqs.dtsi +0 -4
index 4f7f10203d..d797a034f7 100644
@@ -105,7 +105,6 @@
 };
 
 &usdhc3 {
-	u-boot,dm-spl;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_usdhc3>;
 	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;

@@ -114,7 +113,6 @@
 };
 
 &usdhc4 {
-	u-boot,dm-spl;
 	pinctrl-names = "default", "state_100mhz", "state_200mhz";
 	pinctrl-0 = <&pinctrl_usdhc4>;
 	pinctrl-1 = <&pinctrl_usdhc4_100mhz>;

@@ -176,7 +174,6 @@
 	};
 
 	pinctrl_usdhc3: usdhc3grp {
-		u-boot,dm-spl;
 		fsl,pins = <
 			MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17070
 			MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10070

@@ -188,7 +185,6 @@
 	};
 
 	pinctrl_usdhc4: usdhc4grp {
-		u-boot,dm-spl;
 		fsl,pins = <
 			MX6QDL_PAD_SD4_CMD__SD4_CMD    0x17070
 			MX6QDL_PAD_SD4_CLK__SD4_CLK    0x10070
arch/arm/dts/imx6qdl-icore-u-boot.dtsi new file +19 -0
new file mode 100644
index 0000000000..d45c20b10c
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "imx6qdl-u-boot.dtsi"
+
+&usdhc1 {
+	u-boot,dm-spl;
+};
+
+&pinctrl_usdhc1 {
+	u-boot,dm-spl;
+};
+
+&pinctrl_usdhc3 {
+	u-boot,dm-spl;
+};
arch/arm/dts/imx6qdl-icore.dtsi +0 -3
index 913dc99c54..5eccda800d 100644
@@ -122,7 +122,6 @@
 };
 
 &usdhc1 {
-	u-boot,dm-spl;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_usdhc1>;
 	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;

@@ -221,7 +220,6 @@
 	};
 
 	pinctrl_usdhc1: usdhc1grp {
-		u-boot,dm-spl;
 		fsl,pins = <
 			MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17070
 			MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10070

@@ -233,7 +231,6 @@
 	};
 
 	pinctrl_usdhc3: usdhc3grp {
-		u-boot,dm-spl;
 		fsl,pins = <
 			MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059
 			MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10059
arch/arm/dts/imx6qdl-u-boot.dtsi new file +27 -0
new file mode 100644
index 0000000000..e6363aa1c1
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/ {
+	soc {
+		u-boot,dm-spl;
+
+		aips-bus at 02000000 {
+			u-boot,dm-spl;
+		};
+
+		aips-bus at 02100000 {
+			u-boot,dm-spl;
+		};
+	};
+};
+
+&gpio1 {
+	u-boot,dm-spl;
+};
+
+&iomuxc {
+	u-boot,dm-spl;
+};
arch/arm/dts/imx6qdl.dtsi +0 -5
index e04b57089a..b13b0b2db8 100644
@@ -77,7 +77,6 @@
 		compatible = "simple-bus";
 		interrupt-parent = <&gpc>;
 		ranges;
-		u-boot,dm-spl;
 
 		dma_apbh: dma-apbh at 00110000 {
 			compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";

@@ -226,7 +225,6 @@
 			#size-cells = <1>;
 			reg = <0x02000000 0x100000>;
 			ranges;
-			u-boot,dm-spl;
 
 			spba-bus at 02000000 {
 				compatible = "fsl,spba-bus", "simple-bus";

@@ -518,7 +516,6 @@
 				#gpio-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
-				u-boot,dm-spl;
 			};
 
 			gpio2: gpio at 020a0000 {

@@ -808,7 +805,6 @@
 			iomuxc: iomuxc at 020e0000 {
 				compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc";
 				reg = <0x020e0000 0x4000>;
-				u-boot,dm-spl;
 			};
 
 			ldb: ldb at 020e0008 {

@@ -893,7 +889,6 @@
 			#size-cells = <1>;
 			reg = <0x02100000 0x100000>;
 			ranges;
-			u-boot,dm-spl;
 
 			crypto: caam at 2100000 {
 				compatible = "fsl,sec-v4.0";
board/engicam/imx6q/MAINTAINERS +10 -1
index 71f794586f..6b46378c54 100644
@@ -9,12 +9,21 @@ F:	configs/imx6dl_icore_nand_defconfig
 F:	configs/imx6qdl_icore_rqs_defconfig
 F:	configs/imx6qdl_icore_mipi_defconfig
 F:	configs/imx6qdl_icore_nand_defconfig
+F:	arch/arm/dts/imx6qdl.dtsi
+F:	arch/arm/dts/imx6qdl-u-boot.dtsi
 F:	arch/arm/dts/imx6qdl-icore.dtsi
+F:	arch/arm/dts/imx6qdl-icore-u-boot.dtsi
 F:	arch/arm/dts/imx6q-icore.dts
+F:	arch/arm/dts/imx6q-icore-u-boot.dtsi
 F:	arch/arm/dts/imx6dl-icore.dts
+F:	arch/arm/dts/imx6dl-icore-u-boot.dtsi
 F:	arch/arm/dts/imx6qdl-icore-rqs.dtsi
+F:	arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi
 F:	arch/arm/dts/imx6q-icore-rqs.dts
+F:	arch/arm/dts/imx6q-icore-rqs-u-boot.dtsi
 F:	arch/arm/dts/imx6dl-icore-rqs.dts
+F:	arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi
 F:	arch/arm/dts/imx6dl-icore-mipi.dts
+F:	arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi
 F:	arch/arm/dts/imx6q-icore-mipi.dts
-F:	arch/arm/dts/imx6qdl-icore.dtsi
+F:	arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi
Signature · 1 line
2.14.3
author
#2 lore raw

PATCH v4 2/4 ARM: dts: imx6ul-isiot: Move usdhc2 into dtsi

In reply to Jagan Teki

Move usdhc2 node along with pinctrl to imx6ul-isiot.dts from imx6ul-isiot-emmc.dts

Signed-off-by Jagan Teki <[email protected]>
---
 arch/arm/dts/imx6ul-isiot-emmc.dts | 24 ------------------------
 arch/arm/dts/imx6ul-isiot.dtsi     | 26 ++++++++++++++++++++++++++
 2 files changed, 26 insertions(+), 24 deletions(-)
arch/arm/dts/imx6ul-isiot-emmc.dts +0 -24
index a611e3bba5..588bebac47 100644
@@ -51,29 +51,5 @@
 
 &usdhc2 {
 	u-boot,dm-spl;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_usdhc2>;
-	cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
-	bus-width = <8>;
-	no-1-8-v;
 	status = "okay";
 };
-
-&iomuxc {
-	pinctrl_usdhc2: usdhc2grp {
-		u-boot,dm-spl;
-		fsl,pins = <
-			MX6UL_PAD_NAND_RE_B__USDHC2_CLK      0x17070
-			MX6UL_PAD_NAND_WE_B__USDHC2_CMD      0x10070
-			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0  0x17070
-			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1  0x17070
-			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2  0x17070
-			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3  0x17070
-			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4  0x17070
-			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5  0x17070
-			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6  0x17070
-			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7  0x17070
-			MX6UL_PAD_NAND_ALE__USDHC2_RESET_B   0x17070
-		>;
-	};
-};
arch/arm/dts/imx6ul-isiot.dtsi +26 -0
index 5007a88f45..e645c1265f 100644
@@ -91,6 +91,15 @@
 	status = "okay";
 };
 
+&usdhc2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc2>;
+	cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
+	bus-width = <8>;
+	no-1-8-v;
+	status = "disabled";
+};
+
 &iomuxc {
 	pinctrl_enet1: enet1grp {
 		fsl,pins = <

@@ -139,4 +148,21 @@
 			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
 		>;
 	};
+
+	pinctrl_usdhc2: usdhc2grp {
+		u-boot,dm-spl;
+		fsl,pins = <
+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK      0x17070
+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD      0x10070
+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0  0x17070
+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1  0x17070
+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2  0x17070
+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3  0x17070
+			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4  0x17070
+			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5  0x17070
+			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6  0x17070
+			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7  0x17070
+			MX6UL_PAD_NAND_ALE__USDHC2_RESET_B   0x17070
+		>;
+	};
 };
Signature · 1 line
2.14.3
author
#3 lore raw

PATCH v4 3/4 ARM: dts: i.MX6UL: U-Boot specific dts for u-boot, dm-spl

In reply to Jagan Teki

u-boot,dm-spl property is specific to U-Boot, so move it into *u-boot.dtsi files for relevant i.MX6UL files.

This make syncing Linux dts files straight forward.

Also update the MAINTAINERS file for dts files.

Signed-off-by Jagan Teki <[email protected]>
---
 arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi   | 25 ++++++++++++++++++++++++
 arch/arm/dts/imx6ul-geam-kit.dts           |  4 ----
 arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi | 11 +++++++++++
 arch/arm/dts/imx6ul-isiot-emmc.dts         |  1 +
 arch/arm/dts/imx6ul-isiot-nand.dts         |  1 +
 arch/arm/dts/imx6ul-isiot-u-boot.dtsi      | 19 ++++++++++++++++++
 arch/arm/dts/imx6ul-isiot.dtsi             |  3 ---
 arch/arm/dts/imx6ul-u-boot.dtsi            | 31 ++++++++++++++++++++++++++++++
 arch/arm/dts/imx6ul.dtsi                   |  6 ------
 board/engicam/imx6ul/MAINTAINERS           |  5 +++++
 10 files changed, 93 insertions(+), 13 deletions(-)
 create mode 100644 arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6ul-isiot-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6ul-u-boot.dtsi
arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi new file +25 -0
new file mode 100644
index 0000000000..d1b77ba295
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "imx6ul-u-boot.dtsi"
+
+&usdhc1 {
+	u-boot,dm-spl;
+};
+
+&iomuxc {
+	pinctrl_usdhc1: usdhc1grp {
+		u-boot,dm-spl;
+	};
+
+	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+		u-boot,dm-spl;
+	};
+
+	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+		u-boot,dm-spl;
+	};
+};
arch/arm/dts/imx6ul-geam-kit.dts +0 -4
index 15e3f94153..07c21cb0a2 100644
@@ -87,7 +87,6 @@
 };
 
 &usdhc1 {
-	u-boot,dm-spl;
 	pinctrl-names = "default", "state_100mhz", "state_200mhz";
 	pinctrl-0 = <&pinctrl_usdhc1>;
 	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;

@@ -135,7 +134,6 @@
 	};
 
 	pinctrl_usdhc1: usdhc1grp {
-		u-boot,dm-spl;
 		fsl,pins = <
 			MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x17059
 			MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x10059

@@ -147,7 +145,6 @@
 	};
 
 	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
-		u-boot,dm-spl;
 		fsl,pins = <
 			MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
 			MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9

@@ -159,7 +156,6 @@
 	};
 
 	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
-		u-boot,dm-spl;
 		fsl,pins = <
 			MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
 			MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9
arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi new file +11 -0
new file mode 100644
index 0000000000..7d0cc154cf
@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "imx6ul-isiot-u-boot.dtsi"
+
+&usdhc2 {
+	u-boot,dm-spl;
+};
arch/arm/dts/imx6ul-isiot-emmc.dts +1 -0
index 588bebac47..50ce2d798e 100644
@@ -42,6 +42,7 @@
 
 /dts-v1/;
 
+#include "imx6ul.dtsi"
 #include "imx6ul-isiot.dtsi"
 
 / {
arch/arm/dts/imx6ul-isiot-nand.dts +1 -0
index 12a3528428..ffdaf34efb 100644
@@ -42,6 +42,7 @@
 
 /dts-v1/;
 
+#include "imx6ul.dtsi"
 #include "imx6ul-isiot.dtsi"
 
 / {
arch/arm/dts/imx6ul-isiot-u-boot.dtsi new file +19 -0
new file mode 100644
index 0000000000..f98c395747
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "imx6ul-u-boot.dtsi"
+
+&usdhc1 {
+	u-boot,dm-spl;
+};
+
+&pinctrl_usdhc1 {
+	u-boot,dm-spl;
+};
+
+&pinctrl_usdhc2 {
+	u-boot,dm-spl;
+};
arch/arm/dts/imx6ul-isiot.dtsi +0 -3
index e645c1265f..4ed7313683 100644
@@ -42,7 +42,6 @@
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
-#include "imx6ul.dtsi"
 
 / {
 	memory {

@@ -82,7 +81,6 @@
 };
 
 &usdhc1 {
-	u-boot,dm-spl;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_usdhc1>;
 	cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;

@@ -138,7 +136,6 @@
 	};
 
 	pinctrl_usdhc1: usdhc1grp {
-		u-boot,dm-spl;
 		fsl,pins = <
 			MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x17059
 			MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x10059
arch/arm/dts/imx6ul-u-boot.dtsi new file +31 -0
new file mode 100644
index 0000000000..08d7747e1c
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/ {
+	soc {
+		u-boot,dm-spl;
+	};
+};
+
+&aips1 {
+	u-boot,dm-spl;
+};
+
+&gpio1 {
+	u-boot,dm-spl;
+};
+
+&gpio4 {
+	u-boot,dm-spl;
+};
+
+&iomuxc {
+	u-boot,dm-spl;
+};
+
+&aips2 {
+	u-boot,dm-spl;
+};
arch/arm/dts/imx6ul.dtsi +0 -6
index 7affab866f..def5f8cac9 100644
@@ -134,7 +134,6 @@
 		compatible = "simple-bus";
 		interrupt-parent = <&gpc>;
 		ranges;
-		u-boot,dm-spl;
 
 		pmu {
 			compatible = "arm,cortex-a7-pmu";

@@ -186,7 +185,6 @@
 			#size-cells = <1>;
 			reg = <0x02000000 0x100000>;
 			ranges;
-			u-boot,dm-spl;
 
 			spba-bus at 02000000 {
 				compatible = "fsl,spba-bus", "simple-bus";

@@ -417,7 +415,6 @@
 				#interrupt-cells = <2>;
 				gpio-ranges = <&iomuxc  0 23 10>, <&iomuxc 10 17 6>,
 					      <&iomuxc 16 33 16>;
-				u-boot,dm-spl;
 			};
 
 			gpio2: gpio at 020a0000 {

@@ -454,7 +451,6 @@
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>;
-				u-boot,dm-spl;
 			};
 
 			gpio5: gpio at 020ac000 {

@@ -653,7 +649,6 @@
 			iomuxc: iomuxc at 020e0000 {
 				compatible = "fsl,imx6ul-iomuxc";
 				reg = <0x020e0000 0x4000>;
-				u-boot,dm-spl;
 			};
 
 			gpr: iomuxc-gpr at 020e4000 {

@@ -734,7 +729,6 @@
 			#size-cells = <1>;
 			reg = <0x02100000 0x100000>;
 			ranges;
-			u-boot,dm-spl;
 
 			usbotg1: usb at 02184000 {
 				compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
board/engicam/imx6ul/MAINTAINERS +5 -0
index 73dbec88e2..88db309aec 100644
@@ -8,7 +8,12 @@ F:	configs/imx6ul_geam_nand_defconfig
 F:	configs/imx6ul_isiot_emmc_defconfig
 F:	configs/imx6ul_isiot_mmc_defconfig
 F:	configs/imx6ul_isiot_nand_defconfig
+F:	arch/arm/dts/imx6ul.dtsi
+F:	arch/arm/dts/imx6ul-u-boot.dtsi
 F:	arch/arm/dts/imx6ul-geam-kit.dts
+F:	arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi
 F:	arch/arm/dts/imx6ul-isiot.dtsi
+F:	arch/arm/dts/imx6ul-isiot-u-boot.dtsi
 F:	arch/arm/dts/imx6ul-isiot-emmc.dts
+F:	arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi
 F:	arch/arm/dts/imx6ul-isiot-nand.dts
Signature · 1 line
2.14.3
author
#4 lore raw

PATCH v4 4/4 ARM: i.MX6: dts: Build dtb based on SOC type

In reply to Jagan Teki

Build dtb's based on SOC type instead building arch type.

Signed-off-by Jagan Teki <[email protected]>
---
 arch/arm/dts/Makefile | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)
arch/arm/dts/Makefile +13 -5
index 62fbf32a62..f03e276486 100644
@@ -394,9 +394,7 @@ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
 
 dtb-$(CONFIG_MX53) += imx53-cx9020.dtb
 
-dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
-	imx6sl-evk.dtb \
-	imx6sll-evk.dtb \
+dtb-$(CONFIG_MX6QDL) += \
 	imx6dl-icore.dtb \
 	imx6dl-icore-mipi.dtb \
 	imx6dl-icore-rqs.dtb \

@@ -404,14 +402,24 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
 	imx6q-icore.dtb \
 	imx6q-icore-mipi.dtb \
 	imx6q-icore-rqs.dtb \
-	imx6q-logicpd.dtb \
+	imx6q-logicpd.dtb
+
+dtb-$(CONFIG_MX6SL) += imx6sl-evk.dtb
+
+dtb-$(CONFIG_MX6SL) += imx6sll-evk.dtb
+
+dtb-$(CONFIG_MX6SX) += \
 	imx6sx-sabreauto.dtb \
-	imx6sx-sdb.dtb \
+	imx6sx-sdb.dtb
+
+dtb-$(CONFIG_MX6UL) += \
 	imx6ul-geam-kit.dtb \
 	imx6ul-isiot-emmc.dtb \
 	imx6ul-isiot-nand.dtb \
 	imx6ul-opos6uldev.dtb
 
+dtb-$(CONFIG_MX6ULL) += imx6ull-14x14-evk.dtb
+
 dtb-$(CONFIG_MX7) += imx7-colibri.dtb \
 	imx7d-sdb.dtb
Signature · 1 line
2.14.3
author
#5 lore raw

v4 cover ARM: i.MX6: Add u-boot dtsi files

In reply to Jagan Teki

Stefano,

Quoted 19 lines · Jagan Teki

All CONFIG changes from arch/arm/mach-imx fromprevious version [1] since most of them won't agree with new naming convention that sync with Linux.

This series add rest of changes like u-boot dtsi files for U-Boot definitions and arch/arm/boot/Makefile changes wrt imx.

Changes for v4:
- Drop patches related to CONFIG changes on arch/arm/mach-imx
- Revised and rebased on master

Changes for v3:
- Drop patch "Change SYS_SOC from mx6 to imx6"

Changes for v2:
- Add new patch "ARM: dts: imx6ul-isiot: Move usdhc2 into dtsi"
- Fixed *u-boot.dtsi files
- Fixed board/logicpd/imx6/mx6q_2x_MT41K512M16HA.cfg to use imx6

Quoted 7 lines

[1] https://patchwork.ozlabs.org/cover/890931/

Jagan Teki (4):
ARM: dts: i.MX6QDL: U-Boot specific dts for u-boot,dm-spl
ARM: dts: imx6ul-isiot: Move usdhc2 into dtsi
ARM: dts: i.MX6UL: U-Boot specific dts for u-boot,dm-spl
ARM: i.MX6: dts: Build dtb based on SOC type

Can you apply this if all OK?

Jagan.

Signature · 4 lines
Jagan Teki
Senior Linux Kernel Engineer | Amarula Solutions
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.