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ARM: dts: Add Aspeed SoC USB controllers to device-tree

PATCH New Benjamin Herrenschmidt 2 participants 4 messages Apr 13, 2018

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#0 lore raw

PATCH 1/2 ARM: dts: Add Aspeed SoC USB controllers to device-tree

This adds the USB controllers to the DT template of the AST24xx and AST25xx SoCs.

This patch doesn't enable them by default on any board specific .dts yet. This will be done when we have the necessary clock/reset and pinmux support. In the meantime though, this will work if u-boot configures things properly.

For the AST2400 I only added pinmux definition for port 1 which is dual USB1/USB2. There are additional USB1 only ports that might require more work but I don't have HW to test at hand so I'm leaving that to whoever cares.

---
 arch/arm/boot/dts/aspeed-g4.dtsi | 27 +++++++++++++++++++++++++++
 arch/arm/boot/dts/aspeed-g5.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 67 insertions(+)
arch/arm/boot/dts/aspeed-g4.dtsi +27 -0
index ae2b8c952e80..c318e481db78 100644
@@ -108,6 +108,23 @@
 			status = "disabled";
 		};
 
+		ehci0: usb at 1e6a1000 {
+			compatible = "aspeed,ast2400-ehci", "generic-ehci";
+			reg = <0x1e6a1000 0x100>;
+			interrupts = <5>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
+			status = "disabled";
+		};
+
+		uhci: usb at 1e6b0000 {
+			compatible = "aspeed,ast2400-uhci", "generic-uhci";
+			reg = <0x1e6b0000 0x100>;
+			interrupts = <14>;
+			#ports = <3>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
+			status = "disabled";
+		};
+
 		apb {
 			compatible = "simple-bus";
 			#address-cells = <1>;
@@ -1232,6 +1249,16 @@
 		groups = "USBCKI";
 	};
 
+	pinctrl_usb2h_default: usb2h_default {
+		function = "USB2H1";
+		groups = "USB2H1";
+	};
+
+	pinctrl_usb2d_default: usb2d_default {
+		function = "USB2D1";
+		groups = "USB2D1";
+	};
+
 	pinctrl_vgabios_rom_default: vgabios_rom_default {
 		function = "VGABIOS_ROM";
 		groups = "VGABIOS_ROM";
arch/arm/boot/dts/aspeed-g5.dtsi +40 -0
index 2477ebc11d9d..cebc19809174 100644
@@ -143,6 +143,31 @@
 			status = "disabled";
 		};
 
+		ehci0: usb at 1e6a1000 {
+			compatible = "aspeed,ast2500-ehci", "generic-ehci";
+			reg = <0x1e6a1000 0x100>;
+			interrupts = <5>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
+			status = "disabled";
+		};
+
+		ehci1: usb at 1e6a3000 {
+			compatible = "aspeed,ast2500-ehci", "generic-ehci";
+			reg = <0x1e6a3000 0x100>;
+			interrupts = <13>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
+			status = "disabled";
+		};
+
+		uhci: usb at 1e6b0000 {
+			compatible = "aspeed,ast2500-uhci", "generic-uhci";
+			reg = <0x1e6b0000 0x100>;
+			interrupts = <14>;
+			#ports = <2>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
+			status = "disabled";
+		};
+
 		apb {
 			compatible = "simple-bus";
 			#address-cells = <1>;
@@ -1363,6 +1388,21 @@
 		groups = "USBCKI";
 	};
 
+	pinctrl_usb2ah_default: usb2ah_default {
+		function = "USB2AH";
+		groups = "USB2AH";
+	};
+
+	pinctrl_usb11bhid_default: usb11bhid_default {
+		function = "USB11BHID";
+		groups = "USB11BHID";
+	};
+
+	pinctrl_usb2bh_default: usb2bh_default {
+		function = "USB2BH";
+		groups = "USB2BH";
+	};
+
 	pinctrl_vgabiosrom_default: vgabiosrom_default {
 		function = "VGABIOSROM";
 		groups = "VGABIOSROM";
Signature · 1 line
2.14.3
#1 lore raw

PATCH 2/2 ARM: dts: Aspeed: Enable USB ports on eval board.

This enables both USB ports as host with EHCI and UHCI attached to them.

---
 arch/arm/boot/dts/aspeed-ast2500-evb.dts | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
arch/arm/boot/dts/aspeed-ast2500-evb.dts +18 -0
index 6946c8610c4c..0c3f14d05046 100644
@@ -80,3 +80,21 @@
 		reg = <0x4d>;
 	};
 };
+
+&ehci0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usb2ah_default>;
+};
+
+&ehci1 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usb2bh_default>;
+};
+
+&uhci {
+	status = "okay";
+
+	/* No pinctrl, this follows the above EHCI settings */
+};
Signature · 1 line
2.14.3
#2 lore raw

PATCH 2/2 ARM: dts: Aspeed: Enable USB ports on eval board.

Quoted 4 lines · Benjamin Herrenschmidt

This enables both USB ports as host with EHCI and UHCI attached to them.

Quoted 34 lines
---
 arch/arm/boot/dts/aspeed-ast2500-evb.dts | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
arch/arm/boot/ renamed from arch/arm/boot/dts/aspeed-ast2500-evb.dts +0 -0

dts/aspeed-ast2500-evb.dts
index 6946c8610c4c..0c3f14d05046 100644

arch/arm/boot/dts/aspeed-ast2500-evb.dts +18 -0
@@ -80,3 +80,21 @@
 		reg = <0x4d>;
 	};
 };
+
+&ehci0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usb2ah_default>;
+};
+
+&ehci1 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usb2bh_default>;
+};
+
+&uhci {
+	status = "okay";
+
+	/* No pinctrl, this follows the above EHCI settings */
+};
Signature · 1 line
2.14.3
#3 lore raw

PATCH 1/2 ARM: dts: Add Aspeed SoC USB controllers to device-tree

In reply to Benjamin Herrenschmidt
Quoted 8 lines · Benjamin Herrenschmidt

This adds the USB controllers to the DT template of the AST24xx and AST25xx SoCs.

This patch doesn't enable them by default on any board specific .dts yet. This will be done when we have the necessary clock/reset and pinmux support. In the meantime though, this will work if u-boot configures things properly.

Quoted 6 lines

For the AST2400 I only added pinmux definition for port 1 which is dual USB1/USB2. There are additional USB1 only ports that might require more work but I don't have HW to test at hand so I'm leaving that to whoever cares.

Quoted 111 lines
---
 arch/arm/boot/dts/aspeed-g4.dtsi | 27 +++++++++++++++++++++++++++
 arch/arm/boot/dts/aspeed-g5.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 67 insertions(+)
arch/arm/boot/dts/aspeed-g4.dtsi +27 -0
index ae2b8c952e80..c318e481db78 100644
@@ -108,6 +108,23 @@
 			status = "disabled";
 		};
 
+		ehci0: usb at 1e6a1000 {
+			compatible = "aspeed,ast2400-ehci", "generic-ehci";
+			reg = <0x1e6a1000 0x100>;
+			interrupts = <5>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
+			status = "disabled";
+		};
+
+		uhci: usb at 1e6b0000 {
+			compatible = "aspeed,ast2400-uhci", "generic-uhci";
+			reg = <0x1e6b0000 0x100>;
+			interrupts = <14>;
+			#ports = <3>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
+			status = "disabled";
+		};
+
 		apb {
 			compatible = "simple-bus";
 			#address-cells = <1>;
@@ -1232,6 +1249,16 @@
 		groups = "USBCKI";
 	};
 
+	pinctrl_usb2h_default: usb2h_default {
+		function = "USB2H1";
+		groups = "USB2H1";
+	};
+
+	pinctrl_usb2d_default: usb2d_default {
+		function = "USB2D1";
+		groups = "USB2D1";
+	};
+
 	pinctrl_vgabios_rom_default: vgabios_rom_default {
 		function = "VGABIOS_ROM";
 		groups = "VGABIOS_ROM";
arch/arm/boot/dts/aspeed-g5.dtsi +40 -0
index 2477ebc11d9d..cebc19809174 100644
@@ -143,6 +143,31 @@
 			status = "disabled";
 		};
 
+		ehci0: usb at 1e6a1000 {
+			compatible = "aspeed,ast2500-ehci", "generic-ehci";
+			reg = <0x1e6a1000 0x100>;
+			interrupts = <5>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
+			status = "disabled";
+		};
+
+		ehci1: usb at 1e6a3000 {
+			compatible = "aspeed,ast2500-ehci", "generic-ehci";
+			reg = <0x1e6a3000 0x100>;
+			interrupts = <13>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
+			status = "disabled";
+		};
+
+		uhci: usb at 1e6b0000 {
+			compatible = "aspeed,ast2500-uhci", "generic-uhci";
+			reg = <0x1e6b0000 0x100>;
+			interrupts = <14>;
+			#ports = <2>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
+			status = "disabled";
+		};
+
 		apb {
 			compatible = "simple-bus";
 			#address-cells = <1>;
@@ -1363,6 +1388,21 @@
 		groups = "USBCKI";
 	};
 
+	pinctrl_usb2ah_default: usb2ah_default {
+		function = "USB2AH";
+		groups = "USB2AH";
+	};
+
+	pinctrl_usb11bhid_default: usb11bhid_default {
+		function = "USB11BHID";
+		groups = "USB11BHID";
+	};
+
+	pinctrl_usb2bh_default: usb2bh_default {
+		function = "USB2BH";
+		groups = "USB2BH";
+	};
+
 	pinctrl_vgabiosrom_default: vgabiosrom_default {
 		function = "VGABIOSROM";
 		groups = "VGABIOSROM";
Signature · 1 line
2.14.3
Signature · 2 lines
  Andrew Jeffery
  andrew at aj.id.au