remove PCI_DMA_BUS_IS_PHYS
Subsystems (31)
Hi all,
this series tries to get rid of the global and PCI_DMA_BUS_IS_PHYS flag, which causes the block layer and networking code to bounce buffer memory above the dma mask in some cases. It is a leftover from i386 + highmem days and is obsolete now that we have swiotlb or iommus so that the dma ops implementations can always (well minus the ISA DMA case which will require further attention) handle memory passed to them.
PATCH 1/12 iscsi_tcp: don't set a bounce limit
The default already is to never bounce, so the call is a no-op.
Signed-off-by Christoph Hellwig <[email protected]>
--- drivers/scsi/iscsi_tcp.c | 1 - 1 file changed, 1 deletion(-)
drivers/scsi/iscsi_tcp.c +0 -1
@@ -962,7 +962,6 @@ static int iscsi_sw_tcp_slave_configure(struct scsi_device *sdev)if (conn->datadgst_en) sdev->request_queue->backing_dev_info->capabilities |=BDI_CAP_STABLE_WRITES ; -blk_queue_bounce_limit (sdev->request_queue,BLK_BOUNCE_ANY );blk_queue_dma_alignment (sdev->request_queue,0 );return 0 ; }
Signature · 1 line
2.17.0
Martin K. Petersen
AppliedRe: [PATCH 01/12] iscsi_tcp: don't set a bounce limit
Christoph,
Quoted 1 line
The default already is to never bounce, so the call is a no-op.
Applied to 4.18/scsi-queue. Thanks!
Signature · 1 line
Martin K. Petersen Oracle Linux Engineering
PATCH 2/12 storsvc: don't set a bounce limit
In reply to Christoph HellwigThe default already is to never bounce, so the call is a no-op.
Signed-off-by Christoph Hellwig <[email protected]>
--- drivers/scsi/storvsc_drv.c | 3 --- 1 file changed, 3 deletions(-)
drivers/scsi/storvsc_drv.c +0 -3
@@ -1382,9 +1382,6 @@ static int storvsc_device_alloc(struct scsi_device *sdevice)static int storvsc_device_configure (struct scsi_device *sdevice) { - -blk_queue_bounce_limit (sdevice->request_queue,BLK_BOUNCE_ANY ); -blk_queue_rq_timeout (sdevice->request_queue, (storvsc_timeout *HZ ));/* Ensure there are no gaps in presented sgls */
Signature · 1 line
2.17.0
Martin K. Petersen
AppliedRe: [PATCH 02/12] storsvc: don't set a bounce limit
Christoph,
Quoted 1 line
The default already is to never bounce, so the call is a no-op.
Applied to 4.18/scsi-queue. Thanks!
Signature · 1 line
Martin K. Petersen Oracle Linux Engineering
PATCH 3/12 mtip32xx: don't use block layer bounce buffers
In reply to Christoph Hellwigmtip32xx just sets the block bounce limit to the dma mask, which means that the iommu or swiotlb already take care of the bounce buffering, and the block bouncing can be removed.
Signed-off-by Christoph Hellwig <[email protected]>
--- drivers/block/mtip32xx/mtip32xx.c | 1 - 1 file changed, 1 deletion(-)
drivers/block/mtip32xx/mtip32xx.c +0 -1
@@ -3862,7 +3862,6 @@ static int mtip_block_initialize(struct driver_data *dd)blk_queue_max_hw_sectors (dd->queue,0xffff );blk_queue_max_segment_size (dd->queue,0x400000 );blk_queue_io_min (dd->queue,4096 ); -blk_queue_bounce_limit (dd->queue, dd->pdev->dma_mask);/* Signal trim support */ if (dd->trim_supp == true) {
Signature · 1 line
2.17.0
PATCH 4/12 DAC960: don't use block layer bounce buffers
In reply to Christoph HellwigDAC960 just sets the block bounce limit to the dma mask, which means that the iommu or swiotlb already take care of the bounce buffering, and the block bouncing can be removed.
Signed-off-by Christoph Hellwig <[email protected]>
--- drivers/block/DAC960.c | 9 ++------- drivers/block/DAC960.h | 1 - 2 files changed, 2 insertions(+), 8 deletions(-)
drivers/block/DAC960.c +2 -7
@@ -1179,7 +1179,6 @@ static bool DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_Tif (pci_set_dma_mask (Controller->PCIDevice,DMA_BIT_MASK (32 )))return DAC960_Failure (Controller,"DMA mask out of range" ); - Controller->BounceBufferLimit =DMA_BIT_MASK (32 );if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) { CommandMailboxesSize =0 ;
@@ -1380,11 +1379,8 @@ static bool DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_Tdma_addr_t CommandMailboxDMA;DAC960_V2_CommandStatus_T CommandStatus; -if (!pci_set_dma_mask (Controller->PCIDevice,DMA_BIT_MASK (64 ))) - Controller->BounceBufferLimit =DMA_BIT_MASK (64 ); -else if (!pci_set_dma_mask (Controller->PCIDevice,DMA_BIT_MASK (32 ))) - Controller->BounceBufferLimit =DMA_BIT_MASK (32 ); -else +if (pci_set_dma_mask (Controller->PCIDevice,DMA_BIT_MASK (64 )) && +pci_set_dma_mask (Controller->PCIDevice,DMA_BIT_MASK (32 )))return DAC960_Failure (Controller,"DMA mask out of range" );/* This is a temporary dma mapping, used only in the scope of this function */
@@ -2540,7 +2536,6 @@ static bool DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)continue ; } Controller->RequestQueue[n] = RequestQueue; -blk_queue_bounce_limit (RequestQueue, Controller->BounceBufferLimit); RequestQueue->queuedata = Controller;blk_queue_max_segments (RequestQueue, Controller->DriverScatterGatherLimit);blk_queue_max_hw_sectors (RequestQueue, Controller->MaxBlocksPerCommand);
drivers/block/DAC960.h +0 -1
@@ -2295,7 +2295,6 @@ typedef struct DAC960_Controllerunsigned short MaxBlocksPerCommand;unsigned short ControllerScatterGatherLimit;unsigned short DriverScatterGatherLimit; -u64 BounceBufferLimit;unsigned int CombinedStatusBufferLength;unsigned int InitialStatusLength;unsigned int CurrentStatusLength;
Signature · 1 line
2.17.0
PATCH 5/12 sata_nv: don't use block layer bounce buffers
In reply to Christoph Hellwigsata_nv sets the block bounce limit to the reduce dma mask for ATAPI devices, which means that the iommu or swiotlb already take care of the bounce buffering, and the block bouncing can be removed.
Signed-off-by Christoph Hellwig <[email protected]>
--- drivers/ata/sata_nv.c | 62 +++++++++++++++++-------------------------- 1 file changed, 24 insertions(+), 38 deletions(-)
drivers/ata/sata_nv.c +24 -38
@@ -740,32 +740,16 @@ static int nv_adma_slave_config(struct scsi_device *sdev) sdev1 = ap->host->ports[1 ]->link.device[0 ].sdev;if ((port0->flags &NV_ADMA_ATAPI_SETUP_COMPLETE ) || (port1->flags &NV_ADMA_ATAPI_SETUP_COMPLETE )) { -/** We have to set the DMA mask to 32-bit if either port is in -ATAPI mode, since they are on the same PCI device which is -used for DMA mapping. If we set the mask we also need to set -the bounce limit on both ports to ensure that the block -layer doesn't feed addresses that cause DMA mapping to -choke. If either SCSI device is not allocated yet, it's OK -since that port will discover its correct setting when it -does get allocated. -Note: Setting 32-bit mask should not fail. */ -if (sdev0) -blk_queue_bounce_limit (sdev0->request_queue, -ATA_DMA_MASK ); -if (sdev1) -blk_queue_bounce_limit (sdev1->request_queue, -ATA_DMA_MASK ); - -dma_set_mask (&pdev->dev,ATA_DMA_MASK ); +/* +* We have to set the DMA mask to 32-bit if either port is in +* ATAPI mode, since they are on the same PCI device which is +* used for DMA mapping. If either SCSI device is not allocated +* yet, it's OK since that port will discover its correct +* setting when it does get allocated. +*/ + rc =dma_set_mask (&pdev->dev,ATA_DMA_MASK ); }else { -/** This shouldn't fail as it was set to this value before */ -dma_set_mask (&pdev->dev, pp->adma_dma_mask); -if (sdev0) -blk_queue_bounce_limit (sdev0->request_queue, - pp->adma_dma_mask); -if (sdev1) -blk_queue_bounce_limit (sdev1->request_queue, - pp->adma_dma_mask); + rc =dma_set_mask (&pdev->dev, pp->adma_dma_mask); }blk_queue_segment_boundary (sdev->request_queue, segment_boundary);
@@ -1131,12 +1115,11 @@ static int nv_adma_port_start(struct ata_port *ap)VPRINTK ("ENTER\n" ); -/* Ensure DMA mask is set to 32-bit before allocating legacy PRD and -pad buffers */ - rc =dma_set_mask (&pdev->dev,DMA_BIT_MASK (32 )); -if (rc) -return rc; - rc =dma_set_coherent_mask (&pdev->dev,DMA_BIT_MASK (32 )); +/* +* Ensure DMA mask is set to 32-bit before allocating legacy PRD and +* pad buffers. +*/ + rc =dma_set_mask_and_coherent (&pdev->dev,DMA_BIT_MASK (32 ));if (rc)return rc;
@@ -1156,13 +1139,16 @@ static int nv_adma_port_start(struct ata_port *ap) pp->notifier_clear_block = pp->gen_block +NV_ADMA_NOTIFIER_CLEAR + (4 * ap->port_no); -/* Now that the legacy PRD and padding buffer are allocated we can -safely raise the DMA mask to allocate the CPB/APRD table. -These are allowed to fail since we store the value that ends up -being used to set as the bounce limit in slave_config later if -needed. */ -dma_set_mask (&pdev->dev,DMA_BIT_MASK (64 )); -dma_set_coherent_mask (&pdev->dev,DMA_BIT_MASK (64 )); +/* +* Now that the legacy PRD and padding buffer are allocated we can +* try to raise the DMA mask to allocate the CPB/APRD table. +*/ + rc =dma_set_mask_and_coherent (&pdev->dev,DMA_BIT_MASK (64 )); +if (rc) { + rc =dma_set_mask_and_coherent (&pdev->dev,DMA_BIT_MASK (32 )); +if (rc) +return rc; + } pp->adma_dma_mask = *dev->dma_mask; mem = dmam_alloc_coherent(dev, NV_ADMA_PORT_PRIV_DMA_SZ,
Signature · 1 line
2.17.0
PATCH 6/12 memstick: don't call blk_queue_bounce_limit
In reply to Christoph HellwigAll in-tree host drivers set up a proper dma mask and use the dma-mapping helpers. This means they will be able to deal with any address that we are throwing at them.
Signed-off-by Christoph Hellwig <[email protected]>
--- drivers/memstick/core/ms_block.c | 5 ----- drivers/memstick/core/mspro_block.c | 5 ----- 2 files changed, 10 deletions(-)
drivers/memstick/core/ms_block.c +0 -5
@@ -2096,12 +2096,8 @@ static int msb_init_disk(struct memstick_dev *card)struct msb_data *msb =memstick_get_drvdata (card);struct memstick_host *host = card->host;int rc; -u64 limit =BLK_BOUNCE_HIGH ;unsigned long capacity; -if (host->dev.dma_mask && *(host->dev.dma_mask)) - limit = *(host->dev.dma_mask); -mutex_lock (&msb_disk_lock); msb->disk_id =idr_alloc (&msb_disk_idr, card,0 ,256 ,GFP_KERNEL );mutex_unlock (&msb_disk_lock);
@@ -2123,7 +2119,6 @@ static int msb_init_disk(struct memstick_dev *card) msb->queue->queuedata = card; -blk_queue_bounce_limit (msb->queue, limit);blk_queue_max_hw_sectors (msb->queue,MS_BLOCK_MAX_PAGES );blk_queue_max_segments (msb->queue,MS_BLOCK_MAX_SEGS ); blk_queue_max_segment_size(msb->queue,
drivers/memstick/core/mspro_block.c +0 -5
@@ -1175,12 +1175,8 @@ static int mspro_block_init_disk(struct memstick_dev *card)struct mspro_sys_info *sys_info =NULL ;struct mspro_sys_attr *s_attr =NULL ;int rc, disk_id; -u64 limit =BLK_BOUNCE_HIGH ;unsigned long capacity; -if (host->dev.dma_mask && *(host->dev.dma_mask)) - limit = *(host->dev.dma_mask); -for (rc =0 ; msb->attr_group.attrs[rc]; ++rc) { s_attr =mspro_from_sysfs_attr (msb->attr_group.attrs[rc]);
@@ -1219,7 +1215,6 @@ static int mspro_block_init_disk(struct memstick_dev *card) msb->queue->queuedata = card; -blk_queue_bounce_limit (msb->queue, limit);blk_queue_max_hw_sectors (msb->queue,MSPRO_BLOCK_MAX_PAGES );blk_queue_max_segments (msb->queue,MSPRO_BLOCK_MAX_SEGS ); blk_queue_max_segment_size(msb->queue,
Signature · 1 line
2.17.0
PATCH 7/12 scsi: reduce use of block bounce buffers
In reply to Christoph HellwigWe can rely on the dma-mapping code to handle any DMA limits that is bigger than the ISA DMA mask for us (either using an iommu or swiotlb), so remove setting the block layer bounce limit for anything but the unchecked_isa_dma case, or the bouncing for highmem pages.
Signed-off-by Christoph Hellwig <[email protected]>
--- drivers/scsi/scsi_lib.c | 24 ++---------------------- 1 file changed, 2 insertions(+), 22 deletions(-)
drivers/scsi/scsi_lib.c +2 -22
@@ -2142,27 +2142,6 @@ static int scsi_map_queues(struct blk_mq_tag_set *set)return blk_mq_map_queues (set); } -static u64 scsi_calculate_bounce_limit (struct Scsi_Host *shost) -{ -struct device *host_dev; -u64 bounce_limit =0xffffffff ; - -if (shost->unchecked_isa_dma) -return BLK_BOUNCE_ISA ; -/* -* Platforms with virtual-DMA translation -* hardware have no practical limit. -*/ -if (!PCI_DMA_BUS_IS_PHYS ) -return BLK_BOUNCE_ANY ; - - host_dev =scsi_get_device (shost); -if (host_dev && host_dev->dma_mask) - bounce_limit = (u64 )dma_max_pfn (host_dev) <<PAGE_SHIFT ; - -return bounce_limit; -} -void __scsi_init_queue (struct Scsi_Host *shost,struct request_queue *q) {struct device *dev = shost->dma_dev;
@@ -2182,7 +2161,8 @@ void __scsi_init_queue(struct Scsi_Host *shost, struct request_queue *q) }blk_queue_max_hw_sectors (q, shost->max_sectors); -blk_queue_bounce_limit (q,scsi_calculate_bounce_limit (shost)); +if (shost->unchecked_isa_dma) +blk_queue_bounce_limit (q,BLK_BOUNCE_ISA );blk_queue_segment_boundary (q, shost->dma_boundary);dma_set_seg_boundary (dev, shost->dma_boundary);
Signature · 1 line
2.17.0
PATCH 8/12 mmc: reduce use of block bounce buffers
In reply to Christoph HellwigWe can rely on the dma-mapping code to handle any DMA limits that is bigger than the ISA DMA mask for us (either using an iommu or swiotlb), so remove setting the block layer bounce limit for anything but bouncing for highmem pages.
Signed-off-by Christoph Hellwig <[email protected]>
--- drivers/mmc/core/queue.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-)
drivers/mmc/core/queue.c +2 -5
@@ -351,17 +351,14 @@ static const struct blk_mq_ops mmc_mq_ops = {static void mmc_setup_queue (struct mmc_queue *mq,struct mmc_card *card) {struct mmc_host *host = card->host; -u64 limit =BLK_BOUNCE_HIGH ; - -if (mmc_dev (host)->dma_mask && *mmc_dev (host)->dma_mask) - limit = (u64 )dma_max_pfn (mmc_dev (host)) <<PAGE_SHIFT ;blk_queue_flag_set (QUEUE_FLAG_NONROT , mq->queue);blk_queue_flag_clear (QUEUE_FLAG_ADD_RANDOM , mq->queue);if (mmc_can_erase (card))mmc_queue_setup_discard (mq->queue, card); -blk_queue_bounce_limit (mq->queue, limit); +if (!mmc_dev (host)->dma_mask || !mmc_dev (host)->dma_mask) +blk_queue_bounce_limit (mq->queue,BLK_BOUNCE_HIGH );blk_queue_max_hw_sectors (mq->queue,min (host->max_blk_count, host->max_req_size /512 ));blk_queue_max_segments (mq->queue, host->max_segs);
Signature · 1 line
2.17.0
Robin Murphy
reviewerRe: [PATCH 08/12] mmc: reduce use of block bounce buffers
Quoted 20 lines · Christoph Hellwig
We can rely on the dma-mapping code to handle any DMA limits that is bigger than the ISA DMA mask for us (either using an iommu or swiotlb), so remove setting the block layer bounce limit for anything but bouncing for highmem pages.
Signed-off-by Christoph Hellwig <[email protected]>--- drivers/mmc/core/queue.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-)drivers/mmc/core/queue.c +0
-2@@ -351,17 +351,14 @@ static const struct blk_mq_ops mmc_mq_ops = {static void mmc_setup_queue (struct mmc_queue *mq,struct mmc_card *card) {struct mmc_host *host = card->host; -u64 limit =BLK_BOUNCE_HIGH ; -
drivers/mmc/core/queue.c static const struct blk_mq_ops mmc_mq_ops = { · line 360
Quoted 10 lines
drivers/mmc/core/queue.c +1
-3-if (mmc_dev (host)->dma_mask && *mmc_dev (host)->dma_mask) - limit = (u64 )dma_max_pfn (mmc_dev (host)) <<PAGE_SHIFT ;blk_queue_flag_set (QUEUE_FLAG_NONROT , mq->queue);blk_queue_flag_clear (QUEUE_FLAG_ADD_RANDOM , mq->queue);if (mmc_can_erase (card))mmc_queue_setup_discard (mq->queue, card); -blk_queue_bounce_limit (mq->queue, limit); +if (!mmc_dev (host)->dma_mask || !mmc_dev (host)->dma_mask)
I'm almost surprised that GCC doesn't warn about "x || x", but nevertheless I think you've lost a "*" here...
Robin.
Quoted 5 lines
drivers/mmc/core/queue.c +1
-0+blk_queue_bounce_limit (mq->queue,BLK_BOUNCE_HIGH );blk_queue_max_hw_sectors (mq->queue,min (host->max_blk_count, host->max_req_size /512 ));blk_queue_max_segments (mq->queue, host->max_segs);
PATCH 9/12 ide: kill ide_toggle_bounce
In reply to Christoph Hellwigide_toggle_bounce did select various strange block bounce limits, including not bouncing at all as soon as an iommu is present in the system. Given that the dma_map routines now handle any required bounce buffering except for ISA DMA, and the ide code already must handle either ISA DMA or highmem at least for iommu equipped systems we can get rid of the block layer bounce limit setting entirely.
Signed-off-by Christoph Hellwig <[email protected]>
--- drivers/ide/ide-dma.c | 2 -- drivers/ide/ide-lib.c | 26 -------------------------- drivers/ide/ide-probe.c | 3 --- include/linux/ide.h | 2 -- 4 files changed, 33 deletions(-)
drivers/ide/ide-dma.c +0 -2
@@ -180,7 +180,6 @@ EXPORT_SYMBOL_GPL(ide_dma_unmap_sg);void ide_dma_off_quietly (ide_drive_t *drive) { drive->dev_flags &= ~IDE_DFLAG_USING_DMA ; -ide_toggle_bounce (drive,0 ); drive->hwif->dma_ops->dma_host_set (drive,0 ); }
@@ -211,7 +210,6 @@ EXPORT_SYMBOL(ide_dma_off);void ide_dma_on (ide_drive_t *drive) { drive->dev_flags |=IDE_DFLAG_USING_DMA ; -ide_toggle_bounce (drive,1 ); drive->hwif->dma_ops->dma_host_set (drive,1 ); }
drivers/ide/ide-lib.c +0 -26
@@ -6,32 +6,6 @@#include <linux/ide.h> #include <linux/bitops.h> -/** -* ide_toggle_bounce - handle bounce buffering -* @drive: drive to update -* @on: on/off boolean -* -* Enable or disable bounce buffering for the device. Drives move -* between PIO and DMA and that changes the rules we need. -*/ - -void ide_toggle_bounce (ide_drive_t *drive,int on) -{ -u64 addr =BLK_BOUNCE_HIGH ;/* dma64_addr_t */ - -if (!PCI_DMA_BUS_IS_PHYS ) { - addr =BLK_BOUNCE_ANY ; - }else if (on && drive->media == ide_disk) { -struct device *dev = drive->hwif->dev; - -if (dev && dev->dma_mask) - addr = *dev->dma_mask; - } - -if (drive->queue) -blk_queue_bounce_limit (drive->queue, addr); -} -u64 ide_get_lba_addr (struct ide_cmd *cmd,int lba48) {struct ide_taskfile *tf = &cmd->tf;
drivers/ide/ide-probe.c +0 -3
@@ -805,9 +805,6 @@ static int ide_init_queue(ide_drive_t *drive)/* assign drive queue */ drive->queue = q; -/* needs drive->queue to be set */ -ide_toggle_bounce (drive,1 ); -return 0 ; }
include/linux/ide.h +0 -2
@@ -1508,8 +1508,6 @@ static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data) hwif->hwif_data = data; } -extern void ide_toggle_bounce (ide_drive_t *drive,int on); -u64 ide_get_lba_addr (struct ide_cmd *,int );u8 ide_dump_status (ide_drive_t *,const char *,u8 );
Signature · 1 line
2.17.0
PATCH 10/12 ide: remove the PCI_DMA_BUS_IS_PHYS check
In reply to Christoph HellwigWe now have ways to deal with drainage in the block layer, and libata has been using it for ages. We also want to get rid of PCI_DMA_BUS_IS_PHYS now, so just reduce the PCI transfer size for ide - anyone who cares for performance on PCI controllers should have switched to libata long ago.
Signed-off-by Christoph Hellwig <[email protected]>
--- drivers/ide/ide-probe.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
drivers/ide/ide-probe.c +1 -2
@@ -796,8 +796,7 @@ static int ide_init_queue(ide_drive_t *drive)* This will be fixed once we teach pci_map_sg() about our boundary * requirements, hopefully soon. *FIXME* */ -if (!PCI_DMA_BUS_IS_PHYS ) - max_sg_entries >>=1 ; + max_sg_entries >>=1 ;#endif /* CONFIG_PCI */ blk_queue_max_segments (q, max_sg_entries);
Signature · 1 line
2.17.0
PATCH 11/12 net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma
In reply to Christoph HellwigThese days the dma mapping routines must be able to handle any address supported by the device, be that using an iommu, or swiotlb if none is supported. With that the PCI_DMA_BUS_IS_PHYS check in illegal_highdma is not needed and can be removed.
Signed-off-by Christoph Hellwig <[email protected]>
--- net/core/dev.c | 20 +------------------- 1 file changed, 1 insertion(+), 19 deletions(-)
net/core/dev.c +1 -19
@@ -2884,11 +2884,7 @@ void netdev_rx_csum_fault(struct net_device *dev)EXPORT_SYMBOL (netdev_rx_csum_fault);#endif -/* Actually, we should eliminate this check as soon as we know, that: -* 1. IOMMU is present and allows to map all the memory. -* 2. No high memory really exists on this machine. -*/ - +/* XXX: check that highmem exists at all on the given machine. */ static int illegal_highdma (struct net_device *dev,struct sk_buff *skb) {#ifdef CONFIG_HIGHMEM
@@ -2902,20 +2898,6 @@ static int illegal_highdma(struct net_device *dev, struct sk_buff *skb) return 1; } } - -if (PCI_DMA_BUS_IS_PHYS ) { -struct device *pdev = dev->dev.parent; - -if (!pdev) -return 0 ; -for (i =0 ; i <skb_shinfo (skb)->nr_frags; i++) { -skb_frag_t *frag = &skb_shinfo (skb)->frags[i]; -dma_addr_t addr =page_to_phys (skb_frag_page (frag)); - -if (!pdev->dma_mask || addr +PAGE_SIZE -1 > *pdev->dma_mask) -return 1 ; - } - }#endif return 0 ; }
Signature · 1 line
2.17.0
PATCH 12/12 PCI: remove PCI_DMA_BUS_IS_PHYS
In reply to Christoph HellwigThis was used by the ide, scsi and networking code in the past to determine if they should bounce payloads. Now that the dma mapping always have to support dma to all physical memory (thanks to swiotlb for non-iommu systems) there is no need to this crude hack any more.
Signed-off-by Christoph Hellwig <[email protected]>
--- arch/alpha/include/asm/pci.h | 5 ----- arch/arc/include/asm/pci.h | 6 ------ arch/arm/include/asm/pci.h | 7 ------- arch/arm64/include/asm/pci.h | 5 ----- arch/h8300/include/asm/pci.h | 2 -- arch/hexagon/kernel/dma.c | 1 - arch/ia64/hp/common/sba_iommu.c | 3 --- arch/ia64/include/asm/pci.h | 17 ----------------- arch/ia64/kernel/setup.c | 12 ------------ arch/ia64/sn/kernel/io_common.c | 5 ----- arch/m68k/include/asm/pci.h | 6 ------ arch/microblaze/include/asm/pci.h | 6 ------ arch/mips/include/asm/pci.h | 7 ------- arch/parisc/include/asm/pci.h | 23 ----------------------- arch/parisc/kernel/setup.c | 5 ----- arch/powerpc/include/asm/pci.h | 18 ------------------ arch/riscv/include/asm/pci.h | 3 --- arch/s390/include/asm/pci.h | 2 -- arch/s390/pci/pci_dma.c | 2 -- arch/sh/include/asm/pci.h | 6 ------ arch/sh/kernel/dma-nommu.c | 1 - arch/sparc/include/asm/pci_32.h | 4 ---- arch/sparc/include/asm/pci_64.h | 6 ------ arch/x86/include/asm/pci.h | 3 --- arch/x86/kernel/pci-nommu.c | 1 - arch/xtensa/include/asm/pci.h | 2 -- drivers/parisc/ccio-dma.c | 2 -- drivers/parisc/sba_iommu.c | 2 -- include/asm-generic/pci.h | 8 -------- include/linux/dma-mapping.h | 1 - lib/dma-direct.c | 1 - tools/virtio/linux/dma-mapping.h | 2 -- 32 files changed, 174 deletions(-)
arch/alpha/include/asm/pci.h +0 -5
@@ -56,11 +56,6 @@ struct pci_controller {/* IOMMU controls. */ -/* The PCI address space does not equal the physical memory address space. -The networking and block device layers use this boolean for bounce buffer -decisions. */ -#define PCI_DMA_BUS_IS_PHYS 0 -/* TODO: integrate with include/asm-generic/pci.h ? */ static inline int pci_get_legacy_ide_irq (struct pci_dev *dev,int channel) {
arch/arc/include/asm/pci.h +0 -6
@@ -16,12 +16,6 @@#define PCIBIOS_MIN_MEM 0x100000#define pcibios_assign_all_busses () 1 -/* -* The PCI address space does equal the physical memory address space. -* The networking and block device layers use this boolean for bounce -* buffer decisions. -*/ -#define PCI_DMA_BUS_IS_PHYS 1#endif /* __KERNEL__ */
arch/arm/include/asm/pci.h +0 -7
@@ -19,13 +19,6 @@ static inline int pci_proc_domain(struct pci_bus *bus) }#endif /* CONFIG_PCI_DOMAINS */ -/* -* The PCI address space does equal the physical memory address space. -* The networking and block device layers use this boolean for bounce -* buffer decisions. -*/ -#define PCI_DMA_BUS_IS_PHYS (1) -#define HAVE_PCI_MMAP #define ARCH_GENERIC_PCI_MMAP_RESOURCE
arch/arm64/include/asm/pci.h +0 -5
@@ -18,11 +18,6 @@#define pcibios_assign_all_busses () \ (pci_has_flag(PCI_REASSIGN_ALL_BUS)) -/* -* PCI address space differs from physical memory address space -*/ -#define PCI_DMA_BUS_IS_PHYS (0) -#define ARCH_GENERIC_PCI_MMAP_RESOURCE 1extern int isa_dma_bridge_buggy;
arch/h8300/include/asm/pci.h +0 -2
@@ -15,6 +15,4 @@ static inline void pcibios_penalize_isa_irq(int irq, int active) /* We don't do dynamic PCI IRQ allocation */ } -#define PCI_DMA_BUS_IS_PHYS (1) -#endif /* _ASM_H8300_PCI_H */
arch/hexagon/kernel/dma.c +0 -1
@@ -208,7 +208,6 @@ const struct dma_map_ops hexagon_dma_ops = { .sync_single_for_cpu = hexagon_sync_single_for_cpu, .sync_single_for_device = hexagon_sync_single_for_device, .mapping_error = hexagon_mapping_error, - .is_phys = 1, };void __init hexagon_dma_init (void )
arch/ia64/hp/common/sba_iommu.c +0 -3
@@ -1845,9 +1845,6 @@ static void ioc_init(unsigned long hpa, struct ioc *ioc)ioc_resource_init (ioc);ioc_sac_init (ioc); -if ((long ) ~iovp_mask > (long ) ia64_max_iommu_merge_mask) - ia64_max_iommu_merge_mask = ~iovp_mask; - printk(KERN_INFO PFX"%s %d.%d HPA 0x%lx IOVA space %dMb at 0x%lx\n" , ioc->name, (ioc->rev >> 4) & 0xF, ioc->rev & 0xF,
arch/ia64/include/asm/pci.h +0 -17
@@ -30,23 +30,6 @@ struct pci_vector_struct {#define PCIBIOS_MIN_IO 0x1000#define PCIBIOS_MIN_MEM 0x10000000 -/* -* PCI_DMA_BUS_IS_PHYS should be set to 1 if there is _necessarily_ a direct -* correspondence between device bus addresses and CPU physical addresses. -* Platforms with a hardware I/O MMU _must_ turn this off to suppress the -* bounce buffer handling code in the block and network device layers. -* Platforms with separate bus address spaces _must_ turn this off and provide -* a device DMA mapping implementation that takes care of the necessary -* address translation. -* -* For now, the ia64 platforms which may have separate/multiple bus address -* spaces all have I/O MMUs which support the merging of physically -* discontiguous buffers, so we can use that as the sole factor to determine -* the setting of PCI_DMA_BUS_IS_PHYS. -*/ -extern unsigned long ia64_max_iommu_merge_mask; -#define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL) -#define HAVE_PCI_MMAP #define ARCH_GENERIC_PCI_MMAP_RESOURCE #define arch_can_pci_mmap_wc () 1
arch/ia64/kernel/setup.c +0 -12
@@ -123,18 +123,6 @@ unsigned long ia64_i_cache_stride_shift = ~0;#define CACHE_STRIDE_SHIFT 5unsigned long ia64_cache_stride_shift = ~0 ; -/* -* The merge_mask variable needs to be set to (max(iommu_page_size(iommu)) - 1). This -* mask specifies a mask of address bits that must be 0 in order for two buffers to be -* mergeable by the I/O MMU (i.e., the end address of the first buffer and the start -* address of the second buffer must be aligned to (merge_mask+1) in order to be -* mergeable). By default, we assume there is no I/O MMU which can merge physically -* discontiguous buffers, so we set the merge_mask to ~0UL, which corresponds to a iommu -* page-size of 2^64. -*/ -unsigned long ia64_max_iommu_merge_mask = ~0UL ; -EXPORT_SYMBOL (ia64_max_iommu_merge_mask); -/* * We use a special marker for the end of memory and it uses the extra (+1) slot */
arch/ia64/sn/kernel/io_common.c +0 -5
@@ -480,11 +480,6 @@ sn_io_early_init(void)tioca_init_provider ();tioce_init_provider (); -/* -* This is needed to avoid bounce limit checks in the blk layer -*/ - ia64_max_iommu_merge_mask = ~PAGE_MASK ; -sn_irq_lh_init ();INIT_LIST_HEAD (&sn_sysdata_list);sn_init_cpei_timer ();
arch/m68k/include/asm/pci.h +0 -6
@@ -4,12 +4,6 @@#include <asm-generic/pci.h> -/* The PCI address space does equal the physical memory -* address space. The networking and block device layers use -* this boolean for bounce buffer decisions. -*/ -#define PCI_DMA_BUS_IS_PHYS (1) -#define pcibios_assign_all_busses () 1#define PCIBIOS_MIN_IO 0x00000100
arch/microblaze/include/asm/pci.h +0 -6
@@ -61,12 +61,6 @@ extern int pci_mmap_legacy_page_range(struct pci_bus *bus,#define HAVE_PCI_LEGACY 1 -/* The PCI address space does equal the physical memory -* address space (no IOMMU). The IDE and SCSI device layers use -* this boolean for bounce buffer decisions. -*/ -#define PCI_DMA_BUS_IS_PHYS (1) -extern void pcibios_claim_one_bus (struct pci_bus *b);extern void pcibios_finish_adding_to_bus (struct pci_bus *bus);
arch/mips/include/asm/pci.h +0 -7
@@ -121,13 +121,6 @@ extern unsigned long PCIBIOS_MIN_MEM;#include <linux/string.h> #include <asm/io.h> -/* -* The PCI address space does equal the physical memory address space. -* The networking and block device layers use this boolean for bounce -* buffer decisions. -*/ -#define PCI_DMA_BUS_IS_PHYS (1) -#ifdef CONFIG_PCI_DOMAINS_GENERIC static inline int pci_proc_domain (struct pci_bus *bus) {
arch/parisc/include/asm/pci.h +0 -23
@@ -87,29 +87,6 @@ struct pci_hba_data {#define PCI_F_EXTEND 0UL#endif /* !CONFIG_64BIT */ -/* -* If the PCI device's view of memory is the same as the CPU's view of memory, -* PCI_DMA_BUS_IS_PHYS is true. The networking and block device layers use -* this boolean for bounce buffer decisions. -*/ -#ifdef CONFIG_PA20 -/* All PA-2.0 machines have an IOMMU. */ -#define PCI_DMA_BUS_IS_PHYS 0 -#define parisc_has_iommu () do { } while (0) -#else - -#if defined(CONFIG_IOMMU_CCIO ) || defined(CONFIG_IOMMU_SBA ) -extern int parisc_bus_is_phys;/* in arch/parisc/kernel/setup.c */ -#define PCI_DMA_BUS_IS_PHYS parisc_bus_is_phys -#define parisc_has_iommu () do { parisc_bus_is_phys = 0; } while (0) -#else -#define PCI_DMA_BUS_IS_PHYS 1 -#define parisc_has_iommu () do { } while (0) -#endif - -#endif /* !CONFIG_PA20 */ - -/* ** Most PCI devices (eg Tulip, NCR720) also export the same registers ** to both MMIO and I/O port space. Due to poor performance of I/O Port
arch/parisc/kernel/setup.c +0 -5
@@ -58,11 +58,6 @@ struct proc_dir_entry * proc_runway_root __read_mostly = NULL;struct proc_dir_entry * proc_gsc_root__read_mostly =NULL ;struct proc_dir_entry * proc_mckinley_root__read_mostly =NULL ; -#if !defined(CONFIG_PA20 ) && (defined(CONFIG_IOMMU_CCIO ) || defined(CONFIG_IOMMU_SBA )) -int parisc_bus_is_phys__read_mostly =1 ;/* Assume no IOMMU is present */ -EXPORT_SYMBOL (parisc_bus_is_phys); -#endif -void __init setup_cmdline (char **cmdline_p) {extern unsigned int boot_args[];
arch/powerpc/include/asm/pci.h +0 -18
@@ -92,24 +92,6 @@ extern int pci_mmap_legacy_page_range(struct pci_bus *bus,#define HAVE_PCI_LEGACY 1 -#ifdef CONFIG_PPC64 - -/* The PCI address space does not equal the physical memory address -* space (we have an IOMMU). The IDE and SCSI device layers use -* this boolean for bounce buffer decisions. -*/ -#define PCI_DMA_BUS_IS_PHYS (0) - -#else /* 32-bit */ - -/* The PCI address space does equal the physical memory -* address space (no IOMMU). The IDE and SCSI device layers use -* this boolean for bounce buffer decisions. -*/ -#define PCI_DMA_BUS_IS_PHYS (1) - -#endif /* CONFIG_PPC64 */ -extern void pcibios_claim_one_bus (struct pci_bus *b);extern void pcibios_finish_adding_to_bus (struct pci_bus *bus);
arch/riscv/include/asm/pci.h +0 -3
@@ -26,9 +26,6 @@/* RISC-V shim does not initialize PCI bus */ #define pcibios_assign_all_busses () 1 -/* We do not have an IOMMU */ -#define PCI_DMA_BUS_IS_PHYS 1 -extern int isa_dma_bridge_buggy;#ifdef CONFIG_PCI
arch/s390/include/asm/pci.h +0 -2
@@ -2,8 +2,6 @@#ifndef __ASM_S390_PCI_H#define __ASM_S390_PCI_H -/* must be set before including asm-generic/pci.h */ -#define PCI_DMA_BUS_IS_PHYS (0)/* must be set before including pci_clp.h */ #define PCI_BAR_COUNT 6
arch/s390/pci/pci_dma.c +0 -2
@@ -685,8 +685,6 @@ const struct dma_map_ops s390_pci_dma_ops = { .map_page = s390_dma_map_pages, .unmap_page = s390_dma_unmap_pages, .mapping_error = s390_mapping_error, - /* if we support direct DMA this must be conditional */ - .is_phys = 0,/* dma_supported is unconditionally true without a callback */ };EXPORT_SYMBOL_GPL (s390_pci_dma_ops);
arch/sh/include/asm/pci.h +0 -6
@@ -71,12 +71,6 @@ extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM;* SuperH has everything mapped statically like x86. */ -/* The PCI address space does equal the physical memory -* address space. The networking and block device layers use -* this boolean for bounce buffer decisions. -*/ -#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys) -#ifdef CONFIG_PCI /* * None of the SH PCI controllers support MWI, it is always treated as a
arch/sh/kernel/dma-nommu.c +0 -1
@@ -75,7 +75,6 @@ const struct dma_map_ops nommu_dma_ops = { .sync_single_for_device = nommu_sync_single_for_device, .sync_sg_for_device = nommu_sync_sg_for_device,#endif - .is_phys = 1, };void __init no_iommu_init (void )
arch/sparc/include/asm/pci_32.h +0 -4
@@ -17,10 +17,6 @@#define PCI_IRQ_NONE 0xffffffff -/* Dynamic DMA mapping stuff. -*/ -#define PCI_DMA_BUS_IS_PHYS (0) -#endif /* __KERNEL__ */ #ifndef CONFIG_LEON_PCI
arch/sparc/include/asm/pci_64.h +0 -6
@@ -17,12 +17,6 @@#define PCI_IRQ_NONE 0xffffffff -/* The PCI address space does not equal the physical memory -* address space. The networking and block device layers use -* this boolean for bounce buffer decisions. -*/ -#define PCI_DMA_BUS_IS_PHYS (0) -/* PCI IOMMU mapping bypass support. */ /* PCI 64-bit addressing works for all slots on all controller
arch/x86/include/asm/pci.h +0 -3
@@ -117,9 +117,6 @@ void native_restore_msi_irqs(struct pci_dev *dev);#define native_setup_msi_irqs NULL#define native_teardown_msi_irq NULL#endif - -#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys) -#endif /* __KERNEL__ */ #ifdef CONFIG_X86_64
arch/x86/kernel/pci-nommu.c +0 -1
@@ -84,7 +84,6 @@ const struct dma_map_ops nommu_dma_ops = { .free = dma_generic_free_coherent, .map_sg = nommu_map_sg, .map_page = nommu_map_page, - .is_phys = 1, .mapping_error = nommu_mapping_error, .dma_supported = x86_dma_supported, };
arch/xtensa/include/asm/pci.h +0 -2
@@ -42,8 +42,6 @@ extern struct pci_controller* pcibios_alloc_controller(void);* decisions. */ -#define PCI_DMA_BUS_IS_PHYS (1) -/* Tell PCI code what kind of PCI resource mappings we support */ #define HAVE_PCI_MMAP 1#define ARCH_GENERIC_PCI_MMAP_RESOURCE 1
drivers/parisc/ccio-dma.c +0 -2
@@ -1596,8 +1596,6 @@ static int __init ccio_probe(struct parisc_device *dev) }#endif ioc_count++; - -parisc_has_iommu ();return 0 ; }
drivers/parisc/sba_iommu.c +0 -2
@@ -2017,8 +2017,6 @@ static int __init sba_driver_callback(struct parisc_device *dev)proc_create ("sba_iommu" ,0 , root, &sba_proc_fops);proc_create ("sba_iommu-bitmap" ,0 , root, &sba_proc_bitmap_fops);#endif - -parisc_has_iommu ();return 0 ; }
include/asm-generic/pci.h +0 -8
@@ -14,12 +14,4 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) }#endif /* HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ */ -/* -* By default, assume that no iommu is in use and that the PCI -* space is mapped to address physical 0. -*/ -#ifndef PCI_DMA_BUS_IS_PHYS -#define PCI_DMA_BUS_IS_PHYS (1) -#endif -#endif /* _ASM_GENERIC_PCI_H */
include/linux/dma-mapping.h +0 -1
@@ -133,7 +133,6 @@ struct dma_map_ops {#ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK u64 (*get_required_mask)(struct device *dev);#endif -int is_phys; };extern const struct dma_map_ops dma_direct_ops;
lib/dma-direct.c +0 -1
@@ -179,6 +179,5 @@ const struct dma_map_ops dma_direct_ops = { .map_sg = dma_direct_map_sg, .dma_supported = dma_direct_supported, .mapping_error = dma_direct_mapping_error, - .is_phys = 1, };EXPORT_SYMBOL (dma_direct_ops);
tools/virtio/linux/dma-mapping.h +0 -2
@@ -6,8 +6,6 @@# error Virtio userspace code does not support CONFIG_HAS_DMA#endif -#define PCI_DMA_BUS_IS_PHYS 1 -enum dma_data_direction {DMA_BIDIRECTIONAL =0 ,DMA_TO_DEVICE =1 ,
Signature · 1 line
2.17.0