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tests/gem_exec_latency: New subtests for checking submission from RT tasks

PATCH In review Tvrtko Ursulin 3 participants 10 messages Apr 17, 2018 – May 10, 2018

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PATCH 1/2 tests/gem_exec_latency: New subtests for checking submission from RT tasks

From: Tvrtko Ursulin <[email protected]>

We want to make sure RT tasks which use a lot of CPU times can submit batch buffers with roughly the same latency (and certainly not worse) compared to normal tasks.

---
 tests/gem_exec_latency.c | 176 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 176 insertions(+)
tests/gem_exec_latency.c +176 -0
index 9498c0921e60..420ede0f83a0 100644
@@ -36,11 +36,15 @@
 #include <sys/time.h>
 #include <sys/signal.h>
 #include <time.h>
+#include <sched.h>
 
 #include "drm.h"
 
 #include "igt_sysfs.h"
 #include "igt_vgem.h"
+#include "igt_dummyload.h"
+#include "igt_stats.h"
+
 #include "i915/gem_ring.h"
 
 #define LOCAL_I915_EXEC_NO_RELOC (1<<11)
@@ -351,6 +355,172 @@ static void latency_from_ring(int fd,
 	}
 }
 
+static void __rearm_spin_batch(igt_spin_t *spin)
+{
+	const uint32_t mi_arb_chk = 0x5 << 23;
+
+       *spin->batch = mi_arb_chk;
+       *spin->running = 0;
+       __sync_synchronize();
+}
+
+static void
+__submit_spin_batch(int fd, igt_spin_t *spin, unsigned int flags)
+{
+	struct drm_i915_gem_execbuffer2 eb = spin->execbuf;
+
+	eb.flags &= ~(0x3f | I915_EXEC_BSD_MASK);
+	eb.flags |= flags | I915_EXEC_NO_RELOC;
+
+	gem_execbuf(fd, &eb);
+}
+
+struct rt_pkt
+{
+#define RT_OK (0)
+#define RT_FAIL (1)
+#define RT_TIMEOUT (2)
+	int status;
+	struct igt_mean mean;
+	double max;
+};
+
+static void __spin_wait(struct rt_pkt *msg, igt_spin_t *spin, double *t_wait)
+{
+	struct timespec ts = { };
+	uint64_t t_last = 0;
+
+	igt_nsec_elapsed(&ts);
+
+	while (!READ_ONCE(*spin->running)) {
+		uint64_t t = igt_nsec_elapsed(&ts);
+
+		if ((t - t_last) > 5UL * NSEC_PER_SEC) {
+			 /* Absolute timeout to save time. */
+			msg->status = RT_TIMEOUT;
+		} else if ((t - t_last) > NSEC_PER_SEC / 10) {
+			/* Backoff every 100ms to give it chance to complete. */
+			t_last = t;
+			usleep(1);
+		}
+	}
+
+	*t_wait = igt_nsec_elapsed(&ts) / 1e9;
+
+	msg->status = RT_OK;
+}
+
+/*
+ * Test whether RT thread which hogs the CPU a lot can submit work with
+ * reasonable latency.
+ */
+static void
+rthog_latency_on_ring(int fd, unsigned int ring, const char *name)
+{
+	const char *passname[] = { "warmup", "normal", "rt" };
+	struct rt_pkt res[3];
+	unsigned int i;
+	int link[2];
+	int ret;
+
+	igt_require(gem_can_store_dword(fd, ring));
+
+	igt_assert(pipe(link) == 0);
+
+	memset(res, 0, sizeof(res));
+
+        igt_fork(child, 1) {
+		unsigned int pass = 0; /* Three passes: warmup, normal, rt. */
+
+		do {
+			struct rt_pkt msg = { };
+			igt_spin_t *spin;
+
+			igt_mean_init(&msg.mean);
+
+			if (pass == 2) {
+				struct sched_param rt =
+						{ .sched_priority = 99 };
+
+				ret = sched_setscheduler(0,
+							SCHED_FIFO | SCHED_RESET_ON_FORK,
+							&rt);
+				if (ret) {
+					igt_warn("Failed to set scheduling policy!\n");
+					msg.status = RT_FAIL;
+					write(link[1], &msg, sizeof(msg));
+					exit(1);
+				}
+			}
+
+			spin = __igt_spin_batch_new_poll(fd, 0, ring);
+			if (!spin) {
+				igt_warn("Failed to create spinner! (%s)\n",
+					 passname[pass]);
+				msg.status = RT_FAIL;
+				write(link[1], &msg, sizeof(msg));
+				exit(1);
+			}
+			igt_spin_busywait_until_running(spin);
+
+			igt_until_timeout(pass > 0 ? 5 : 2) {
+				double t;
+
+				igt_spin_batch_end(spin);
+				gem_sync(fd, spin->handle);
+
+				__rearm_spin_batch(spin);
+				__submit_spin_batch(fd, spin, ring);
+
+				__spin_wait(&msg, spin, &t);
+				if (msg.status != RT_OK) {
+					igt_warn("Wait timeout! (%s)\n",
+						 passname[pass]);
+					write(link[1], &msg, sizeof(msg));
+					exit(1);
+				}
+
+				if (t > msg.max)
+					msg.max = t;
+
+				igt_mean_add(&msg.mean, t);
+			}
+
+			igt_spin_batch_free(fd, spin);
+
+			igt_info("%10s: mean=%.2fus variance=%.2fus max=%.2fus (n=%lu)\n",
+				 passname[pass],
+				 igt_mean_get(&msg.mean) * 1e6,
+				 igt_mean_get_variance(&msg.mean) * 1e6,
+				 msg.max * 1e6,
+				 msg.mean.count);
+
+			write(link[1], &msg, sizeof(msg));
+		} while (++pass < 3);
+
+		exit(0);
+	}
+
+	for (i = 0; i < 3; i++) {
+		ret = read(link[0], &res[i], sizeof(res[0]));
+		igt_assert_eq(ret, sizeof(res[0]));
+
+		igt_assert_eq(res[i].status, RT_OK);
+	}
+
+	close(link[0]);
+	close(link[1]);
+
+	igt_waitchildren();
+
+	/*
+	 * Check that the submission latency variance for a task with RT
+	 * priority is no larger than three times the same of a normal task.
+	 */
+	igt_assert(igt_mean_get_variance(&res[2].mean) <
+		   igt_mean_get_variance(&res[1].mean) * 3);
+}
+
 igt_main
 {
 	const struct intel_execution_engine *e;
@@ -391,6 +561,12 @@ igt_main
 							e->exec_id | e->flags,
 							e->name, 0);
 
+				igt_subtest_f("%s-rthog-submit", e->name)
+					rthog_latency_on_ring(device,
+							      e->exec_id |
+							      e->flags,
+							      e->name);
+
 				igt_subtest_f("%s-dispatch-queued", e->name)
 					latency_on_ring(device,
 							e->exec_id | e->flags,
Signature · 6 lines
2.14.1

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#1 lore raw

PATCH 2/2 HACK enable new test

From: Tvrtko Ursulin <[email protected]>

---
 tests/intel-ci/blacklist.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
tests/intel-ci/blacklist.txt +1 -1
index d65d8ff35217..bdba838a50ac 100644
@@ -18,7 +18,7 @@ igt@gem_exec_alignment@(?!.*single).*
 igt@gem_exec_fence@(?!.*basic).*
 igt@gem_exec_flush@(?!.*basic).*
 igt@gem_exec_gttfill@(?!.*basic).*
-igt@gem_exec_latency(@.*)?
+igt@gem_exec_latency@(?!.*rthog).*
 igt@gem_exec_lut_handle(@.*)?
 igt@gem_exec_nop@(?!.*(basic|signal-all)).*
 igt@gem_exec_reloc@(?!.*basic).*
Signature · 6 lines
2.14.1

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#2 lore raw
In reply to Tvrtko Ursulin

Quoting Tvrtko Ursulin (2018-04-17 09:41:11)

Quoted 77 lines

From: Tvrtko Ursulin <[email protected]>

We want to make sure RT tasks which use a lot of CPU times can submit batch buffers with roughly the same latency (and certainly not worse) compared to normal tasks.

---
 tests/gem_exec_latency.c | 176 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 176 insertions(+)
tests/gem_exec_latency.c +45 -0
index 9498c0921e60..420ede0f83a0 100644
@@ -36,11 +36,15 @@
 #include <sys/time.h>
 #include <sys/signal.h>
 #include <time.h>
+#include <sched.h>
 
 #include "drm.h"
 
 #include "igt_sysfs.h"
 #include "igt_vgem.h"
+#include "igt_dummyload.h"
+#include "igt_stats.h"
+
 #include "i915/gem_ring.h"
 
 #define LOCAL_I915_EXEC_NO_RELOC (1<<11)
@@ -351,6 +355,172 @@ static void latency_from_ring(int fd,
        }
 }
 
+static void __rearm_spin_batch(igt_spin_t *spin)
+{
+       const uint32_t mi_arb_chk = 0x5 << 23;
+
+       *spin->batch = mi_arb_chk;
+       *spin->running = 0;
+       __sync_synchronize();
+}
+
+static void
+__submit_spin_batch(int fd, igt_spin_t *spin, unsigned int flags)
+{
+       struct drm_i915_gem_execbuffer2 eb = spin->execbuf;
+
+       eb.flags &= ~(0x3f | I915_EXEC_BSD_MASK);
+       eb.flags |= flags | I915_EXEC_NO_RELOC;
+
+       gem_execbuf(fd, &eb);
+}
+
+struct rt_pkt
+{
+#define RT_OK (0)
+#define RT_FAIL (1)
+#define RT_TIMEOUT (2)
+       int status;
+       struct igt_mean mean;
+       double max;
+};
+
+static void __spin_wait(struct rt_pkt *msg, igt_spin_t *spin, double *t_wait)
+{
+       struct timespec ts = { };
+       uint64_t t_last = 0;
+
+       igt_nsec_elapsed(&ts);
+
+       while (!READ_ONCE(*spin->running)) {
+               uint64_t t = igt_nsec_elapsed(&ts);
+
+               if ((t - t_last) > 5UL * NSEC_PER_SEC) {

tests/gem_exec_latency.c static void latency_from_ring(int fd, · line 408

Quoted 10 lines
tests/gem_exec_latency.c +10 -0
+                        /* Absolute timeout to save time. */
+                       msg->status = RT_TIMEOUT;
+               } else if ((t - t_last) > NSEC_PER_SEC / 10) {
+                       /* Backoff every 100ms to give it chance to complete. */
+                       t_last = t;
+                       usleep(1);
+               }
+       }
+
+       *t_wait = igt_nsec_elapsed(&ts) / 1e9;

(I would keep this as nanonseconds in the double until we need to convert into human readable units.)

Quoted 67 lines
tests/gem_exec_latency.c +67 -0
+       msg->status = RT_OK;
+}
+
+/*
+ * Test whether RT thread which hogs the CPU a lot can submit work with
+ * reasonable latency.
+ */
+static void
+rthog_latency_on_ring(int fd, unsigned int ring, const char *name)
+{
+       const char *passname[] = { "warmup", "normal", "rt" };
+       struct rt_pkt res[3];
+       unsigned int i;
+       int link[2];
+       int ret;
+
+       igt_require(gem_can_store_dword(fd, ring));
+
+       igt_assert(pipe(link) == 0);
+
+       memset(res, 0, sizeof(res));
+
+        igt_fork(child, 1) {
+               unsigned int pass = 0; /* Three passes: warmup, normal, rt. */
+
+               do {
+                       struct rt_pkt msg = { };
+                       igt_spin_t *spin;
+
+                       igt_mean_init(&msg.mean);
+
+                       if (pass == 2) {
+                               struct sched_param rt =
+                                               { .sched_priority = 99 };
+
+                               ret = sched_setscheduler(0,
+                                                       SCHED_FIFO | SCHED_RESET_ON_FORK,
+                                                       &rt);
+                               if (ret) {
+                                       igt_warn("Failed to set scheduling policy!\n");
+                                       msg.status = RT_FAIL;
+                                       write(link[1], &msg, sizeof(msg));
+                                       exit(1);
+                               }
+                       }
+
+                       spin = __igt_spin_batch_new_poll(fd, 0, ring);
+                       if (!spin) {
+                               igt_warn("Failed to create spinner! (%s)\n",
+                                        passname[pass]);
+                               msg.status = RT_FAIL;
+                               write(link[1], &msg, sizeof(msg));
+                               exit(1);
+                       }
+                       igt_spin_busywait_until_running(spin);
+
+                       igt_until_timeout(pass > 0 ? 5 : 2) {
+                               double t;
+
+                               igt_spin_batch_end(spin);
+                               gem_sync(fd, spin->handle);
+
+                               __rearm_spin_batch(spin);
+                               __submit_spin_batch(fd, spin, ring);
+
+                               __spin_wait(&msg, spin, &t);
+                               if (msg.status != RT_OK) {

tests/gem_exec_latency.c static void latency_from_ring(int fd, · line 486

Quoted 10 lines
tests/gem_exec_latency.c +10 -0
+                                       igt_warn("Wait timeout! (%s)\n",
+                                                passname[pass]);
+                                       write(link[1], &msg, sizeof(msg));
+                                       exit(1);
+                               }
+
+                               if (t > msg.max)
+                                       msg.max = t;
+
+                               igt_mean_add(&msg.mean, t);

I think I would include a background load (normal process, submitting overlapping nops from alternate contexts, just so that we know that we should be saturating execlists_submission_tasklet) and then have the RT process compete with a MAX_PRIO timed request. As I understand the problem, it is the priority inversion between the RT hog spinning on the breadcrumb preventing ksoftirqd from running; so the challenge of the test setup is in tricking ksoftirqd into running on the same CPU as the hog. I think we need a cpuset to run both RT and background on the same CPU.

Quoted 25 lines
tests/gem_exec_latency.c +25 -0
+                       }
+
+                       igt_spin_batch_free(fd, spin);
+
+                       igt_info("%10s: mean=%.2fus variance=%.2fus max=%.2fus (n=%lu)\n",
+                                passname[pass],
+                                igt_mean_get(&msg.mean) * 1e6,
+                                igt_mean_get_variance(&msg.mean) * 1e6,
+                                msg.max * 1e6,
+                                msg.mean.count);
+
+                       write(link[1], &msg, sizeof(msg));
+               } while (++pass < 3);
+
+               exit(0);
+       }
+
+       for (i = 0; i < 3; i++) {
+               ret = read(link[0], &res[i], sizeof(res[0]));
+               igt_assert_eq(ret, sizeof(res[0]));
+
+               igt_assert_eq(res[i].status, RT_OK);
+       }
+
+       close(link[0]);

tests/gem_exec_latency.c static void latency_from_ring(int fd, · line 521

Quoted 10 lines
tests/gem_exec_latency.c +10 -0
+       close(link[1]);
+
+       igt_waitchildren();
+
+       /*
+        * Check that the submission latency variance for a task with RT
+        * priority is no larger than three times the same of a normal task.
+        */
+       igt_assert(igt_mean_get_variance(&res[2].mean) <
+                  igt_mean_get_variance(&res[1].mean) * 3);

So sample period of 5s, we expect to sample over many many requests, so mean/variance should be reasonably stable even on a noisy system.

Please make this an assert_f and explain the failure in the error message. Even a s/2/RT/; s/1/NORMAL/ would help the stringify. -Chris
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#3 lore raw
In reply to Tvrtko Ursulin

Quoting Tvrtko Ursulin (2018-04-17 09:41:11)

Quoted 109 lines

From: Tvrtko Ursulin <[email protected]>

We want to make sure RT tasks which use a lot of CPU times can submit batch buffers with roughly the same latency (and certainly not worse) compared to normal tasks.

---

tests/gem_exec_latency.c +100 -0
+/*
+ * Test whether RT thread which hogs the CPU a lot can submit work with
+ * reasonable latency.
+ */
+static void
+rthog_latency_on_ring(int fd, unsigned int ring, const char *name)
+{
+       const char *passname[] = { "warmup", "normal", "rt" };
+       struct rt_pkt res[3];
+       unsigned int i;
+       int link[2];
+       int ret;
+
+       igt_require(gem_can_store_dword(fd, ring));
+
+       igt_assert(pipe(link) == 0);
+
+       memset(res, 0, sizeof(res));
+
+        igt_fork(child, 1) {
+               unsigned int pass = 0; /* Three passes: warmup, normal, rt. */
+
+               do {
+                       struct rt_pkt msg = { };
+                       igt_spin_t *spin;
+
+                       igt_mean_init(&msg.mean);
+
+                       if (pass == 2) {
+                               struct sched_param rt =
+                                               { .sched_priority = 99 };
+
+                               ret = sched_setscheduler(0,
+                                                       SCHED_FIFO | SCHED_RESET_ON_FORK,
+                                                       &rt);
+                               if (ret) {
+                                       igt_warn("Failed to set scheduling policy!\n");
+                                       msg.status = RT_FAIL;
+                                       write(link[1], &msg, sizeof(msg));
+                                       exit(1);
+                               }
+                       }
+
+                       spin = __igt_spin_batch_new_poll(fd, 0, ring);
+                       if (!spin) {
+                               igt_warn("Failed to create spinner! (%s)\n",
+                                        passname[pass]);
+                               msg.status = RT_FAIL;
+                               write(link[1], &msg, sizeof(msg));
+                               exit(1);
+                       }
+                       igt_spin_busywait_until_running(spin);
+
+                       igt_until_timeout(pass > 0 ? 5 : 2) {
+                               double t;
+
+                               igt_spin_batch_end(spin);
+                               gem_sync(fd, spin->handle);
+
+                               __rearm_spin_batch(spin);
+                               __submit_spin_batch(fd, spin, ring);
+
+                               __spin_wait(&msg, spin, &t);
+                               if (msg.status != RT_OK) {
+                                       igt_warn("Wait timeout! (%s)\n",
+                                                passname[pass]);
+                                       write(link[1], &msg, sizeof(msg));
+                                       exit(1);
+                               }
+
+                               if (t > msg.max)
+                                       msg.max = t;
+
+                               igt_mean_add(&msg.mean, t);
+                       }
+
+                       igt_spin_batch_free(fd, spin);
+
+                       igt_info("%10s: mean=%.2fus variance=%.2fus max=%.2fus (n=%lu)\n",
+                                passname[pass],
+                                igt_mean_get(&msg.mean) * 1e6,
+                                igt_mean_get_variance(&msg.mean) * 1e6,
+                                msg.max * 1e6,
+                                msg.mean.count);
+
+                       write(link[1], &msg, sizeof(msg));
+               } while (++pass < 3);
+
+               exit(0);
+       }
+
+       for (i = 0; i < 3; i++) {
+               ret = read(link[0], &res[i], sizeof(res[0]));
+               igt_assert_eq(ret, sizeof(res[0]));
+
+               igt_assert_eq(res[i].status, RT_OK);
+       }
+
+       close(link[0]);
+       close(link[1]);

tests/gem_exec_latency.c static void latency_from_ring(int fd, · line 522

Quoted 10 lines
tests/gem_exec_latency.c +10 -0
+
+       igt_waitchildren();
+
+       /*
+        * Check that the submission latency variance for a task with RT
+        * priority is no larger than three times the same of a normal task.
+        */
+       igt_assert(igt_mean_get_variance(&res[2].mean) <
+                  igt_mean_get_variance(&res[1].mean) * 3);
+}

Fwiw, I think we should go full on ministat here, use igt_stats_t to record every result then print the overlapping histograms so we can see the distribution.

I was pondering a simple metric to warn about long tails. I was wondering if the sum of values above the median would be interesting, but really it boils down to wanting 99% to be within a smidgen of each other.
-Chris
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#4 lore raw

[igt-dev] ✓ Fi.CI.BAT: success for series starting with [CI,i-g-t,1/2] tests/gem_exec_latency: New subtests for checking submission from RT tasks

In reply to Tvrtko Ursulin
== Series Details ==

== Series Details ==

Series: series starting with [CI,i-g-t,1/2] tests/gem_exec_latency: New subtests for checking submission from RT tasks
URL : https://patchwork.freedesktop.org/series/41797/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4068 -> IGTPW_1279 =

== Summary - SUCCESS ==

No regressions found.

External URL: https://patchwork.freedesktop.org/api/1.0/series/41797/revisions/1/mbox/

== Known issues ==

Here are the changes found in IGTPW_1279 that come from known issues:

=== IGT changes ===

    ==== Issues hit ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
      fi-glk-1:           NOTRUN -> INCOMPLETE (k.org#198133, fdo#103359)

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-ivb-3520m:       PASS -> DMESG-WARN (fdo#106084)

    
    ==== Possible fixes ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-ivb-3520m:       DMESG-WARN (fdo#106084) -> PASS

fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084
k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133

== Participating hosts (34 -> 32) ==

Additional (1): fi-glk-1
Missing (3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq

== Build changes ==

* IGT: IGT_4441 -> IGTPW_1279

CI_DRM_4068: 28fecc12e5c2b1beb9ab89e3616266d5d5e58e3d @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_1279: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1279/
IGT_4441: 83ba5b7d3bde48b383df41792fc9c955a5a23bdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
piglit_4441: e60d247eb359f044caf0c09904da14e39d7adca1 @ git://anongit.freedesktop.org/piglit

== Testlist changes ==

+igt@gem_exec_latency@blt-rthog-submit
+igt@gem_exec_latency@bsd1-rthog-submit
+igt@gem_exec_latency@bsd2-rthog-submit
+igt@gem_exec_latency@bsd-rthog-submit
+igt@gem_exec_latency@render-rthog-submit
+igt@gem_exec_latency@vebox-rthog-submit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1279/issues.html
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#5 lore raw

[igt-dev] ✓ Fi.CI.BAT: success for series starting with [CI,i-g-t,1/2] tests/gem_exec_latency: New subtests for checking submission from RT tasks

In reply to Tvrtko Ursulin
== Series Details ==

== Series Details ==

Series: series starting with [CI,i-g-t,1/2] tests/gem_exec_latency: New subtests for checking submission from RT tasks
URL : https://patchwork.freedesktop.org/series/41797/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4068 -> IGTPW_1280 =

== Summary - SUCCESS ==

No regressions found.

External URL: https://patchwork.freedesktop.org/api/1.0/series/41797/revisions/1/mbox/

== Known issues ==

Here are the changes found in IGTPW_1280 that come from known issues:

=== IGT changes ===

    ==== Issues hit ====

    igt@debugfs_test@read_all_entries:
      fi-snb-2520m:       PASS -> INCOMPLETE (fdo#103713)

    igt@kms_flip@basic-flip-vs-wf_vblank:
      fi-skl-6770hq:      PASS -> FAIL (fdo#100368)

    igt@kms_pipe_crc_basic@read-crc-pipe-c-frame-sequence:
      fi-skl-6770hq:      PASS -> FAIL (fdo#103481)

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-glk-1:           NOTRUN -> INCOMPLETE (k.org#198133, fdo#103359)

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-cnl-y3:          PASS -> DMESG-WARN (fdo#104951)

    
    ==== Possible fixes ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-ivb-3520m:       DMESG-WARN (fdo#106084) -> PASS

fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
fdo#103481 https://bugs.freedesktop.org/show_bug.cgi?id=103481
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#104951 https://bugs.freedesktop.org/show_bug.cgi?id=104951
fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084
k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133

== Participating hosts (34 -> 32) ==

Additional (1): fi-glk-1
Missing (3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq

== Build changes ==

* IGT: IGT_4441 -> IGTPW_1280

CI_DRM_4068: 28fecc12e5c2b1beb9ab89e3616266d5d5e58e3d @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_1280: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1280/
IGT_4441: 83ba5b7d3bde48b383df41792fc9c955a5a23bdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
piglit_4441: e60d247eb359f044caf0c09904da14e39d7adca1 @ git://anongit.freedesktop.org/piglit

== Testlist changes ==

+igt@gem_exec_latency@blt-rthog-submit
+igt@gem_exec_latency@bsd1-rthog-submit
+igt@gem_exec_latency@bsd2-rthog-submit
+igt@gem_exec_latency@bsd-rthog-submit
+igt@gem_exec_latency@render-rthog-submit
+igt@gem_exec_latency@vebox-rthog-submit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1280/issues.html
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#6 lore raw

[igt-dev] ✗ Fi.CI.IGT: failure for series starting with [CI,i-g-t,1/2] tests/gem_exec_latency: New subtests for checking submission from RT tasks

In reply to Tvrtko Ursulin
== Series Details ==

== Series Details ==

Series: series starting with [CI,i-g-t,1/2] tests/gem_exec_latency: New subtests for checking submission from RT tasks
URL : https://patchwork.freedesktop.org/series/41797/
State : failure

== Summary ==

= CI Bug Log - changes from IGT_4441_full -> IGTPW_1279_full =

== Summary - FAILURE ==

Serious unknown changes coming with IGTPW_1279_full absolutely need to be verified manually.

If you think the reported changes have nothing to do with the changes introduced in IGTPW_1279_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI.

External URL: https://patchwork.freedesktop.org/api/1.0/series/41797/revisions/1/mbox/

== Possible new issues ==

Here are the unknown changes that may have been introduced in IGTPW_1279_full:

=== IGT changes ===

    ==== Possible regressions ====

    {igt@gem_exec_latency@vebox-rthog-submit}:
      shard-apl:          NOTRUN -> FAIL +1

    igt@kms_flip@absolute-wf_vblank-interruptible:
      shard-apl:          PASS -> FAIL

== Known issues ==

Here are the changes found in IGTPW_1279_full that come from known issues:

=== IGT changes ===

    ==== Issues hit ====

    igt@kms_flip@basic-flip-vs-wf_vblank:
      shard-hsw:          PASS -> FAIL (fdo#103928)

    
    ==== Possible fixes ====

    igt@kms_flip@2x-dpms-vs-vblank-race:
      shard-hsw:          FAIL (fdo#103060) -> PASS

    igt@kms_flip@2x-flip-vs-expired-vblank:
      shard-hsw:          FAIL (fdo#102887) -> PASS

    igt@kms_rotation_crc@primary-rotation-180:
      shard-hsw:          FAIL (fdo#103925) -> PASS

    igt@perf_pmu@interrupts-sync:
      shard-apl:          FAIL (fdo#104485) -> PASS

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928
fdo#104485 https://bugs.freedesktop.org/show_bug.cgi?id=104485

== Participating hosts (5 -> 3) ==

Missing (2): shard-glkb shard-kbl

== Build changes ==

* IGT: IGT_4441 -> IGTPW_1279
* Linux: CI_DRM_4059 -> CI_DRM_4068

CI_DRM_4059: c1645edc253f2b52a8c94565a75b479a6782e75f @ git://anongit.freedesktop.org/gfx-ci/linux
CI_DRM_4068: 28fecc12e5c2b1beb9ab89e3616266d5d5e58e3d @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_1279: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1279/
IGT_4441: 83ba5b7d3bde48b383df41792fc9c955a5a23bdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
piglit_4441: e60d247eb359f044caf0c09904da14e39d7adca1 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1279/shards.html
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#7 lore raw

[igt-dev] ✓ Fi.CI.IGT: success for series starting with [CI,i-g-t,1/2] tests/gem_exec_latency: New subtests for checking submission from RT tasks

In reply to Tvrtko Ursulin
== Series Details ==

== Series Details ==

Series: series starting with [CI,i-g-t,1/2] tests/gem_exec_latency: New subtests for checking submission from RT tasks
URL : https://patchwork.freedesktop.org/series/41797/
State : success

== Summary ==

= CI Bug Log - changes from IGT_4441_full -> IGTPW_1280_full =

== Summary - WARNING ==

Minor unknown changes coming with IGTPW_1280_full need to be verified manually.

If you think the reported changes have nothing to do with the changes introduced in IGTPW_1280_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI.

External URL: https://patchwork.freedesktop.org/api/1.0/series/41797/revisions/1/mbox/

== Possible new issues ==

Here are the unknown changes that may have been introduced in IGTPW_1280_full:

=== IGT changes ===

    ==== Possible regressions ====

    {igt@gem_exec_latency@blt-rthog-submit}:
      shard-kbl:          NOTRUN -> FAIL +3

    {igt@gem_exec_latency@vebox-rthog-submit}:
      shard-apl:          NOTRUN -> FAIL +2

    
    ==== Warnings ====

    igt@gem_mocs_settings@mocs-rc6-ctx-render:
      shard-kbl:          SKIP -> PASS

    igt@gem_mocs_settings@mocs-rc6-dirty-render:
      shard-kbl:          PASS -> SKIP +1

    igt@kms_cursor_legacy@cursora-vs-flipa-legacy:
      shard-snb:          PASS -> SKIP +2

== Known issues ==

Here are the changes found in IGTPW_1280_full that come from known issues:

=== IGT changes ===

    ==== Possible fixes ====

    igt@drv_suspend@forcewake:
      shard-kbl:          INCOMPLETE (fdo#103665) -> PASS

    igt@kms_flip@2x-flip-vs-expired-vblank:
      shard-hsw:          FAIL (fdo#102887) -> PASS

    igt@kms_rotation_crc@primary-rotation-180:
      shard-hsw:          FAIL (fdo#103925) -> PASS

    igt@kms_sysfs_edid_timing:
      shard-apl:          WARN (fdo#100047) -> PASS

    igt@perf_pmu@interrupts-sync:
      shard-apl:          FAIL (fdo#104485) -> PASS

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#104485 https://bugs.freedesktop.org/show_bug.cgi?id=104485

== Participating hosts (5 -> 4) ==

Missing (1): shard-glkb

== Build changes ==

* IGT: IGT_4441 -> IGTPW_1280
* Linux: CI_DRM_4059 -> CI_DRM_4068

CI_DRM_4059: c1645edc253f2b52a8c94565a75b479a6782e75f @ git://anongit.freedesktop.org/gfx-ci/linux
CI_DRM_4068: 28fecc12e5c2b1beb9ab89e3616266d5d5e58e3d @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_1280: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1280/
IGT_4441: 83ba5b7d3bde48b383df41792fc9c955a5a23bdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
piglit_4441: e60d247eb359f044caf0c09904da14e39d7adca1 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1280/shards.html
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#8 lore raw

PATCH 1/1 igt/gem_exec_latency: Report stddev for rthog

In reply to Tvrtko Ursulin

Report and compare stddev instead of variance so that direct submission passes ;)

---
 tests/gem_exec_latency.c | 19 +++++++++----------
 1 file changed, 9 insertions(+), 10 deletions(-)
tests/gem_exec_latency.c +9 -10
index 547d728b3..757b390d0 100644
@@ -429,7 +429,7 @@ rthog_latency_on_ring(int fd, unsigned int ring, const char *name)
 					igt_warn("Failed to set scheduling policy!\n");
 					msg.status = RT_FAIL;
 					write(link[1], &msg, sizeof(msg));
-					exit(1);
+					break;
 				}
 			}
 
@@ -439,7 +439,7 @@ rthog_latency_on_ring(int fd, unsigned int ring, const char *name)
 					 passname[pass]);
 				msg.status = RT_FAIL;
 				write(link[1], &msg, sizeof(msg));
-				exit(1);
+				break;
 			}
 			igt_spin_busywait_until_running(spin);
 
@@ -457,7 +457,7 @@ rthog_latency_on_ring(int fd, unsigned int ring, const char *name)
 					igt_warn("Wait timeout! (%s)\n",
 						 passname[pass]);
 					write(link[1], &msg, sizeof(msg));
-					exit(1);
+					break;
 				}
 
 				if (t > msg.max)
@@ -468,17 +468,15 @@ rthog_latency_on_ring(int fd, unsigned int ring, const char *name)
 
 			igt_spin_batch_free(fd, spin);
 
-			igt_info("%10s: mean=%.2fus variance=%.2fus max=%.2fus (n=%lu)\n",
+			igt_info("%10s: mean=%.2fus stddev=%.3fus max=%.2fus (n=%lu)\n",
 				 passname[pass],
 				 igt_mean_get(&msg.mean) * 1e6,
-				 igt_mean_get_variance(&msg.mean) * 1e6,
+				 sqrt(igt_mean_get_variance(&msg.mean)) * 1e6,
 				 msg.max * 1e6,
 				 msg.mean.count);
 
 			write(link[1], &msg, sizeof(msg));
 		} while (++pass < 3);
-
-		exit(0);
 	}
 
 	for (i = 0; i < 3; i++) {
@@ -494,11 +492,12 @@ rthog_latency_on_ring(int fd, unsigned int ring, const char *name)
 	igt_waitchildren();
 
 	/*
-	 * Check that the submission latency variance for a task with RT
-	 * priority is no larger than three times the same of a normal task.
+	 * Check that the submission latency stddev for a task with RT
+	 * priority is no larger than three times the same of a normal task,
+	 * (since variance is the square of stddev, we check 9 times)
 	 */
 	igt_assert(igt_mean_get_variance(&res[2].mean) <
-		   igt_mean_get_variance(&res[1].mean) * 3);
+		   igt_mean_get_variance(&res[1].mean) * 9);
 }
 
 igt_main
Signature · 6 lines
2.17.0

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#9 lore raw

[igt-dev] ✗ Fi.CI.BAT: failure for series starting with [i-g-t] igt/gem_exec_latency: Report stddev for rthog (rev2)

In reply to Tvrtko Ursulin
== Series Details ==

== Series Details ==

Series: series starting with [i-g-t] igt/gem_exec_latency: Report stddev for rthog (rev2)
URL : https://patchwork.freedesktop.org/series/41797/
State : failure

== Summary ==

Applying: igt/gem_exec_latency: Report stddev for rthog Patch failed at 0001 igt/gem_exec_latency: Report stddev for rthog The copy of the patch that failed is found in: .git/rebase-apply/patch When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".

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