Add more descriptive column headers for Idle Stats Tab

PATCH New Cheng 1 participant 1 message Apr 20, 2018

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Cheng

2018-04-20 18:45 UTC #0 lore raw

PATCH 1/1 Add more descriptive column headers for Idle Stats Tab

From: Michael Cheng <michael.cheng(a)intel.com>

This patch introduces a more descriptive column headers to show where Powertop gets these values from (OS versus model specific registers).

Signed-off-by Michael Cheng <michael.cheng(a)intel.com>

---
 src/cpu/cpu.cpp         | 25 +++++++++++++++++++------
 src/cpu/cpu.h           |  3 ++-
 src/cpu/cpu_core.cpp    |  6 ++----
 src/cpu/cpu_linux.cpp   |  2 +-
 src/cpu/cpu_package.cpp |  3 +--
 5 files changed, 25 insertions(+), 14 deletions(-)

src/cpu/cpu.cpp +19 -6

index f3711f5..f6bae03 100644
@@ -68,11 +68,15 @@ static class abstract_cpu * new_package(int package, int cpu, char * vendor, int
 	char packagename[128];
 	if (strcmp(vendor, "GenuineIntel") == 0)
 		if (family == 6)
-			if (is_supported_intel_cpu(model))
+			if (is_supported_intel_cpu(model)) {
 				ret = new class nhm_package(model);
+				ret->set_intel_MSR(true);
+			}
 
-	if (!ret)
+	if (!ret) {
 		ret = new class cpu_package;
+		ret->set_intel_MSR(false);
+	}
 
 	ret->set_number(package, cpu);
 	ret->set_type("Package");

@@ -105,11 +109,16 @@ static class abstract_cpu * new_core(int core, int cpu, char * vendor, int famil
 
 	if (strcmp(vendor, "GenuineIntel") == 0)
 		if (family == 6)
-			if (is_supported_intel_cpu(model))
+			if (is_supported_intel_cpu(model)) {
 				ret = new class nhm_core(model);
+				ret->set_intel_MSR(true);
+			}
 
-	if (!ret)
+	if (!ret) {
 		ret = new class cpu_core;
+		ret->set_intel_MSR(false);
+	}
+
 	ret->set_number(core, cpu);
 	ret->childcount = 0;
 	ret->set_type("Core");

@@ -134,11 +143,15 @@ static class abstract_cpu * new_cpu(int number, char * vendor, int family, int m
 
 	if (strcmp(vendor, "GenuineIntel") == 0)
 		if (family == 6)
-			if (is_supported_intel_cpu(model))
+			if (is_supported_intel_cpu(model)) {
 				ret = new class nhm_cpu;
+				ret->set_intel_MSR(true);
+			}
 
-	if (!ret)
+	if (!ret) {
 		ret = new class cpu_linux;
+		ret->set_intel_MSR(false);
+	}
 	ret->set_number(number, number);
 	ret->set_type("CPU");
 	ret->childcount = 0;

src/cpu/cpu.h +2 -1

index 6b4aed8..9b04018 100644
@@ -93,7 +93,7 @@ public:
 	int	number;
 	int	childcount;
 	const char*    name;
-	bool	idle, old_idle;
+	bool	idle, old_idle, has_intel_MSR;
 	uint64_t	current_frequency;
 	uint64_t	effective_frequency;

@@ -108,6 +108,7 @@ public:
 
 	int	get_first_cpu() { return first_cpu; }
 	void	set_number(int _number, int cpu) {this->number = _number; this->first_cpu = cpu;};
+	void	set_intel_MSR(bool _bool_value) {this->has_intel_MSR =  _bool_value;};
 	void	set_type(const char* _name) {this->name = _name;};
 	int	get_number(void) { return number; };
 	const char* get_type(void) { return name; };

src/cpu/cpu_core.cpp +2 -4

index 65c2718..e1372f7 100644
@@ -33,10 +33,8 @@ char * cpu_core::fill_cstate_line(int line_nr, char *buffer, const char *separat
 	unsigned int i;
 	buffer[0] = 0;
 
-	if (line_nr == LEVEL_HEADER) {
-		sprintf(buffer,_("  Core"));
-		return buffer;
-	}
+	if (line_nr == LEVEL_HEADER)
+		sprintf(buffer, this->has_intel_MSR ? _(" Core(HW)"): _(" Core(OS)"));
 
 	for (i = 0; i < cstates.size(); i++) {
 		if (cstates[i]->line_level != line_nr)

src/cpu/cpu_linux.cpp +1 -1

index 2e8dba3..d7ce93d 100644
@@ -239,7 +239,7 @@ char * cpu_linux::fill_cstate_line(int line_nr, char *buffer, const char *separa
 	buffer[0] = 0;
 
 	if (line_nr == LEVEL_HEADER) {
-		sprintf(buffer,_(" CPU %i"), number);
+		sprintf(buffer,_(" CPU(OS) %i"), number);
 		return buffer;
 	}

src/cpu/cpu_package.cpp +1 -2

index c264e54..926a484 100644
@@ -44,8 +44,7 @@ char * cpu_package::fill_cstate_line(int line_nr, char *buffer, const char *sepa
 	buffer[0] = 0;
 
 	if (line_nr == LEVEL_HEADER) {
-		sprintf(buffer,_("Package"));
-		return buffer;
+		sprintf(buffer, this->has_intel_MSR ? _(" Pkg(HW)"): _(" Pkg(OS)"));
 	}
 
 	for (i = 0; i < cstates.size(); i++) {

Signature · 1 line

2.14.1