ARM: dts: imx6: RDU2: bump SoC/PU operating points by 25mV
Subsystems (2)
PATCH 1/3 ARM: dts: imx6: RDU2: bump SoC/PU operating points by 25mV
This bumps the SoC/PU domain operating points by 25mV, giving a total of 75mV margin to the minimum required voltages. This gets rid of brown-outs seen due to voltage drop-out on the board.
--- arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +11 -0
@@ -263,6 +263,17 @@ }; }; +&cpu0 { + fsl,soc-operating-points = < + /* ARM kHz SOC-PU uV */ + 1200000 1300000 + 996000 1275000 + 852000 1275000 + 792000 1200000 + 396000 1200000 + >; +}; + ®_arm { vin-supply = <&sw1a_reg>; };
Signature · 1 line
2.16.3
PATCH 2/3 ARM: dts: imx6: RDU2+: add assigned clocks for GPU 3D
This downclocks the shader domain from 720MHz to 594MHz, which gets rid of brown-outs due to excessive current draw on the PMIC switchers. The board has an unchanged power tree from the Quad design, which isn't able to cope with higher current needs of the QuadPlus GPU at full speed.
--- arch/arm/boot/dts/imx6qp-zii-rdu2.dts | 5 +++++ 1 file changed, 5 insertions(+)
arch/arm/boot/dts/imx6qp-zii-rdu2.dts +5 -0
@@ -48,3 +48,8 @@ model = "ZII RDU2+ Board"; compatible = "zii,imx6qp-zii-rdu2", "fsl,imx6qp"; }; + +&gpu_3d { + assigned-clocks = <&clks IMX6QDL_CLK_GPU3D_SHADER_SEL>; + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL2_PFD1_594M>; +};
Signature · 1 line
2.16.3
PATCH 2/3 ARM: dts: imx6: RDU2+: add assigned clocks for GPU 3D
Quoted 26 lines · Lucas Stach
This downclocks the shader domain from 720MHz to 594MHz, which gets rid of brown-outs due to excessive current draw on the PMIC switchers. The board has an unchanged power tree from the Quad design, which isn't able to cope with higher current needs of the QuadPlus GPU at full speed.
Signed-off-by Lucas Stach <[email protected]>--- arch/arm/boot/dts/imx6qp-zii-rdu2.dts | 5 +++++ 1 file changed, 5 insertions(+)arch/arm/boot/dts/imx6qp-zii-rdu2.dts +5
-1@@ -48,3 +48,8 @@ model = "ZII RDU2+ Board"; compatible = "zii,imx6qp-zii-rdu2", "fsl,imx6qp"; }; + +&gpu_3d { + assigned-clocks = <&clks IMX6QDL_CLK_GPU3D_SHADER_SEL>; + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL2_PFD1_594M>; +}; --2.16.3
PATCH 3/3 ARM: dts: imx6: RDU2: add eGalax touchscreen
In reply to Lucas StachThis touchscreen is present instead of the RMI4 touch on some SKUs of the RDU2. Keep it disabled by default, the bootloader will enable it instead of the RMI4 touch when running on one of those units.
--- arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +11 -0
@@ -573,6 +573,17 @@ }; }; + touchscreen at 2a { + compatible = "eeti,egalax_ts"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ts>; + reg = <0x2a>; + interrupt-parent = <&gpio1>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + wakeup-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + status = "disabled"; + }; + hpa1: amp at 60 { compatible = "ti,tpa6130a2"; pinctrl-names = "default";
Signature · 1 line
2.16.3
PATCH 3/3 ARM: dts: imx6: RDU2: add eGalax touchscreen
Quoted 34 lines · Lucas Stach
This touchscreen is present instead of the RMI4 touch on some SKUs of the RDU2. Keep it disabled by default, the bootloader will enable it instead of the RMI4 touch when running on one of those units.
Signed-off-by Lucas Stach <[email protected]>--- arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +11
-1@@ -573,6 +573,17 @@ }; }; + touchscreen at 2a { + compatible = "eeti,egalax_ts"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ts>; + reg = <0x2a>; + interrupt-parent = <&gpio1>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + wakeup-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + status = "disabled"; + }; + hpa1: amp at 60 { compatible = "ti,tpa6130a2"; pinctrl-names = "default"; --2.16.3
PATCH 1/3 ARM: dts: imx6: RDU2: bump SoC/PU operating points by 25mV
In reply to Lucas StachQuoted 34 lines · Lucas Stach
This bumps the SoC/PU domain operating points by 25mV, giving a total of 75mV margin to the minimum required voltages. This gets rid of brown-outs seen due to voltage drop-out on the board.
Signed-off-by Lucas Stach <[email protected]>--- arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +11
-1@@ -263,6 +263,17 @@ }; }; +&cpu0 { + fsl,soc-operating-points = < + /* ARM kHz SOC-PU uV */ + 1200000 1300000 + 996000 1275000 + 852000 1275000 + 792000 1200000 + 396000 1200000 + >; +}; + ®_arm { vin-supply = <&sw1a_reg>; }; --2.16.3
Shawn Guo
AppliedPATCH 1/3 ARM: dts: imx6: RDU2: bump SoC/PU operating points by 25mV
In reply to Lucas StachQuoted 5 lines · Lucas Stach
This bumps the SoC/PU domain operating points by 25mV, giving a total of 75mV margin to the minimum required voltages. This gets rid of brown-outs seen due to voltage drop-out on the board.
Signed-off-by Lucas Stach <[email protected]>
Applied all, thanks.