dra7: mmc: Update mmc dt node to use sdhci-omap
Subsystems (3)
v4 cover dra7: mmc: Update mmc dt node to use sdhci-omap
Changes from v3:
*) Added dra7-mmc-iodelay.dtsi to add a new pinctrl group for clk line
without pullup to be used for dra71-evm and am57xx-idk.
*) Rename wlcore node name to wifi
This series should be merged only after [1].
[1] -> https://marc.info/?l=linux-omap&m=152482966225758&w=2
This series:
*) Adds wilink wlan support (Now all MMC instances in DRA7 will use
sdhci-omap)
*) Add a new pinctrl group for clk line without pullup required for
UHS cards to work reliably.
*) Update README to make sure users update .config file from 4.18
kernel.
*) Use sdhci-omap programming model.
In the "Use sdhci-omap programming model" patch, "ti,omap4-hsmmc" compatible is removed. This is because if both "ti,dra7-sdhci" and "ti,omap4-hsmmc" is added and if there is probe deferral in sdhci_omap driver, the device is binding to omap_hsmmc driver.
Once omap_hsmmc and sdhci_omap driver are feature identical, sdhci_omap driver will be made to support omap_hsmmc binding (including "ti,omap4-hsmmc" compatible) and omap_hsmmc driver will be removed. Till then dt nodes with "ti,omap4-hsmmc" compatible will use omap_hsmmc driver and "ti,dra7-sdhci" compatible will use sdhci_omap driver.
Hari Nagalla (2):
ARM: dts: dra72-evm-common: Add wilink8 wlan support
ARM: dts: dra7-evm: Add wilink8 wlan support
Kishon Vijay Abraham I (10):
ARM: dts: dra72-evm-common: Remove mmc specific pinmux
ARM: dts: dra71-evm: Add "vqmmc-supply" property for mmc2
ARM: dts: dra7-mmc-iodelay: Add a new pinctrl group for clk line
without pullup
ARM: dts: am57xx-idk: Use pinctrl group from dra7-mmc-iodelay.dtsi to
select pulldown
ARM: dts: dra71-evm: Use pinctrl group from dra7-mmc-iodelay.dtsi to
select pulldown
ARM: dts: am57xx-beagle-x15/am57xx-idk: Fix pinctrl-names
ARM: dts: dra7-evm: Model EVM_3V6 regulator
ARM: dts: dra7: Use sdhci-omap programming model
ARM: dts: dra7: Add high speed modes capability to MMC1/MMC2 dt node
Documentation: ARM: Add new MMC requirements for DRA7/K2G
Sekhar Nori (1):
ARM: dts: am574x-idk: Add pinmux configuration for MMC
Vishal Mahaveer (1):
ARM: dts: dra76-evm: Add wilink8 wlan support
Documentation/arm/OMAP/README | 4 ++ arch/arm/boot/dts/am571x-idk.dts | 5 +- arch/arm/boot/dts/am572x-idk.dts | 5 +- arch/arm/boot/dts/am574x-idk.dts | 20 ++++++ .../boot/dts/am57xx-beagle-x15-common.dtsi | 4 +- arch/arm/boot/dts/am57xx-beagle-x15.dts | 3 +- arch/arm/boot/dts/am57xx-idk-common.dtsi | 14 +--- arch/arm/boot/dts/dra7-evm-common.dtsi | 15 ++++ arch/arm/boot/dts/dra7-evm.dts | 68 ++++++++++++++++++ arch/arm/boot/dts/dra7-mmc-iodelay.dtsi | 19 +++++ arch/arm/boot/dts/dra7.dtsi | 32 ++++----- arch/arm/boot/dts/dra71-evm.dts | 17 +---- arch/arm/boot/dts/dra72-evm-common.dtsi | 71 +++++++++++-------- arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi | 11 +++ arch/arm/boot/dts/dra76-evm.dts | 34 ++++++++- 15 files changed, 243 insertions(+), 79 deletions(-) create mode 100644 arch/arm/boot/dts/dra7-mmc-iodelay.dtsi
Signature · 1 line
2.17.0
PATCH v4 1/14 ARM: dts: dra72-evm-common: Remove mmc specific pinmux
mmc specific pinmux is selected from dra72x-mmc-iodelay.dtsi, so remove it from dra72-evm-common.dtsi.
--- arch/arm/boot/dts/dra72-evm-common.dtsi | 27 ------------------------- 1 file changed, 27 deletions(-)
arch/arm/boot/dts/dra72-evm-common.dtsi +0 -27
@@ -174,33 +174,6 @@ }; &dra7_pmx_core { - mmc1_pins_default: mmc1_pins_default { - pinctrl-single,pins = < - DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */ - DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ - DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ - DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ - DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ - DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ - DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ - >; - }; - - mmc2_pins_default: mmc2_pins_default { - pinctrl-single,pins = < - DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ - DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ - DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ - DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ - DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ - DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ - DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ - DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ - DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ - DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ - >; - }; - dcan1_pins_default: dcan1_pins_default { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
Signature · 1 line
2.17.0
PATCH v4 2/14 ARM: dts: dra71-evm: Add "vqmmc-supply" property for mmc2
In reply to Kishon Vijay Abraham IAdd "vqmmc-supply" property for mmc2 to indicate the supply connected to the IO lines.
--- arch/arm/boot/dts/dra71-evm.dts | 1 + 1 file changed, 1 insertion(+)
arch/arm/boot/dts/dra71-evm.dts +1 -0
@@ -204,6 +204,7 @@ pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>; pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>; vmmc-supply = <&evm_1v8_sw>; + vqmmc-supply = <&evm_1v8_sw>; }; &mac {
Signature · 1 line
2.17.0
PATCH v4 3/14 ARM: dts: dra7-mmc-iodelay: Add a new pinctrl group for clk line without pullup
In reply to Kishon Vijay Abraham IDuring a short period when the bus voltage is switched from 3.3v to 1.8v, (to enumerate UHS mode), the mmc module is disabled and the mmc IO lines are kept in a state according to the programmed pad mux pull type.
According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the host should hold CLK low for at least 5ms.
In order to keep the card line low during voltage switch, the pad mux of mmc1_clk line should be configured to pull down.
Add a new pinctrl group for clock line without pullup to be used in boards where mmc1_clk line is not connected to an external pullup.
--- arch/arm/boot/dts/dra7-mmc-iodelay.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 arch/arm/boot/dts/dra7-mmc-iodelay.dtsi
arch/arm/boot/dts/dra7-mmc-iodelay.dtsi new file +19 -0
@@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * MMC IOdelay values for TI's DRA7xx SoCs. + * Copyright (C) 2018 Texas Instruments + * Author: Kishon Vijay Abraham I <[email protected]> + */ + +&dra7_pmx_core { + mmc1_pins_default_no_clk_pu: mmc1_pins_default_no_clk_pu { + pinctrl-single,pins = < + DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */ + DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ + DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ + DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ + DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ + DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ + >; + }; +};
Signature · 1 line
2.17.0
PATCH v4 4/14 ARM: dts: am57xx-idk: Use pinctrl group from dra7-mmc-iodelay.dtsi to select pulldown
In reply to Kishon Vijay Abraham Icommit 18aa0f4bca701cb078a6 ("ARM: dts: am57xx-idk: Select pull down for mmc1_clk line in default mode") modified mmc1_pins_default pinctrl group in am57xx-idk-common.dtsi in order to change the CLK line to PIN_INPUT_PULLDOWN. However instead of modifying the pinctrl group, use the new pinctrl group "mmc1_pins_default_no_clk_pu" in dra7-mmc-iodelay.dtsi added specifically to be used for CLK line without external pull up.
--- arch/arm/boot/dts/am571x-idk.dts | 3 ++- arch/arm/boot/dts/am572x-idk.dts | 3 ++- arch/arm/boot/dts/am57xx-idk-common.dtsi | 11 ----------- 3 files changed, 4 insertions(+), 13 deletions(-)
arch/arm/boot/dts/am571x-idk.dts +2 -1
@@ -10,6 +10,7 @@ #include "dra72x.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> +#include "dra7-mmc-iodelay.dtsi" #include "dra72x-mmc-iodelay.dtsi" #include "am57xx-idk-common.dtsi"
@@ -102,7 +103,7 @@ &mmc1 { pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; - pinctrl-0 = <&mmc1_pins_default>; + pinctrl-0 = <&mmc1_pins_default_no_clk_pu>; pinctrl-1 = <&mmc1_pins_hs>; pinctrl-2 = <&mmc1_pins_sdr12>; pinctrl-3 = <&mmc1_pins_sdr25>;
arch/arm/boot/dts/am572x-idk.dts +2 -1
@@ -9,6 +9,7 @@ /dts-v1/; #include "dra74x.dtsi" +#include "dra7-mmc-iodelay.dtsi" #include "dra74x-mmc-iodelay.dtsi" #include "am572x-idk-common.dtsi"
@@ -20,7 +21,7 @@ &mmc1 { pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; - pinctrl-0 = <&mmc1_pins_default>; + pinctrl-0 = <&mmc1_pins_default_no_clk_pu>; pinctrl-1 = <&mmc1_pins_hs>; pinctrl-2 = <&mmc1_pins_sdr12>; pinctrl-3 = <&mmc1_pins_sdr25>;
arch/arm/boot/dts/am57xx-idk-common.dtsi +0 -11
@@ -115,17 +115,6 @@ DRA7XX_CORE_IOPAD(0x37d4, MUX_MODE15 | PULL_UP) /* dcan1_rx.off */ >; }; - - mmc1_pins_default: mmc1_pins_default { - pinctrl-single,pins = < - DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */ - DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ - DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ - DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ - DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ - DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ - >; - }; }; &i2c1 {
Signature · 1 line
2.17.0
PATCH v4 5/14 ARM: dts: dra71-evm: Use pinctrl group from dra7-mmc-iodelay.dtsi to select pulldown
In reply to Kishon Vijay Abraham Icommit 0e43884cca77218d2eccc331396e8 ("ARM: dts: dra71-evm: Select pull down for mmc1_clk line in default mode") modified mmc1_pins_default pinctrl group in dra71-evm.dts to change the CLK line to PIN_INPUT_PULLDOWN. However instead of changing the pinctrl group, use the new pinctrl group "mmc1_pins_default_no_clk_pu" in dra7-mmc-iodelay.dtsi added specifically to be used for CLK line without external pull up.
--- arch/arm/boot/dts/dra71-evm.dts | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-)
arch/arm/boot/dts/dra71-evm.dts +2 -14
@@ -7,6 +7,7 @@ */ #include "dra72-evm-common.dtsi" +#include "dra7-mmc-iodelay.dtsi" #include "dra72x-mmc-iodelay.dtsi" #include <dt-bindings/net/ti-dp83867.h>
@@ -50,19 +51,6 @@ }; }; -&dra7_pmx_core { - mmc1_pins_default: mmc1_pins_default { - pinctrl-single,pins = < - DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */ - DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ - DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ - DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ - DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ - DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ - >; - }; -}; - &i2c1 { status = "okay"; clock-frequency = <400000>;
@@ -187,7 +175,7 @@ &mmc1 { pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; - pinctrl-0 = <&mmc1_pins_default>; + pinctrl-0 = <&mmc1_pins_default_no_clk_pu>; pinctrl-1 = <&mmc1_pins_hs>; pinctrl-2 = <&mmc1_pins_sdr12>; pinctrl-3 = <&mmc1_pins_sdr25>;
Signature · 1 line
2.17.0
PATCH v4 6/14 ARM: dts: am574x-idk: Add pinmux configuration for MMC
In reply to Kishon Vijay Abraham IFrom: Sekhar Nori <[email protected]>
Include dra76x-mmc-iodelay.dtsi which has pinmux and IODelay configuration values for the various MMC modes for am574x SoC and use it in the pinctrl properties of MMC devicetree nodes present in am574x-idk.dts.
--- arch/arm/boot/dts/am574x-idk.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)
arch/arm/boot/dts/am574x-idk.dts +20 -0
@@ -7,6 +7,8 @@ /dts-v1/; #include "dra76x.dtsi" +#include "dra7-mmc-iodelay.dtsi" +#include "dra76x-mmc-iodelay.dtsi" #include "am572x-idk-common.dtsi" / {
@@ -20,3 +22,21 @@ spi-max-frequency = <96000000>; }; }; + +&mmc1 { + pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; + pinctrl-0 = <&mmc1_pins_default_no_clk_pu>; + pinctrl-1 = <&mmc1_pins_hs>; + pinctrl-2 = <&mmc1_pins_default>; + pinctrl-3 = <&mmc1_pins_hs>; + pinctrl-4 = <&mmc1_pins_sdr50>; + pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_conf>; + pinctrl-6 = <&mmc1_pins_ddr50 &mmc1_iodelay_sdr104_conf>; +}; + +&mmc2 { + pinctrl-names = "default", "hs", "ddr_1_8v"; + pinctrl-0 = <&mmc2_pins_default>; + pinctrl-1 = <&mmc2_pins_default>; + pinctrl-2 = <&mmc2_pins_default>; +};
Signature · 1 line
2.17.0
PATCH v4 7/14 ARM: dts: am57xx-beagle-x15/am57xx-idk: Fix pinctrl-names
In reply to Kishon Vijay Abraham IThe IO lines of MMC2 in am57xx-beagle-x15/am57xx-idk is connected to 3.3v. Use "ddr_3_3v" instead of "ddr_1_8v" to indicate DDR mode works in 3.3v on these boards.
--- arch/arm/boot/dts/am571x-idk.dts | 2 +- arch/arm/boot/dts/am572x-idk.dts | 2 +- arch/arm/boot/dts/am574x-idk.dts | 2 +- arch/arm/boot/dts/am57xx-beagle-x15.dts | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-)
arch/arm/boot/dts/am571x-idk.dts +1 -1
@@ -113,7 +113,7 @@ }; &mmc2 { - pinctrl-names = "default", "hs", "ddr_1_8v"; + pinctrl-names = "default", "hs", "ddr_3_3v"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
arch/arm/boot/dts/am572x-idk.dts +1 -1
@@ -31,7 +31,7 @@ }; &mmc2 { - pinctrl-names = "default", "hs", "ddr_1_8v"; + pinctrl-names = "default", "hs", "ddr_3_3v"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_rev20>;
arch/arm/boot/dts/am574x-idk.dts +1 -1
@@ -35,7 +35,7 @@ }; &mmc2 { - pinctrl-names = "default", "hs", "ddr_1_8v"; + pinctrl-names = "default", "hs", "ddr_3_3v"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_default>; pinctrl-2 = <&mmc2_pins_default>;
arch/arm/boot/dts/am57xx-beagle-x15.dts +1 -1
@@ -28,7 +28,7 @@ }; &mmc2 { - pinctrl-names = "default", "hs", "ddr_1_8v"; + pinctrl-names = "default", "hs", "ddr_3_3v"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_3_3v_rev11 &mmc2_iodelay_ddr_3_3v_rev11_conf>;
Signature · 1 line
2.17.0
PATCH v4 8/14 ARM: dts: dra72-evm-common: Add wilink8 wlan support
In reply to Kishon Vijay Abraham IFrom: Hari Nagalla <[email protected]>
Wilink8 module is a combo wireless connectivity card based on Texas Instrument's wl18xx solution.
Add support for the wlan capabilities of this module by muxing the relevant mmc lines, and setting the required device-tree data.
[[email protected]: drop WLAN_EN pinmux. It should be done by bootloader.
Also, some commit message adjustments]
--- arch/arm/boot/dts/dra72-evm-common.dtsi | 42 +++++++++++++++++++++++ arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi | 11 ++++++ 2 files changed, 53 insertions(+)
arch/arm/boot/dts/dra72-evm-common.dtsi +42 -0
@@ -44,6 +44,16 @@ regulator-boot-on; }; + evm_3v6: fixedregulator-evm_3v6 { + compatible = "regulator-fixed"; + regulator-name = "evm_3v6"; + regulator-min-microvolt = <3600000>; + regulator-max-microvolt = <3600000>; + vin-supply = <&evm_5v0>; + regulator-always-on; + regulator-boot-on; + }; + vsys_3v3: fixedregulator-vsys3v3 { /* Output 2 of TPS43351QDAPRQ1 on dra72-evm */ /* Output 2 of LM5140QRWGTQ1 on dra71-evm */
@@ -171,6 +181,15 @@ clocks = <&atl_clkin2_ck>; }; }; + + vmmcwl_fixed: fixedregulator-mmcwl { + compatible = "regulator-fixed"; + regulator-name = "vmmcwl_fixed"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio5 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &dra7_pmx_core {
@@ -398,6 +417,29 @@ max-frequency = <192000000>; }; +&mmc4 { + status = "okay"; + vmmc-supply = <&evm_3v6>; + vqmmc-supply = <&vmmcwl_fixed>; + bus-width = <4>; + cap-power-off-card; + keep-power-in-suspend; + non-removable; + pinctrl-names = "default", "hs", "sdr12", "sdr25"; + pinctrl-0 = <&mmc4_pins_default>; + pinctrl-1 = <&mmc4_pins_default>; + pinctrl-2 = <&mmc4_pins_default>; + pinctrl-3 = <&mmc4_pins_default>; + #address-cells = <1>; + #size-cells = <0>; + wifi@2 { + compatible = "ti,wl1835"; + reg = <2>; + interrupt-parent = <&gpio5>; + interrupts = <7 IRQ_TYPE_EDGE_RISING>; + }; +}; + &mac { status = "okay"; };
arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi +11 -0
@@ -202,6 +202,17 @@ DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ >; }; + + mmc4_pins_default: mmc4_pins_default { + pinctrl-single,pins = < + DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.mmc4_clk */ + DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */ + DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */ + DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_txd.mmc4_dat1 */ + DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */ + DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */ + >; + }; }; &dra7_iodelay_core {
Signature · 1 line
2.17.0
PATCH v4 9/14 ARM: dts: dra7-evm: Model EVM_3V6 regulator
In reply to Kishon Vijay Abraham IOn TI's DRA74x EVM, EVM_3V6 is connected is connected to the VBAT line of the wilink card. Model it here so that it can be used while adding wilink8 WLAN support.
--- arch/arm/boot/dts/dra7-evm.dts | 42 ++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+)
arch/arm/boot/dts/dra7-evm.dts +42 -0
@@ -20,6 +20,16 @@ reg = <0x0 0x80000000 0x0 0x60000000>; /* 1536 MB */ }; + evm_12v0: fixedregulator-evm_12v0 { + /* main supply */ + compatible = "regulator-fixed"; + regulator-name = "evm_12v0"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + regulator-boot-on; + }; + evm_1v8_sw: fixedregulator-evm_1v8 { compatible = "regulator-fixed"; regulator-name = "evm_1v8";
@@ -54,6 +64,38 @@ regulator-max-microvolt = <1800000>; }; + evm_3v3: fixedregulator-evm3v3 { + /* Output of Cntlr A of TPS43351-Q1 on dra7-evm */ + compatible = "regulator-fixed"; + regulator-name = "evm_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&evm_12v0>; + regulator-always-on; + regulator-boot-on; + }; + + evm_5v0: fixedregulator-evm_5v0 { + /* Output of Cntlr B of TPS43351-Q1 on dra7-evm */ + compatible = "regulator-fixed"; + regulator-name = "evm_5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&evm_12v0>; + regulator-always-on; + regulator-boot-on; + }; + + evm_3v6: fixedregulator-evm_3v6 { + compatible = "regulator-fixed"; + regulator-name = "evm_3v6"; + regulator-min-microvolt = <3600000>; + regulator-max-microvolt = <3600000>; + vin-supply = <&evm_5v0>; + regulator-always-on; + regulator-boot-on; + }; + extcon_usb2: extcon_usb2 { compatible = "linux,extcon-usb-gpio"; id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
Signature · 1 line
2.17.0
PATCH v4 10/14 ARM: dts: dra7-evm: Add wilink8 wlan support
In reply to Kishon Vijay Abraham IFrom: Hari Nagalla <[email protected]>
The wilink module is a combo wireless connectivity sdio card based on Texas Instrument's wl18xx solution. It is a 4-wire, 1.8V, embedded sdio wlan device with an external irq line and is power-controlled by a gpio-based fixed regulator.
Add pinmux configuration and IODelay values for MMC4. On dra7-evm, MMC4 is used for connecting to wilink module.
IODelay data credits to : Vishal Mahaveer <[email protected]> and Sekhar Nori <[email protected]>
--- arch/arm/boot/dts/dra7-evm-common.dtsi | 15 +++++++++++++++ arch/arm/boot/dts/dra7-evm.dts | 25 +++++++++++++++++++++++++ 2 files changed, 40 insertions(+)
arch/arm/boot/dts/dra7-evm-common.dtsi +15 -0
@@ -260,3 +260,18 @@ &pcie1_rc { status = "okay"; }; + +&mmc4 { + bus-width = <4>; + cap-power-off-card; + keep-power-in-suspend; + non-removable; + #address-cells = <1>; + #size-cells = <0>; + wifi@2 { + compatible = "ti,wl1835"; + reg = <2>; + interrupt-parent = <&gpio5>; + interrupts = <7 IRQ_TYPE_EDGE_RISING>; + }; +};
arch/arm/boot/dts/dra7-evm.dts +25 -0
@@ -96,6 +96,16 @@ regulator-boot-on; }; + vmmcwl_fixed: fixedregulator-mmcwl { + compatible = "regulator-fixed"; + regulator-name = "vmmcwl_fixed"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio5 8 0>; + startup-delay-us = <70000>; + enable-active-high; + }; + extcon_usb2: extcon_usb2 { compatible = "linux,extcon-usb-gpio"; id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
@@ -376,6 +386,21 @@ pinctrl-5 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>; }; +&mmc4 { + status = "okay"; + vmmc-supply = <&evm_3v6>; + vqmmc-supply = <&vmmcwl_fixed>; + pinctrl-names = "default-rev11", "default", "hs-rev11", "hs", "sdr12-rev11", "sdr12", "sdr25-rev11", "sdr25"; + pinctrl-0 = <&mmc4_pins_default &mmc4_iodelay_ds_rev11_conf>; + pinctrl-1 = <&mmc4_pins_default &mmc4_iodelay_ds_rev20_conf>; + pinctrl-2 = <&mmc4_pins_hs &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>; + pinctrl-3 = <&mmc4_pins_hs &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>; + pinctrl-4 = <&mmc4_pins_sdr12 &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>; + pinctrl-5 = <&mmc4_pins_sdr12 &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>; + pinctrl-6 = <&mmc4_pins_sdr25 &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>; + pinctrl-7 = <&mmc4_pins_sdr25 &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>; +}; + &cpu0 { vdd-supply = <&smps123_reg>; };
Signature · 1 line
2.17.0
PATCH v4 11/14 ARM: dts: dra76-evm: Add wilink8 wlan support
In reply to Kishon Vijay Abraham IFrom: Vishal Mahaveer <[email protected]>
Add support for WLAN using wilink8 module. On dra76-evm, MMC4 is used for connecting to wilink8 module.
--- arch/arm/boot/dts/dra76-evm.dts | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+)
arch/arm/boot/dts/dra76-evm.dts +31 -0
@@ -42,6 +42,16 @@ regulator-boot-on; }; + vio_3v6: fixedregulator-vio_3v6 { + compatible = "regulator-fixed"; + regulator-name = "vio_3v6"; + regulator-min-microvolt = <3600000>; + regulator-max-microvolt = <3600000>; + vin-supply = <&vsys_5v0>; + regulator-always-on; + regulator-boot-on; + }; + vsys_3v3: fixedregulator-vsys3v3 { /* Output of Cntlr A of TPS43351-Q1 on dra76-evm */ compatible = "regulator-fixed";
@@ -81,6 +91,16 @@ vin-supply = <&smps5_reg>; }; + vmmcwl_fixed: fixedregulator-mmcwl { + compatible = "regulator-fixed"; + regulator-name = "vmmcwl_fixed"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio5 8 0>; /* gpio5_8 */ + startup-delay-us = <70000>; + enable-active-high; + }; + vtt_fixed: fixedregulator-vtt { compatible = "regulator-fixed"; regulator-name = "vtt_fixed";
@@ -331,6 +351,17 @@ pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_conf>; }; +&mmc4 { + status = "okay"; + vmmc-supply = <&vio_3v6>; + vqmmc-supply = <&vmmcwl_fixed>; + pinctrl-names = "default", "hs", "sdr12", "sdr25"; + pinctrl-0 = <&mmc4_pins_hs &mmc4_iodelay_default_conf>; + pinctrl-1 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>; + pinctrl-2 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>; + pinctrl-3 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>; +}; + /* No RTC on this device */ &rtc { status = "disabled";
Signature · 1 line
2.17.0
PATCH v4 12/14 ARM: dts: dra7: Use sdhci-omap programming model
In reply to Kishon Vijay Abraham IUse sdhci-omap programming model based on the generic sdhci library for programming the eMMC/SD/SDIO controller.
--- .../boot/dts/am57xx-beagle-x15-common.dtsi | 4 +-- arch/arm/boot/dts/am57xx-beagle-x15.dts | 1 + arch/arm/boot/dts/am57xx-idk-common.dtsi | 3 ++- arch/arm/boot/dts/dra7-evm.dts | 1 + arch/arm/boot/dts/dra7.dtsi | 27 +++++++------------ arch/arm/boot/dts/dra72-evm-common.dtsi | 2 +- arch/arm/boot/dts/dra76-evm.dts | 3 ++- 7 files changed, 19 insertions(+), 22 deletions(-)
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +2 -2
@@ -444,8 +444,8 @@ vmmc-supply = <&vdd_3v3>; vqmmc-supply = <&vdd_3v3>; bus-width = <8>; - ti,non-removable; - cap-mmc-dual-data-rate; + non-removable; + no-1-8-v; }; &sata {
arch/arm/boot/dts/am57xx-beagle-x15.dts +1 -0
@@ -25,6 +25,7 @@ pinctrl-1 = <&mmc1_pins_hs>; vmmc-supply = <&ldo1_reg>; + no-1-8-v; }; &mmc2 {
arch/arm/boot/dts/am57xx-idk-common.dtsi +2 -1
@@ -412,8 +412,9 @@ vmmc-supply = <&v3_3d>; vqmmc-supply = <&v3_3d>; bus-width = <8>; - ti,non-removable; + non-removable; max-frequency = <96000000>; + no-1-8-v; }; &dcan1 {
arch/arm/boot/dts/dra7-evm.dts +1 -0
@@ -377,6 +377,7 @@ vmmc-supply = <&evm_1v8_sw>; vqmmc-supply = <&evm_1v8_sw>; bus-width = <8>; + non-removable; pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v", "hs200_1_8v-rev11", "hs200_1_8v"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>;
arch/arm/boot/dts/dra7.dtsi +10 -17
@@ -1079,14 +1079,10 @@ }; mmc1: mmc@4809c000 { - compatible = "ti,omap4-hsmmc"; + compatible = "ti,dra7-sdhci"; reg = <0x4809c000 0x400>; interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc1"; - ti,dual-volt; - ti,needs-special-reset; - dmas = <&sdma_xbar 61>, <&sdma_xbar 62>; - dma-names = "tx", "rx"; status = "disabled"; pbias-supply = <&pbias_mmc_reg>; max-frequency = <192000000>;
@@ -1100,40 +1096,37 @@ }; mmc2: mmc@480b4000 { - compatible = "ti,omap4-hsmmc"; + compatible = "ti,dra7-sdhci"; reg = <0x480b4000 0x400>; interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc2"; - ti,needs-special-reset; - dmas = <&sdma_xbar 47>, <&sdma_xbar 48>; - dma-names = "tx", "rx"; status = "disabled"; max-frequency = <192000000>; + /* SDR104/DDR50/SDR50 bits in CAPA2 is not supported */ + sdhci-caps-mask = <0x7 0x0>; }; mmc3: mmc@480ad000 { - compatible = "ti,omap4-hsmmc"; + compatible = "ti,dra7-sdhci"; reg = <0x480ad000 0x400>; interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc3"; - ti,needs-special-reset; - dmas = <&sdma_xbar 77>, <&sdma_xbar 78>; - dma-names = "tx", "rx"; status = "disabled"; /* Errata i887 limits max-frequency of MMC3 to 64 MHz */ max-frequency = <64000000>; + /* SDMA is not supported */ + sdhci-caps-mask = <0x0 0x400000>; }; mmc4: mmc@480d1000 { - compatible = "ti,omap4-hsmmc"; + compatible = "ti,dra7-sdhci"; reg = <0x480d1000 0x400>; interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc4"; - ti,needs-special-reset; - dmas = <&sdma_xbar 57>, <&sdma_xbar 58>; - dma-names = "tx", "rx"; status = "disabled"; max-frequency = <192000000>; + /* SDMA is not supported */ + sdhci-caps-mask = <0x0 0x400000>; }; mmu0_dsp1: mmu@40d01000 {
arch/arm/boot/dts/dra72-evm-common.dtsi +1 -1
@@ -413,7 +413,7 @@ pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins_default>; bus-width = <8>; - ti,non-removable; + non-removable; max-frequency = <192000000>; };
arch/arm/boot/dts/dra76-evm.dts +2 -1
@@ -327,7 +327,7 @@ &mmc1 { status = "okay"; vmmc-supply = <&vio_3v3_sd>; - vmmc_aux-supply = <&ldo4_reg>; + vqmmc-supply = <&ldo4_reg>; bus-width = <4>; /* * SDCD signal is not being used here - using the fact that GPIO mode
@@ -344,6 +344,7 @@ vmmc-supply = <&vio_1v8>; vqmmc-supply = <&vio_1v8>; bus-width = <8>; + non-removable; pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_default>;
Signature · 1 line
2.17.0
PATCH v4 13/14 ARM: dts: dra7: Add high speed modes capability to MMC1/MMC2 dt node
In reply to Kishon Vijay Abraham IWhile the supported UHS mode can be obtained from CAPA2 register, SD Host Controller Standard Specification doesn't define bits for MMC's HS200 and DDR mode capability. Add properties to indicate MMC HS200 and DDR speed mode capability in dt node.
--- arch/arm/boot/dts/dra7.dtsi | 5 +++++ 1 file changed, 5 insertions(+)
arch/arm/boot/dts/dra7.dtsi +5 -0
@@ -1086,6 +1086,8 @@ status = "disabled"; pbias-supply = <&pbias_mmc_reg>; max-frequency = <192000000>; + mmc-ddr-1_8v; + mmc-ddr-3_3v; }; hdqw1w: 1w@480b2000 {
@@ -1104,6 +1106,9 @@ max-frequency = <192000000>; /* SDR104/DDR50/SDR50 bits in CAPA2 is not supported */ sdhci-caps-mask = <0x7 0x0>; + mmc-hs200-1_8v; + mmc-ddr-1_8v; + mmc-ddr-3_3v; }; mmc3: mmc@480ad000 {
Signature · 1 line
2.17.0
PATCH v4 14/14 Documentation: ARM: Add new MMC requirements for DRA7/K2G
In reply to Kishon Vijay Abraham IQuoted 1 line
From 4.18 kernel, all the MMC controller instances in DRA7
are programmed using sdhci based driver (sdhci-omap.c). Document this new requirement here. Both omap2plus_defconfig and multi_v7_defconfig has CONFIG_MMC_SDHCI_OMAP enabled.
--- Documentation/arm/OMAP/README | 4 ++++ 1 file changed, 4 insertions(+)
Documentation/arm/OMAP/README +4 -0
@@ -5,3 +5,7 @@ KERNEL NEW DEPENDENCIES v4.3+ Update is needed for custom .config files to make sure CONFIG_REGULATOR_PBIAS is enabled for MMC1 to work properly. + +v4.18+ Update is needed for custom .config files to make sure + CONFIG_MMC_SDHCI_OMAP is enabled for all MMC instances + to work in DRA7 and K2G based boards.
Signature · 1 line
2.17.0
Quoted 8 lines · Kishon Vijay Abraham I
Changes from v3:
*) Addeddra7-mmc-iodelay.dtsito add a new pinctrl group for clk line
without pullup to be used for dra71-evm and am57xx-idk.
*) Rename wlcore node name to wifiThis series should be merged only after [1].
[1] -> https://marc.info/?l=linux-omap&m=152482966225758&w=2
Quoted 8 lines
This series:
*) Adds wilink wlan support (Now all MMC instances in DRA7 will use
sdhci-omap)
*) Add a new pinctrl group for clk line without pullup required for
UHS cards to work reliably.
*) Update README to make sure users update .config file from 4.18
kernel.
*) Use sdhci-omap programming model.
Applying this series into omap-for-v4.18/dt-sdhci on top of the immutable branch from Ulf.
Quoted 11 lines
In the "Use sdhci-omap programming model" patch, "ti,omap4-hsmmc" compatible is removed. This is because if both "ti,dra7-sdhci" and "ti,omap4-hsmmc" is added and if there is probe deferral in
sdhci_omapdriver, the device is binding toomap_hsmmcdriver.Once
omap_hsmmcandsdhci_omapdriver are feature identical,sdhci_omapdriver will be made to supportomap_hsmmcbinding (including "ti,omap4-hsmmc" compatible) andomap_hsmmcdriver will be removed. Till then dt nodes with "ti,omap4-hsmmc" compatible will useomap_hsmmcdriver and "ti,dra7-sdhci" compatible will usesdhci_omapdriver.
Great that sounds good to me :) This way we can test and enable it one SoC at a time.
Regards,
Tony