sunxi: add PWM driver for A64
Subsystems (3)
v3 cover sunxi: add PWM driver for A64
This series introduces a PWM driver for Allwinner A64.
This driver can be used to control backlight on Pinebook
Vasily Khoruzhick (2):
pwm: sunxi: add support for PWM found on Allwinner A64
dts: sunxi: add PWM node for sun50i
arch/arm/dts/sun50i-a64.dtsi | 8 ++ arch/arm/include/asm/arch-sunxi/gpio.h | 1 + arch/arm/include/asm/arch-sunxi/pwm.h | 12 ++ drivers/pwm/Kconfig | 7 + drivers/pwm/Makefile | 1 + drivers/pwm/sunxi_pwm.c | 175 +++++++++++++++++++++++++ 6 files changed, 204 insertions(+) create mode 100644 drivers/pwm/sunxi_pwm.c
Signature · 1 line
2.17.0
PATCH v3 1/2 pwm: sunxi: add support for PWM found on Allwinner A64
This commit adds basic support for PWM found on Allwinner A64. It can be used for pwm_backlight driver (e.g. for Pinebook)
--- arch/arm/include/asm/arch-sunxi/gpio.h | 1 + arch/arm/include/asm/arch-sunxi/pwm.h | 12 ++ drivers/pwm/Kconfig | 7 + drivers/pwm/Makefile | 1 + drivers/pwm/sunxi_pwm.c | 178 +++++++++++++++++++++++++ 5 files changed, 199 insertions(+) create mode 100644 drivers/pwm/sunxi_pwm.c
arch/arm/include/asm/arch-sunxi/gpio.h +1 -0
@@ -173,6 +173,7 @@ enum sunxi_gpio_number {#define SUN8I_GPD_SDC1 3#define SUNXI_GPD_LCD0 2#define SUNXI_GPD_LVDS0 3 +#define SUNXI_GPD_PWM 2#define SUN5I_GPE_SDC2 3#define SUN8I_GPE_TWI2 3
arch/arm/include/asm/arch-sunxi/pwm.h +12 -0
@@ -11,8 +11,15 @@#define SUNXI_PWM_CH0_PERIOD (SUNXI_PWM_BASE + 4)#define SUNXI_PWM_CTRL_PRESCALE0 (x) ((x) & 0xf) +#define SUNXI_PWM_CTRL_PRESCALE0_MASK 0xf#define SUNXI_PWM_CTRL_ENABLE0 (0x5 << 4)#define SUNXI_PWM_CTRL_POLARITY0 (x) ((x) << 5) +#define SUNXI_PWM_CTRL_CH0_ACT_STA BIT(5) +#define SUNXI_PWM_CTRL_CLK_GATE BIT(6) + +#define SUNXI_PWM_CH0_PERIOD_MAX (0xffff) +#define SUNXI_PWM_CH0_PERIOD_PRD (x) ((x & 0xffff) << 16) +#define SUNXI_PWM_CH0_PERIOD_DUTY (x) ((x) & 0xffff)#define SUNXI_PWM_PERIOD_80PCT 0x04af03c0
@@ -31,4 +38,9 @@#define SUNXI_PWM_MUX SUN8I_GPH_PWM#endif +struct sunxi_pwm { +u32 ctrl; +u32 ch0_period; +}; +#endif
drivers/pwm/Kconfig +7 -0
@@ -43,3 +43,10 @@ config PWM_TEGRA four channels with a programmable period and duty cycle. Only a 32KHz clock is supported by the driver but the duty cycle is configurable. + +config PWM_SUNXI + bool "Enable support for the Allwinner Sunxi PWM" + depends on DM_PWM + help + This PWM is found on H3, A64 and other Allwinner SoCs. It supports a + programmable period and duty cycle. A 16-bit counter is used.
drivers/pwm/Makefile +1 -0
@@ -17,3 +17,4 @@ obj-$(CONFIG_PWM_IMX) += pwm-imx.o pwm-imx-util.o obj-$(CONFIG_PWM_ROCKCHIP) += rk_pwm.o obj-$(CONFIG_PWM_SANDBOX) += sandbox_pwm.o obj-$(CONFIG_PWM_TEGRA) += tegra_pwm.o +obj-$(CONFIG_PWM_SUNXI) += sunxi_pwm.o
drivers/pwm/sunxi_pwm.c new file +178 -0
178 lines not on this page · raw message
Signature · 1 line
2.17.0
PATCH v3 1/2 pwm: sunxi: add support for PWM found on Allwinner A64
Hi,
Quoted 4 lines · Vasily Khoruzhick
drivers/pwm/sunxi_pwm.c new file +4
-0+static const struct udevice_id sunxi_pwm_ids[] = { + { .compatible ="allwinner,sun50i-a64-pwm" }, + { } +};
drivers/pwm/sunxi_pwm.c line 178
Quoted 10 lines
drivers/pwm/sunxi_pwm.c new file +10
-0+ +U_BOOT_DRIVER (sunxi_pwm) = { + .name ="sunxi_pwm" , + .id =UCLASS_PWM , + .of_match = sunxi_pwm_ids, + .ops = &sunxi_pwm_ops, + .ofdata_to_platdata = sunxi_pwm_ofdata_to_platdata, + .probe = sunxi_pwm_probe, + .priv_auto_alloc_size =sizeof (struct sunxi_pwm_priv ), +};
The binding should be the same one than used in Linux. Once that is fixed, for both patches,
Thanks!
Maxime
Signature · 10 lines
Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 833 bytes Desc: not available URL: <http://lists.denx.de/pipermail/u-boot/attachments/20180502/58a7172a/attachment.sig>
PATCH v3 1/2 pwm: sunxi: add support for PWM found on Allwinner A64
Hi,
Quoted 19 lines · On Wed, 2 May 2018 11:24:36 +0200 Maxime Ripard maxime.ripard at bootlin.com…
Hi,
Quoted 4 lines · Vasily Khoruzhick
drivers/pwm/sunxi_pwm.c new file +4
-0+static const struct udevice_id sunxi_pwm_ids[] = { + { .compatible ="allwinner,sun50i-a64-pwm" }, + { } +};drivers/pwm/sunxi_pwm.c line 178
Quoted 10 lines
drivers/pwm/sunxi_pwm.c new file +10
-0+ +U_BOOT_DRIVER (sunxi_pwm) = { + .name ="sunxi_pwm" , + .id =UCLASS_PWM , + .of_match = sunxi_pwm_ids, + .ops = &sunxi_pwm_ops, + .ofdata_to_platdata = sunxi_pwm_ofdata_to_platdata, + .probe = sunxi_pwm_probe, + .priv_auto_alloc_size =sizeof (struct sunxi_pwm_priv ), +};The binding should be the same one than used in Linux.
Linux (in next) uses "allwinner,sun50i-a64-pwm", "allwinner,sun5i-a13-pwm" binding, so please add "allwinner,sun5i-a13-pwm" here.
--
Anatolij
PATCH v3 2/2 dts: sunxi: add PWM node for sun50i
In reply to Vasily KhoruzhickAdd PWM definition to sun50i-a64.dtsi
--- arch/arm/dts/sun50i-a64.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)
arch/arm/dts/sun50i-a64.dtsi +8 -0
@@ -319,6 +319,14 @@ }; }; + pwm: pwm at 01c21400 { + compatible = "allwinner,sun50i-a64-pwm"; + reg = <0x01c21400 0x8>; + clocks = <&osc24M>; + #pwm-cells = <3>; + status = "disabled"; + }; + uart0: serial at 1c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>;
Signature · 1 line
2.17.0