ARM: dts: imx6ul: Add CAAM support
Subsystems (2)
Fabio Estevam
reviewerPATCH 1/1 ARM: dts: imx6ul: Add CAAM support
From: Fabio Estevam <[email protected]>
Add CAAM support on i.MX6UL.
Also, since CAAM is not available on i.MX6ULL the CAAM node needs to be deleted in the imx6ull.dtsi.
--- arch/arm/boot/dts/imx6ul.dtsi | 30 ++++++++++++++++++++++++++++++ arch/arm/boot/dts/imx6ull.dtsi | 2 ++ 2 files changed, 32 insertions(+)
arch/arm/boot/dts/imx6ul.dtsi +30 -0
@@ -769,6 +769,36 @@ reg = <0x02100000 0x100000>; ranges; + crypto: caam at 2140000 { + compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x2140000 0x3c000>; + ranges = <0 0x2140000 0x3c000>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6UL_CLK_CAAM_IPG>, <&clks IMX6UL_CLK_CAAM_ACLK>, + <&clks IMX6UL_CLK_CAAM_MEM>; + clock-names = "ipg", "aclk", "mem"; + + sec_jr0: jr0 at 1000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x1000 0x1000>; + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + }; + + sec_jr1: jr1 at 2000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x2000 0x1000>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + }; + + sec_jr2: jr2 at 3000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x3000 0x1000>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + usbotg1: usb at 2184000 { compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; reg = <0x02184000 0x200>;
arch/arm/boot/dts/imx6ull.dtsi +2 -0
@@ -45,6 +45,8 @@ /* Delete UART8 in AIPS-1 (i.MX6UL specific) */ /delete-node/ &uart8; +/* Delete CAAM node in AIPS-2 (i.MX6UL specific) */ +/delete-node/ &crypto; / { soc {
Signature · 1 line
2.7.4
PATCH 1/1 ARM: dts: imx6ul: Add CAAM support
Quoted 59 lines · Fabio Estevam
From: Fabio Estevam <[email protected]>
Add CAAM support on i.MX6UL.
Also, since CAAM is not available on i.MX6ULL the CAAM node needs to be deleted in the
imx6ull.dtsi.Signed-off-by Fabio Estevam <[email protected]>--- arch/arm/boot/dts/imx6ul.dtsi | 30 ++++++++++++++++++++++++++++++ arch/arm/boot/dts/imx6ull.dtsi | 2 ++ 2 files changed, 32 insertions(+)arch/arm/boot/dts/imx6ul.dtsi +30
-0@@ -769,6 +769,36 @@ reg = <0x02100000 0x100000>; ranges; + crypto: caam at 2140000 { + compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x2140000 0x3c000>; + ranges = <0 0x2140000 0x3c000>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6UL_CLK_CAAM_IPG>, <&clks IMX6UL_CLK_CAAM_ACLK>, + <&clks IMX6UL_CLK_CAAM_MEM>; + clock-names = "ipg", "aclk", "mem"; + + sec_jr0: jr0 at 1000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x1000 0x1000>; + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + }; + + sec_jr1: jr1 at 2000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x2000 0x1000>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + }; + + sec_jr2: jr2 at 3000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x3000 0x1000>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + usbotg1: usb at 2184000 { compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; reg = <0x02184000 0x200>;arch/arm/boot/dts/imx6ull.dtsi +0
-0
arch/arm/boot/dts/imx6ull.dtsi line 49
Quoted 5 lines
arch/arm/boot/dts/imx6ull.dtsi +2
-0@@ -45,6 +45,8 @@ /* Delete UART8 in AIPS-1 (i.MX6UL specific) */ /delete-node/ &uart8; +/* Delete CAAM node in AIPS-2 (i.MX6UL specific) */ +/delete-node/ &crypto;
This starts to get ugly if too much piles up. But I think we have almost all differences now. So I think its still ok.
--
Stefan
Quoted 3 lines
arch/arm/boot/dts/imx6ull.dtsi +0
-0/ { soc {
Shawn Guo
AppliedPATCH 1/1 ARM: dts: imx6ul: Add CAAM support
In reply to Fabio EstevamQuoted 8 lines · Fabio Estevam
From: Fabio Estevam <[email protected]>
Add CAAM support on i.MX6UL.
Also, since CAAM is not available on i.MX6ULL the CAAM node needs to be deleted in the
imx6ull.dtsi.Signed-off-by Fabio Estevam <[email protected]>
Applied, thanks.