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PCI/VMD: White list for fast interrupt handlers

PATCH Applied Keith Busch 4 participants 9 messages May 8, 2018 – Jun 28, 2018 PCI

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#0 lore raw

PATCH 1/1 PCI/VMD: White list for fast interrupt handlers

Devices with slow interrupt handlers are significantly harming performance when their interrupt vector is shared with a fast device. This patch creates a class code white list for devices with known fast interrupt handlers, and all other devices will share a single vector so they don't interfere with performance.

At the moment, only the NVM Express class code is on the list, but more may be added if VMD users desire to use other low-latency devices in these domains.

---
 drivers/pci/host/vmd.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)
drivers/pci/host/vmd.c +12 -1
index 930a8fa08bd6..f94f3e1d3470 100644
@@ -175,9 +175,20 @@ static struct vmd_irq_list *vmd_next_irq(struct vmd_dev *vmd, struct msi_desc *d
 	int i, best = 1;
 	unsigned long flags;
 
-	if (pci_is_bridge(msi_desc_to_pci_dev(desc)) || vmd->msix_count == 1)
+	if (vmd->msix_count == 1)
 		return &vmd->irqs[0];
 
+	/*
+	 * White list for fast-interrupt handlers. All others will share the
+	 * "slow" interrupt vector.
+	 */
+	switch (msi_desc_to_pci_dev(desc)->class) {
+	case PCI_CLASS_STORAGE_EXPRESS:
+		break;
+	default:
+		return &vmd->irqs[0];
+	}
+
 	raw_spin_lock_irqsave(&list_lock, flags);
 	for (i = 1; i < vmd->msix_count; i++)
 		if (vmd->irqs[i].count < vmd->irqs[best].count)
Signature · 1 line
2.14.3
#1 lore raw
Quoted 9 lines · Keith Busch

Devices with slow interrupt handlers are significantly harming performance when their interrupt vector is shared with a fast device. This patch creates a class code white list for devices with known fast interrupt handlers, and all other devices will share a single vector so they don't interfere with performance.

At the moment, only the NVM Express class code is on the list, but more may be added if VMD users desire to use other low-latency devices in these domains.

I think this is far too much of a hack. Just don't use VMD if your
care about performance.

#2 lore raw
Quoted 7 lines · Christoph Hellwig
Quoted 6 lines · Keith Busch

Devices with slow interrupt handlers are significantly harming performance when their interrupt vector is shared with a fast device. This patch creates a class code white list for devices with known fast interrupt handlers, and all other devices will share a single vector so they don't interfere with performance.

Quoted 6 lines
Quoted 3 lines

At the moment, only the NVM Express class code is on the list, but more may be added if VMD users desire to use other low-latency devices in these domains.

I think this is far too much of a hack. Just don't use VMD if your
care about performance.

I'm not aware of an easier way you can direct-assign an entire PCIe domain to a virtual machine. :)

#3 lore raw
Quoted 18 lines · Keith Busch
Quoted 17 lines · Christoph Hellwig
Quoted 15 lines · Keith Busch

Devices with slow interrupt handlers are significantly harming performance
when their interrupt vector is shared with a fast device. This patch
creates a class code white list for devices with known fast interrupt
handlers, and all other devices will share a single vector so they don't
interfere with performance.

At the moment, only the NVM Express class code is on the list, but more
may be added if VMD users desire to use other low-latency devices in
these domains.

Quoted 7 lines
Quoted 3 lines

I think this is far too much of a hack. Just don't use VMD if
your
care about performance.

I'm not aware of an easier way you can direct-assign an entire PCIe domain
to a virtual machine. :)

It's fine with me

#4 lore raw

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#5 lore raw
Quoted 31 lines · Jonathan

+Lorenzo

Quoted 28 lines · Jonathan Derrick
Quoted 26 lines · Keith Busch
Quoted 18 lines · Christoph Hellwig
Quoted 10 lines · Keith Busch

Devices with slow interrupt handlers are significantly harming performance
when their interrupt vector is shared with a fast device. This patch
creates a class code white list for devices with known fast interrupt
handlers, and all other devices will share a single vector so they don't
interfere with performance.

Quoted 6 lines

At the moment, only the NVM Express class code is on the list, but more
may be added if VMD users desire to use other low-latency devices
in
these domains.

Quoted 3 lines

I think this is far too much of a hack. Just don't use VMD if
your
care about performance.

I'm not aware of an easier way you can direct-assign an entire PCIe domain
to a virtual machine. :)

Quoted 8 lines
Quoted 3 lines

It's fine with me

We've seen this actually fix an issue with one vendor's multi-function switch.
I'd like to see it get into 4.18 if possible

Sorry for the delay in getting back to this.

It seems like Christoph is not too happy about this patch, it is your code so I would apply it unless there is a cleaner alternative so please do let me know.

Thanks,
Lorenzo

#6 lore raw
Quoted 9 lines · Lorenzo Pieralisi
Quoted 2 lines · Jonathan

We've seen this actually fix an issue with one vendor's multi-function switch. I'd like to see it get into 4.18 if possible

Sorry for the delay in getting back to this.

It seems like Christoph is not too happy about this patch, it is your code so I would apply it unless there is a cleaner alternative so please do let me know.

VMD hardware really relies on the host software to bring all the logic, and it was intended to prioritize PCIe attached storage. The patch just captures that intention, so yes please, let's queue this up.

I understands Christoph's lack of enthusiasm for this, but at least this isn't a PCIe HBA with proprietary interfaces and firmware. :)

#7 lore raw
Quoted 11 lines · Keith Busch
Quoted 9 lines · Lorenzo Pieralisi
Quoted 2 lines · Jonathan

We've seen this actually fix an issue with one vendor's multi-function switch. I'd like to see it get into 4.18 if possible

Sorry for the delay in getting back to this.

It seems like Christoph is not too happy about this patch, it is your code so I would apply it unless there is a cleaner alternative so please do let me know.

Quoted 6 lines

VMD hardware really relies on the host software to bring all the logic, and it was intended to prioritize PCIe attached storage. The patch just captures that intention, so yes please, let's queue this up.

I understands Christoph's lack of enthusiasm for this, but at least this isn't a PCIe HBA with proprietary interfaces and firmware. :)

Applied to pci/vmd with a slightly updated changelog, thanks.

Lorenzo

#8 lore raw
In reply to Keith Busch
Quoted 2 lines · Keith Busch

I'm not aware of an easier way you can direct-assign an entire PCIe domain to a virtual machine. :)

libvirt will handle it just fine for you.