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ARM: dts: imx6/7: Remove unit-address from anatop regulators

PATCH Superseded Fabio Estevam 3 participants 5 messages May 14, 2018 – May 20, 2018

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Fabio Estevam

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PATCH v2 1/1 ARM: dts: imx6/7: Remove unit-address from anatop regulators

From: Fabio Estevam <[email protected]>

Remove unit-address and reg property from anatop regulators to fix the following DTC warnings with W=1:

arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddcore at 20c8140: duplicate unit-address (also used in node /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddpu at 20c8140) arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddcore at 20c8140: duplicate unit-address (also used in node /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddsoc at 20c8140) arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddpu at 20c8140: duplicate unit-address (also used in node /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddsoc at 20c8140)

---
Changes since v1:
- Send it is a standalone patch instead of a patch series.

 arch/arm/boot/dts/imx6qdl.dtsi | 20 ++++++--------------
 arch/arm/boot/dts/imx6sl.dtsi  | 20 ++++++--------------
 arch/arm/boot/dts/imx6sx.dtsi  | 20 ++++++--------------
 arch/arm/boot/dts/imx6ul.dtsi  | 11 +++--------
 arch/arm/boot/dts/imx7s.dtsi   |  8 ++------
 5 files changed, 23 insertions(+), 56 deletions(-)
arch/arm/boot/dts/imx6qdl.dtsi +6 -14
index 69648e2..22942dd 100644
@@ -692,11 +692,8 @@
 				interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
 					     <0 54 IRQ_TYPE_LEVEL_HIGH>,
 					     <0 127 IRQ_TYPE_LEVEL_HIGH>;
-				#address-cells = <1>;
-				#size-cells = <0>;
 
-				regulator-1p1 at 20c8110 {
-					reg = <0x20c8110>;
+				regulator-1p1 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd1p1";
 					regulator-min-microvolt = <1000000>;
@@ -711,8 +708,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				regulator-3p0 at 20c8120 {
-					reg = <0x20c8120>;
+				regulator-3p0 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd3p0";
 					regulator-min-microvolt = <2800000>;
@@ -727,8 +723,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				regulator-2p5 at 20c8130 {
-					reg = <0x20c8130>;
+				regulator-2p5 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd2p5";
 					regulator-min-microvolt = <2250000>;
@@ -743,8 +738,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				reg_arm: regulator-vddcore at 20c8140 {
-					reg = <0x20c8140>;
+				reg_arm: regulator-vddcore {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddarm";
 					regulator-min-microvolt = <725000>;
@@ -761,8 +755,7 @@
 					anatop-max-voltage = <1450000>;
 				};
 
-				reg_pu: regulator-vddpu at 20c8140 {
-					reg = <0x20c8140>;
+				reg_pu: regulator-vddpu {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddpu";
 					regulator-min-microvolt = <725000>;
@@ -779,8 +772,7 @@
 					anatop-max-voltage = <1450000>;
 				};
 
-				reg_soc: regulator-vddsoc at 20c8140 {
-					reg = <0x20c8140>;
+				reg_soc: regulator-vddsoc {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddsoc";
 					regulator-min-microvolt = <725000>;
arch/arm/boot/dts/imx6sl.dtsi +6 -14
index 2002db2..8c838ba 100644
@@ -524,11 +524,8 @@
 				interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
 					     <0 54 IRQ_TYPE_LEVEL_HIGH>,
 					     <0 127 IRQ_TYPE_LEVEL_HIGH>;
-				#address-cells = <1>;
-				#size-cells = <0>;
 
-				regulator-1p1 at 20c8110 {
-					reg = <0x20c8110>;
+				regulator-1p1 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd1p1";
 					regulator-min-microvolt = <800000>;
@@ -543,8 +540,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				regulator-3p0 at 20c8120 {
-					reg = <0x20c8120>;
+				regulator-3p0 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd3p0";
 					regulator-min-microvolt = <2800000>;
@@ -559,8 +555,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				regulator-2p5 at 20c8130 {
-					reg = <0x20c8130>;
+				regulator-2p5 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd2p5";
 					regulator-min-microvolt = <2100000>;
@@ -575,8 +570,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				reg_arm: regulator-vddcore at 20c8140 {
-					reg = <0x20c8140>;
+				reg_arm: regulator-vddcore {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddarm";
 					regulator-min-microvolt = <725000>;
@@ -593,8 +587,7 @@
 					anatop-max-voltage = <1450000>;
 				};
 
-				reg_pu: regulator-vddpu at 20c8140 {
-					reg = <0x20c8140>;
+				reg_pu: regulator-vddpu {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddpu";
 					regulator-min-microvolt = <725000>;
@@ -611,8 +604,7 @@
 					anatop-max-voltage = <1450000>;
 				};
 
-				reg_soc: regulator-vddsoc at 20c8140 {
-					reg = <0x20c8140>;
+				reg_soc: regulator-vddsoc {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddsoc";
 					regulator-min-microvolt = <725000>;
arch/arm/boot/dts/imx6sx.dtsi +6 -14
index 7e463d2..4a97513 100644
@@ -591,11 +591,8 @@
 				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
-				#address-cells = <1>;
-				#size-cells = <0>;
 
-				regulator-1p1 at 20c8110 {
-					reg = <0x20c8110>;
+				regulator-1p1 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd1p1";
 					regulator-min-microvolt = <800000>;
@@ -610,8 +607,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				regulator-3p0 at 20c8120 {
-					reg = <0x20c8120>;
+				regulator-3p0 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd3p0";
 					regulator-min-microvolt = <2800000>;
@@ -626,8 +622,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				regulator-2p5 at 20c8130 {
-					reg = <0x20c8130>;
+				regulator-2p5 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd2p5";
 					regulator-min-microvolt = <2100000>;
@@ -642,8 +637,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				reg_arm: regulator-vddcore at 20c8140 {
-					reg = <0x20c8140>;
+				reg_arm: regulator-vddcore {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddarm";
 					regulator-min-microvolt = <725000>;
@@ -660,8 +654,7 @@
 					anatop-max-voltage = <1450000>;
 				};
 
-				reg_pcie: regulator-vddpcie at 20c8140 {
-					reg = <0x20c8140>;
+				reg_pcie: regulator-vddpcie {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddpcie";
 					regulator-min-microvolt = <725000>;
@@ -677,8 +670,7 @@
 					anatop-max-voltage = <1450000>;
 				};
 
-				reg_soc: regulator-vddsoc at 20c8140 {
-					reg = <0x20c8140>;
+				reg_soc: regulator-vddsoc {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddsoc";
 					regulator-min-microvolt = <725000>;
arch/arm/boot/dts/imx6ul.dtsi +3 -8
index 2b854d1..1818b6c 100644
@@ -551,11 +551,8 @@
 				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
-				#address-cells = <1>;
-				#size-cells = <0>;
 
-				reg_3p0: regulator-3p0 at 20c8110 {
-					reg = <0x20c8110>;
+				reg_3p0: regulator-3p0 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd3p0";
 					regulator-min-microvolt = <2625000>;
@@ -569,8 +566,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				reg_arm: regulator-vddcore at 20c8140 {
-					reg = <0x20c8140>;
+				reg_arm: regulator-vddcore {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "cpu";
 					regulator-min-microvolt = <725000>;
@@ -587,8 +583,7 @@
 					anatop-max-voltage = <1450000>;
 				};
 
-				reg_soc: regulator-vddsoc at 20c8140 {
-					reg = <0x20c8140>;
+				reg_soc: regulator-vddsoc {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddsoc";
 					regulator-min-microvolt = <725000>;
arch/arm/boot/dts/imx7s.dtsi +2 -6
index b416d2b..99f92ec 100644
@@ -557,11 +557,8 @@
 				reg = <0x30360000 0x10000>;
 				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 					<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
-				#address-cells = <1>;
-				#size-cells = <0>;
 
-				reg_1p0d: regulator-vdd1p0d at 30360210 {
-					reg = <0x30360210>;
+				reg_1p0d: regulator-vdd1p0d {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd1p0d";
 					regulator-min-microvolt = <800000>;
@@ -575,8 +572,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				reg_1p2: regulator-vdd1p2 at 30360220 {
-					reg = <0x30360220>;
+				reg_1p2: regulator-vdd1p2 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd1p2";
 					regulator-min-microvolt = <1100000>;
Signature · 1 line
2.7.4
#1 lore raw
Quoted 26 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

Remove unit-address and reg property from anatop regulators to fix the following DTC warnings with W=1:

arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddcore@20c8140: duplicate unit-address (also used in node /soc/aips-bus@2000000/anatop@20c8000/regulator-vddpu@20c8140) arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddcore@20c8140: duplicate unit-address (also used in node /soc/aips-bus@2000000/anatop@20c8000/regulator-vddsoc@20c8140) arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddpu@20c8140: duplicate unit-address (also used in node /soc/aips-bus@2000000/anatop@20c8000/regulator-vddsoc@20c8140)

---
Changes since v1:
- Send it is a standalone patch instead of a patch series.

 arch/arm/boot/dts/imx6qdl.dtsi | 20 ++++++--------------
 arch/arm/boot/dts/imx6sl.dtsi  | 20 ++++++--------------
 arch/arm/boot/dts/imx6sx.dtsi  | 20 ++++++--------------
 arch/arm/boot/dts/imx6ul.dtsi  | 11 +++--------
 arch/arm/boot/dts/imx7s.dtsi   |  8 ++------
 5 files changed, 23 insertions(+), 56 deletions(-)
arch/arm/boot/dts/imx6qdl.dtsi +0 -0
index 69648e2..22942dd 100644

arch/arm/boot/dts/imx6qdl.dtsi line 696

Quoted 9 lines
arch/arm/boot/dts/imx6qdl.dtsi +1 -4
@@ -692,11 +692,8 @@
                                interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
                                             <0 54 IRQ_TYPE_LEVEL_HIGH>,
                                             <0 127 IRQ_TYPE_LEVEL_HIGH>;
-                               #address-cells = <1>;
-                               #size-cells = <0>;
 
-                               regulator-1p1@20c8110 {
-                                       reg = <0x20c8110>;
+                               regulator-1p1 {

This could break any users dependent on

Quoted 254 lines
arch/arm/boot/dts/imx6qdl.dtsi +5 -10
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd1p1";
                                        regulator-min-microvolt = <1000000>;
@@ -711,8 +708,7 @@
                                        anatop-enable-bit = <0>;
                                };
 
-                               regulator-3p0@20c8120 {
-                                       reg = <0x20c8120>;
+                               regulator-3p0 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd3p0";
                                        regulator-min-microvolt = <2800000>;
@@ -727,8 +723,7 @@
                                        anatop-enable-bit = <0>;
                                };
 
-                               regulator-2p5@20c8130 {
-                                       reg = <0x20c8130>;
+                               regulator-2p5 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd2p5";
                                        regulator-min-microvolt = <2250000>;
@@ -743,8 +738,7 @@
                                        anatop-enable-bit = <0>;
                                };
 
-                               reg_arm: regulator-vddcore@20c8140 {
-                                       reg = <0x20c8140>;
+                               reg_arm: regulator-vddcore {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vddarm";
                                        regulator-min-microvolt = <725000>;
@@ -761,8 +755,7 @@
                                        anatop-max-voltage = <1450000>;
                                };
 
-                               reg_pu: regulator-vddpu@20c8140 {
-                                       reg = <0x20c8140>;
+                               reg_pu: regulator-vddpu {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vddpu";
                                        regulator-min-microvolt = <725000>;
@@ -779,8 +772,7 @@
                                        anatop-max-voltage = <1450000>;
                                };
 
-                               reg_soc: regulator-vddsoc@20c8140 {
-                                       reg = <0x20c8140>;
+                               reg_soc: regulator-vddsoc {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vddsoc";
                                        regulator-min-microvolt = <725000>;
arch/arm/boot/dts/imx6sl.dtsi +6 -14
index 2002db2..8c838ba 100644
@@ -524,11 +524,8 @@
                                interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
                                             <0 54 IRQ_TYPE_LEVEL_HIGH>,
                                             <0 127 IRQ_TYPE_LEVEL_HIGH>;
-                               #address-cells = <1>;
-                               #size-cells = <0>;
 
-                               regulator-1p1@20c8110 {
-                                       reg = <0x20c8110>;
+                               regulator-1p1 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd1p1";
                                        regulator-min-microvolt = <800000>;
@@ -543,8 +540,7 @@
                                        anatop-enable-bit = <0>;
                                };
 
-                               regulator-3p0@20c8120 {
-                                       reg = <0x20c8120>;
+                               regulator-3p0 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd3p0";
                                        regulator-min-microvolt = <2800000>;
@@ -559,8 +555,7 @@
                                        anatop-enable-bit = <0>;
                                };
 
-                               regulator-2p5@20c8130 {
-                                       reg = <0x20c8130>;
+                               regulator-2p5 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd2p5";
                                        regulator-min-microvolt = <2100000>;
@@ -575,8 +570,7 @@
                                        anatop-enable-bit = <0>;
                                };
 
-                               reg_arm: regulator-vddcore@20c8140 {
-                                       reg = <0x20c8140>;
+                               reg_arm: regulator-vddcore {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vddarm";
                                        regulator-min-microvolt = <725000>;
@@ -593,8 +587,7 @@
                                        anatop-max-voltage = <1450000>;
                                };
 
-                               reg_pu: regulator-vddpu@20c8140 {
-                                       reg = <0x20c8140>;
+                               reg_pu: regulator-vddpu {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vddpu";
                                        regulator-min-microvolt = <725000>;
@@ -611,8 +604,7 @@
                                        anatop-max-voltage = <1450000>;
                                };
 
-                               reg_soc: regulator-vddsoc@20c8140 {
-                                       reg = <0x20c8140>;
+                               reg_soc: regulator-vddsoc {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vddsoc";
                                        regulator-min-microvolt = <725000>;
arch/arm/boot/dts/imx6sx.dtsi +6 -14
index 7e463d2..4a97513 100644
@@ -591,11 +591,8 @@
                                interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
-                               #address-cells = <1>;
-                               #size-cells = <0>;
 
-                               regulator-1p1@20c8110 {
-                                       reg = <0x20c8110>;
+                               regulator-1p1 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd1p1";
                                        regulator-min-microvolt = <800000>;
@@ -610,8 +607,7 @@
                                        anatop-enable-bit = <0>;
                                };
 
-                               regulator-3p0@20c8120 {
-                                       reg = <0x20c8120>;
+                               regulator-3p0 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd3p0";
                                        regulator-min-microvolt = <2800000>;
@@ -626,8 +622,7 @@
                                        anatop-enable-bit = <0>;
                                };
 
-                               regulator-2p5@20c8130 {
-                                       reg = <0x20c8130>;
+                               regulator-2p5 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd2p5";
                                        regulator-min-microvolt = <2100000>;
@@ -642,8 +637,7 @@
                                        anatop-enable-bit = <0>;
                                };
 
-                               reg_arm: regulator-vddcore@20c8140 {
-                                       reg = <0x20c8140>;
+                               reg_arm: regulator-vddcore {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vddarm";
                                        regulator-min-microvolt = <725000>;
@@ -660,8 +654,7 @@
                                        anatop-max-voltage = <1450000>;
                                };
 
-                               reg_pcie: regulator-vddpcie@20c8140 {
-                                       reg = <0x20c8140>;
+                               reg_pcie: regulator-vddpcie {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vddpcie";
                                        regulator-min-microvolt = <725000>;
@@ -677,8 +670,7 @@
                                        anatop-max-voltage = <1450000>;
                                };
 
-                               reg_soc: regulator-vddsoc@20c8140 {
-                                       reg = <0x20c8140>;
+                               reg_soc: regulator-vddsoc {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vddsoc";
                                        regulator-min-microvolt = <725000>;
arch/arm/boot/dts/imx6ul.dtsi +3 -8
index 2b854d1..1818b6c 100644
@@ -551,11 +551,8 @@
                                interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
-                               #address-cells = <1>;
-                               #size-cells = <0>;
 
-                               reg_3p0: regulator-3p0@20c8110 {
-                                       reg = <0x20c8110>;
+                               reg_3p0: regulator-3p0 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd3p0";
                                        regulator-min-microvolt = <2625000>;
@@ -569,8 +566,7 @@
                                        anatop-enable-bit = <0>;
                                };
 
-                               reg_arm: regulator-vddcore@20c8140 {
-                                       reg = <0x20c8140>;
+                               reg_arm: regulator-vddcore {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "cpu";
                                        regulator-min-microvolt = <725000>;
@@ -587,8 +583,7 @@
                                        anatop-max-voltage = <1450000>;
                                };
 
-                               reg_soc: regulator-vddsoc@20c8140 {
-                                       reg = <0x20c8140>;
+                               reg_soc: regulator-vddsoc {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vddsoc";
                                        regulator-min-microvolt = <725000>;
arch/arm/boot/dts/imx7s.dtsi +2 -7
index b416d2b..99f92ec 100644
@@ -557,11 +557,8 @@
                                reg = <0x30360000 0x10000>;
                                interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
                                        <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
-                               #address-cells = <1>;
-                               #size-cells = <0>;
 
-                               reg_1p0d: regulator-vdd1p0d@30360210 {
-                                       reg = <0x30360210>;
+                               reg_1p0d: regulator-vdd1p0d {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd1p0d";
                                        regulator-min-microvolt = <800000>;
@@ -575,8 +572,7 @@
                                        anatop-enable-bit = <0>;
                                };
 
-                               reg_1p2: regulator-vdd1p2@30360220 {
-                                       reg = <0x30360220>;
+                               reg_1p2: regulator-vdd1p2 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd1p2";
                                        regulator-min-microvolt = <1100000>;
--

2.7.4

#2 lore raw

PATCH v2 1/1 ARM: dts: imx6/7: Remove unit-address from anatop regulators

In reply to Fabio Estevam
Quoted 10 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

Remove unit-address and reg property from anatop regulators to fix the following DTC warnings with W=1:

arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddcore at 20c8140: duplicate unit-address (also used in node /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddpu at 20c8140) arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddcore at 20c8140: duplicate unit-address (also used in node /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddsoc at 20c8140) arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddpu at 20c8140: duplicate unit-address (also used in node /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddsoc at 20c8140)

Quoted 8 lines

---
Changes since v1:
- Send it is a standalone patch instead of a patch series.

 arch/arm/boot/dts/imx6qdl.dtsi | 20 ++++++--------------
 arch/arm/boot/dts/imx6sl.dtsi  | 20 ++++++--------------
 arch/arm/boot/dts/imx6sx.dtsi  | 20 ++++++--------------
 arch/arm/boot/dts/imx6ul.dtsi  | 11 +++--------

I'm a bit confused. It looks that the change is just to revert commit 685e1321ba74 ("ARM: dts: imx6: Add unit address and reg for the anatop nodes"). But what about the simple_bus_reg warning the commit was fixing?

Shawn

Quoted 271 lines
 arch/arm/boot/dts/imx7s.dtsi   |  8 ++------
 5 files changed, 23 insertions(+), 56 deletions(-)
arch/arm/boot/dts/imx6qdl.dtsi +6 -14
index 69648e2..22942dd 100644
@@ -692,11 +692,8 @@
 				interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
 					     <0 54 IRQ_TYPE_LEVEL_HIGH>,
 					     <0 127 IRQ_TYPE_LEVEL_HIGH>;
-				#address-cells = <1>;
-				#size-cells = <0>;
 
-				regulator-1p1 at 20c8110 {
-					reg = <0x20c8110>;
+				regulator-1p1 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd1p1";
 					regulator-min-microvolt = <1000000>;
@@ -711,8 +708,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				regulator-3p0 at 20c8120 {
-					reg = <0x20c8120>;
+				regulator-3p0 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd3p0";
 					regulator-min-microvolt = <2800000>;
@@ -727,8 +723,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				regulator-2p5 at 20c8130 {
-					reg = <0x20c8130>;
+				regulator-2p5 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd2p5";
 					regulator-min-microvolt = <2250000>;
@@ -743,8 +738,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				reg_arm: regulator-vddcore at 20c8140 {
-					reg = <0x20c8140>;
+				reg_arm: regulator-vddcore {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddarm";
 					regulator-min-microvolt = <725000>;
@@ -761,8 +755,7 @@
 					anatop-max-voltage = <1450000>;
 				};
 
-				reg_pu: regulator-vddpu at 20c8140 {
-					reg = <0x20c8140>;
+				reg_pu: regulator-vddpu {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddpu";
 					regulator-min-microvolt = <725000>;
@@ -779,8 +772,7 @@
 					anatop-max-voltage = <1450000>;
 				};
 
-				reg_soc: regulator-vddsoc at 20c8140 {
-					reg = <0x20c8140>;
+				reg_soc: regulator-vddsoc {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddsoc";
 					regulator-min-microvolt = <725000>;
arch/arm/boot/dts/imx6sl.dtsi +6 -14
index 2002db2..8c838ba 100644
@@ -524,11 +524,8 @@
 				interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
 					     <0 54 IRQ_TYPE_LEVEL_HIGH>,
 					     <0 127 IRQ_TYPE_LEVEL_HIGH>;
-				#address-cells = <1>;
-				#size-cells = <0>;
 
-				regulator-1p1 at 20c8110 {
-					reg = <0x20c8110>;
+				regulator-1p1 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd1p1";
 					regulator-min-microvolt = <800000>;
@@ -543,8 +540,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				regulator-3p0 at 20c8120 {
-					reg = <0x20c8120>;
+				regulator-3p0 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd3p0";
 					regulator-min-microvolt = <2800000>;
@@ -559,8 +555,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				regulator-2p5 at 20c8130 {
-					reg = <0x20c8130>;
+				regulator-2p5 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd2p5";
 					regulator-min-microvolt = <2100000>;
@@ -575,8 +570,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				reg_arm: regulator-vddcore at 20c8140 {
-					reg = <0x20c8140>;
+				reg_arm: regulator-vddcore {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddarm";
 					regulator-min-microvolt = <725000>;
@@ -593,8 +587,7 @@
 					anatop-max-voltage = <1450000>;
 				};
 
-				reg_pu: regulator-vddpu at 20c8140 {
-					reg = <0x20c8140>;
+				reg_pu: regulator-vddpu {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddpu";
 					regulator-min-microvolt = <725000>;
@@ -611,8 +604,7 @@
 					anatop-max-voltage = <1450000>;
 				};
 
-				reg_soc: regulator-vddsoc at 20c8140 {
-					reg = <0x20c8140>;
+				reg_soc: regulator-vddsoc {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddsoc";
 					regulator-min-microvolt = <725000>;
arch/arm/boot/dts/imx6sx.dtsi +6 -14
index 7e463d2..4a97513 100644
@@ -591,11 +591,8 @@
 				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
-				#address-cells = <1>;
-				#size-cells = <0>;
 
-				regulator-1p1 at 20c8110 {
-					reg = <0x20c8110>;
+				regulator-1p1 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd1p1";
 					regulator-min-microvolt = <800000>;
@@ -610,8 +607,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				regulator-3p0 at 20c8120 {
-					reg = <0x20c8120>;
+				regulator-3p0 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd3p0";
 					regulator-min-microvolt = <2800000>;
@@ -626,8 +622,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				regulator-2p5 at 20c8130 {
-					reg = <0x20c8130>;
+				regulator-2p5 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd2p5";
 					regulator-min-microvolt = <2100000>;
@@ -642,8 +637,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				reg_arm: regulator-vddcore at 20c8140 {
-					reg = <0x20c8140>;
+				reg_arm: regulator-vddcore {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddarm";
 					regulator-min-microvolt = <725000>;
@@ -660,8 +654,7 @@
 					anatop-max-voltage = <1450000>;
 				};
 
-				reg_pcie: regulator-vddpcie at 20c8140 {
-					reg = <0x20c8140>;
+				reg_pcie: regulator-vddpcie {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddpcie";
 					regulator-min-microvolt = <725000>;
@@ -677,8 +670,7 @@
 					anatop-max-voltage = <1450000>;
 				};
 
-				reg_soc: regulator-vddsoc at 20c8140 {
-					reg = <0x20c8140>;
+				reg_soc: regulator-vddsoc {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddsoc";
 					regulator-min-microvolt = <725000>;
arch/arm/boot/dts/imx6ul.dtsi +3 -8
index 2b854d1..1818b6c 100644
@@ -551,11 +551,8 @@
 				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
-				#address-cells = <1>;
-				#size-cells = <0>;
 
-				reg_3p0: regulator-3p0 at 20c8110 {
-					reg = <0x20c8110>;
+				reg_3p0: regulator-3p0 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd3p0";
 					regulator-min-microvolt = <2625000>;
@@ -569,8 +566,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				reg_arm: regulator-vddcore at 20c8140 {
-					reg = <0x20c8140>;
+				reg_arm: regulator-vddcore {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "cpu";
 					regulator-min-microvolt = <725000>;
@@ -587,8 +583,7 @@
 					anatop-max-voltage = <1450000>;
 				};
 
-				reg_soc: regulator-vddsoc at 20c8140 {
-					reg = <0x20c8140>;
+				reg_soc: regulator-vddsoc {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vddsoc";
 					regulator-min-microvolt = <725000>;
arch/arm/boot/dts/imx7s.dtsi +2 -6
index b416d2b..99f92ec 100644
@@ -557,11 +557,8 @@
 				reg = <0x30360000 0x10000>;
 				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 					<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
-				#address-cells = <1>;
-				#size-cells = <0>;
 
-				reg_1p0d: regulator-vdd1p0d at 30360210 {
-					reg = <0x30360210>;
+				reg_1p0d: regulator-vdd1p0d {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd1p0d";
 					regulator-min-microvolt = <800000>;
@@ -575,8 +572,7 @@
 					anatop-enable-bit = <0>;
 				};
 
-				reg_1p2: regulator-vdd1p2 at 30360220 {
-					reg = <0x30360220>;
+				reg_1p2: regulator-vdd1p2 {
 					compatible = "fsl,anatop-regulator";
 					regulator-name = "vdd1p2";
 					regulator-min-microvolt = <1100000>;
Signature · 1 line
2.7.4
author reviewer
#3 lore raw

PATCH v2 1/1 ARM: dts: imx6/7: Remove unit-address from anatop regulators

Hi Shawn,

Quoted 4 lines · Shawn Guo

I'm a bit confused. It looks that the change is just to revert commit 685e1321ba74 ("ARM: dts: imx6: Add unit address and reg for the anatop nodes"). But what about the simple_bus_reg warning the commit was fixing?

Yes, I don't get the original simple_bus_reg warning anymore.

I think we don't need the unit address and reg properties to the anatop regulators.

There is already a 'anatop-reg-offset' property that indicates the anatop register offset.

Rob, is this patch the correct solution to fix the duplicate unit-address dtc warnings?

Thanks

Applied
#4 lore raw

PATCH v2 1/1 ARM: dts: imx6/7: Remove unit-address from anatop regulators

In reply to Fabio Estevam
Quoted 10 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

Remove unit-address and reg property from anatop regulators to fix the following DTC warnings with W=1:

arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddcore at 20c8140: duplicate unit-address (also used in node /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddpu at 20c8140) arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddcore at 20c8140: duplicate unit-address (also used in node /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddsoc at 20c8140) arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddpu at 20c8140: duplicate unit-address (also used in node /soc/aips-bus at 2000000/anatop at 20c8000/regulator-vddsoc at 20c8140)

Applied, thanks.