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video: dw_hdmi: fix HSYNC and VSYNC polarity settings

PATCH New Vasily Khoruzhick 3 participants 6 messages May 14, 2018 – May 15, 2018

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Framebuffer layer Arm/Allwinner sunXi SoC support
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Vasily Khoruzhick

author
#0 lore raw

v2 cover video: dw_hdmi: fix HSYNC and VSYNC polarity settings

Previous attempt to fix HSYNC and VSYNC polarity settings for dw_hdmi on sunxi wasn't completely correct - there's another bug in dw_hdmi driver. This series fixes hsync/vsync settings in sunxi glue driver and applies proper fix to dw_hdmi

v2: don't revert earlier fix, just use correct bits for hsync and vsync

Vasily Khoruzhick (2):
sunxi: video: HDMI: use correct bits for HSYNC and VSYNC polarity.
video: dw_hdmi: fix HSYNC and VSYNC polarity settings

 drivers/video/dw_hdmi.c             | 4 ++--
 drivers/video/sunxi/sunxi_dw_hdmi.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)
Signature · 1 line
2.17.0
author
#1 lore raw

PATCH v2 1/2 sunxi: video: HDMI: use correct bits for HSYNC and VSYNC polarity.

HSYNC is bit 8, and VSYNC is bit 9.

Signed-off-by Vasily Khoruzhick <[email protected]>
---
 drivers/video/sunxi/sunxi_dw_hdmi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/video/sunxi/sunxi_dw_hdmi.c +2 -2
index c78e33b947..9dbea649a0 100644
@@ -303,10 +303,10 @@ static int sunxi_dw_hdmi_enable(struct udevice *dev, int panel_bpp,
 
 	sunxi_dw_hdmi_lcdc_init(priv->mux, edid, panel_bpp);
 
-	if (edid->flags & DISPLAY_FLAGS_HSYNC_LOW)
+	if (edid->flags & DISPLAY_FLAGS_VSYNC_LOW)
 		setbits_le32(&phy->pol, 0x200);
 
-	if (edid->flags & DISPLAY_FLAGS_VSYNC_LOW)
+	if (edid->flags & DISPLAY_FLAGS_HSYNC_LOW)
 		setbits_le32(&phy->pol, 0x100);
 
 	setbits_le32(&phy->ctrl, 0xf << 12);
Signature · 1 line
2.17.0
#2 lore raw

PATCH v2 1/2 sunxi: video: HDMI: use correct bits for HSYNC and VSYNC polarity.

Hi!

Dne ponedeljek, 14. maj 2018 ob 22:49:52 CEST je Vasily Khoruzhick napisal(a):

Quoted 3 lines

HSYNC is bit 8, and VSYNC is bit 9.

Signed-off-by Vasily Khoruzhick <[email protected]>
Reviewed-by Jernej Skrabec <[email protected]>

Best regards,
Jernej

Quoted 24 lines
---
 drivers/video/sunxi/sunxi_dw_hdmi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
(quoted diff) +0 -0

b/drivers/video/sunxi/sunxi_dw_hdmi.c index c78e33b947..9dbea649a0 100644

drivers/video/sunxi/sunxi_dw_hdmi.c +2 -2
@@ -303,10 +303,10 @@ static int sunxi_dw_hdmi_enable(struct udevice *dev,
 int panel_bpp,
 
 	sunxi_dw_hdmi_lcdc_init(priv->mux, edid, panel_bpp);
 
-	if (edid->flags & DISPLAY_FLAGS_HSYNC_LOW)
+	if (edid->flags & DISPLAY_FLAGS_VSYNC_LOW)
 		setbits_le32(&phy->pol, 0x200);
 
-	if (edid->flags & DISPLAY_FLAGS_VSYNC_LOW)
+	if (edid->flags & DISPLAY_FLAGS_HSYNC_LOW)
 		setbits_le32(&phy->pol, 0x100);

setbits_le32(&phy->ctrl, 0xf << 12);
--
2.17.0

author
#3 lore raw

PATCH v2 2/2 video: dw_hdmi: fix HSYNC and VSYNC polarity settings

In reply to Vasily Khoruzhick

Currently dw_hdmi configures HSYNC polarity using VSYNC setting from EDID and vice versa. Fix it, since it breaks displays where HSYNC and VSYNC polarity differs

Signed-off-by Vasily Khoruzhick <[email protected]>
---
 drivers/video/dw_hdmi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/video/dw_hdmi.c +2 -2
index dbad0e2b24..229bd63c97 100644
@@ -401,11 +401,11 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
 	/* set up hdmi_fc_invidconf */
 	inv_val = HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE;
 
-	inv_val |= (edid->flags & DISPLAY_FLAGS_HSYNC_HIGH ?
+	inv_val |= (edid->flags & DISPLAY_FLAGS_VSYNC_HIGH ?
 		   HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH :
 		   HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW);
 
-	inv_val |= (edid->flags & DISPLAY_FLAGS_VSYNC_HIGH ?
+	inv_val |= (edid->flags & DISPLAY_FLAGS_HSYNC_HIGH ?
 		   HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH :
 		   HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW);
Signature · 1 line
2.17.0
#4 lore raw

PATCH v2 2/2 video: dw_hdmi: fix HSYNC and VSYNC polarity settings

Hi,

Dne ponedeljek, 14. maj 2018 ob 22:49:53 CEST je Vasily Khoruzhick napisal(a):

Quoted 5 lines

Currently dw_hdmi configures HSYNC polarity using VSYNC setting from EDID and vice versa. Fix it, since it breaks displays where HSYNC and VSYNC polarity differs

Signed-off-by Vasily Khoruzhick <[email protected]>
Reviewed-by Jernej Skrabec <[email protected]>

Best regards,
Jernej

Quoted 24 lines
---
 drivers/video/dw_hdmi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/video/dw_hdmi.c +2 -3
index dbad0e2b24..229bd63c97 100644
@@ -401,11 +401,11 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
 	/* set up hdmi_fc_invidconf */
 	inv_val = HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE;
 
-	inv_val |= (edid->flags & DISPLAY_FLAGS_HSYNC_HIGH ?
+	inv_val |= (edid->flags & DISPLAY_FLAGS_VSYNC_HIGH ?
 		   HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH :
 		   HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW);
 
-	inv_val |= (edid->flags & DISPLAY_FLAGS_VSYNC_HIGH ?
+	inv_val |= (edid->flags & DISPLAY_FLAGS_HSYNC_HIGH ?
 		   HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH :
 		   HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW);
 
--

2.17.0

#5 lore raw

v2 cover video: dw_hdmi: fix HSYNC and VSYNC polarity settings

In reply to Vasily Khoruzhick

Hi,

Quoted 7 lines · On Mon, 14 May 2018 13:49:51 -0700 Vasily Khoruzhick anarsoul at gmail.com…

Previous attempt to fix HSYNC and VSYNC polarity settings for dw_hdmi on sunxi wasn't completely correct - there's another bug in dw_hdmi driver. This series fixes hsync/vsync settings in sunxi glue driver and applies proper fix to dw_hdmi

v2: don't revert earlier fix, just use correct bits for hsync and vsync

Quoted 7 lines

Vasily Khoruzhick (2):
sunxi: video: HDMI: use correct bits for HSYNC and VSYNC polarity.
video: dw_hdmi: fix HSYNC and VSYNC polarity settings

 drivers/video/dw_hdmi.c             | 4 ++--
 drivers/video/sunxi/sunxi_dw_hdmi.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

Series applied to u-boot-video/master, thanks!

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