Skip to contentSkip to conversation

ARM: dts: r8a7740: Add CEU1

PATCH New Simon Horman 4 participants 5 messages May 15, 2018 – May 16, 2018 Device tree bindings

lore
Share & tools
lore

Simon Horman

author
#0 lore raw

PATCH v2 1/1 ARM: dts: r8a7740: Add CEU1

Describe CEU1 peripheral for Renesas R-Mobile A1 R8A7740 Soc.

Signed-off-by Simon Horman <[email protected]>

---
v2
* Correct register range start address

Based on renesas-devel-20180514-v4.17-rc5

---
 arch/arm/boot/dts/r8a7740.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)
arch/arm/boot/dts/r8a7740.dtsi +10 -0
index 508d93440ee8..35e2fc957458 100644
@@ -77,6 +77,16 @@
 		status = "disabled";
 	};
 
+	ceu1: ceu at fe914000 {
+		reg = <0xfe914000 0x3000>;
+		compatible = "renesas,r8a7740-ceu";
+		interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp1_clks R8A7740_CLK_CEU21>;
+		clock-names = "ceu21";
+		power-domains = <&pd_a4r>;
+		status = "disabled";
+	};
+
 	cmt1: timer at e6138000 {
 		compatible = "renesas,cmt-48-r8a7740", "renesas,cmt-48";
 		reg = <0xe6138000 0x170>;
Signature · 1 line
2.11.0
#1 lore raw

PATCH v2 1/1 ARM: dts: r8a7740: Add CEU1

Hi Simon,

Quoted 3 lines · Simon Horman

Describe CEU1 peripheral for Renesas R-Mobile A1 R8A7740 Soc.

Signed-off-by Simon Horman <[email protected]>
Reviewed-by Jacopo Mondi <[email protected]>

Thank you!
j

Quoted 31 lines

---
v2
* Correct register range start address

Based on renesas-devel-20180514-v4.17-rc5

---
 arch/arm/boot/dts/r8a7740.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)
arch/arm/boot/dts/r8a7740.dtsi +10 -1
index 508d93440ee8..35e2fc957458 100644
@@ -77,6 +77,16 @@
 		status = "disabled";
 	};
 
+	ceu1: ceu at fe914000 {
+		reg = <0xfe914000 0x3000>;
+		compatible = "renesas,r8a7740-ceu";
+		interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp1_clks R8A7740_CLK_CEU21>;
+		clock-names = "ceu21";
+		power-domains = <&pd_a4r>;
+		status = "disabled";
+	};
+
 	cmt1: timer at e6138000 {
 		compatible = "renesas,cmt-48-r8a7740", "renesas,cmt-48";
 		reg = <0xe6138000 0x170>;
--
Quoted 2 lines

2.11.0

-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20180515/4878e59e/attachment.sig>

#3 lore raw

PATCH v2 1/1 ARM: dts: r8a7740: Add CEU1

In reply to Simon Horman

Hi Simon,

Quoted 6 lines · Simon Horman

Describe CEU1 peripheral for Renesas R-Mobile A1 R8A7740 Soc.

Signed-off-by Simon Horman <[email protected]>

---
v2
* Correct register range start address

Thanks for your patch!

Reviewed-by Geert Uytterhoeven <[email protected]>

Minor question below.

arch/arm/boot/dts/r8a7740.dtsi line 85

Quoted 12 lines
arch/arm/boot/dts/r8a7740.dtsi +6 -0
@@ -77,6 +77,16 @@
                status = "disabled";
        };
 
+       ceu1: ceu at fe914000 {
+               reg = <0xfe914000 0x3000>;
+               compatible = "renesas,r8a7740-ceu";
+               interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp1_clks R8A7740_CLK_CEU21>;
+               clock-names = "ceu21";

Why the "clock-names" property? It's not mentioned in the DT bindings, and may cause issues if the bindings are ever amended.

arch/arm/boot/dts/r8a7740.dtsi line 89

Quoted 4 lines
arch/arm/boot/dts/r8a7740.dtsi +4 -0
+               power-domains = <&pd_a4r>;
+               status = "disabled";
+       };
+

Gr{oetje,eeting}s,

Geert

Signature · 5 lines
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
#4 lore raw

PATCH v2 1/1 ARM: dts: r8a7740: Add CEU1

Quoted 23 lines · Geert Uytterhoeven

Hi Simon,

Quoted 6 lines · Simon Horman

Describe CEU1 peripheral for Renesas R-Mobile A1 R8A7740 Soc.

Signed-off-by Simon Horman <[email protected]>

---
v2
* Correct register range start address

Thanks for your patch!

Reviewed-by Geert Uytterhoeven <[email protected]>

Minor question below.

Quoted 6 lines
arch/arm/boot/dts/r8a7740.dtsi +0 -0
@@ -77,6 +77,16 @@
                status = "disabled";
        };
Quoted 9 lines

arch/arm/boot/dts/r8a7740.dtsi line 85

Quoted 6 lines
arch/arm/boot/dts/r8a7740.dtsi +6 -0
+       ceu1: ceu at fe914000 {
+               reg = <0xfe914000 0x3000>;
+               compatible = "renesas,r8a7740-ceu";
+               interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp1_clks R8A7740_CLK_CEU21>;
+               clock-names = "ceu21";

Why the "clock-names" property? It's not mentioned in the DT bindings, and may cause issues if the bindings are ever amended.

Thanks, I copied this from CEU0 where you have also raised the same issue. I have dropped the property for now.