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sunxi: add PWM driver for A64

PATCH New Vasily Khoruzhick 3 participants 5 messages May 14, 2018 – May 15, 2018

Subsystems (3)
Arm (32-bit) Arm/Allwinner sunXi SoC support PWM
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Vasily Khoruzhick

author
#0 lore raw

v4 cover sunxi: add PWM driver for A64

This series introduces a PWM driver for Allwinner A64.

This driver can be used to control backlight on Pinebook

v4: use the same binding as in Linux

Vasily Khoruzhick (2):
pwm: sunxi: add support for PWM found on Allwinner A64
dts: sunxi: add PWM node for sun50i

 arch/arm/dts/sun50i-a64.dtsi           |   9 ++
 arch/arm/include/asm/arch-sunxi/gpio.h |   1 +
 arch/arm/include/asm/arch-sunxi/pwm.h  |  12 ++
 drivers/pwm/Kconfig                    |   7 +
 drivers/pwm/Makefile                   |   1 +
 drivers/pwm/sunxi_pwm.c                | 178 +++++++++++++++++++++++++
 6 files changed, 208 insertions(+)
 create mode 100644 drivers/pwm/sunxi_pwm.c
Signature · 1 line
2.17.0
author
#1 lore raw

PATCH v4 1/2 pwm: sunxi: add support for PWM found on Allwinner A64

This commit adds basic support for PWM found on Allwinner A64. It can be used for pwm_backlight driver (e.g. for Pinebook)

Signed-off-by Vasily Khoruzhick <[email protected]>
---
 arch/arm/include/asm/arch-sunxi/gpio.h |   1 +
 arch/arm/include/asm/arch-sunxi/pwm.h  |  12 ++
 drivers/pwm/Kconfig                    |   7 +
 drivers/pwm/Makefile                   |   1 +
 drivers/pwm/sunxi_pwm.c                | 178 +++++++++++++++++++++++++
 5 files changed, 199 insertions(+)
 create mode 100644 drivers/pwm/sunxi_pwm.c
arch/arm/include/asm/arch-sunxi/gpio.h +1 -0
index 3334fb51f0..e4fe54d8b8 100644
@@ -172,6 +172,7 @@ enum sunxi_gpio_number {
 #define SUN8I_GPD_SDC1		3
 #define SUNXI_GPD_LCD0		2
 #define SUNXI_GPD_LVDS0		3
+#define SUNXI_GPD_PWM		2
 
 #define SUN5I_GPE_SDC2		3
 #define SUN8I_GPE_TWI2		3
arch/arm/include/asm/arch-sunxi/pwm.h +12 -0
index 47eb433fb6..dca283c7a9 100644
@@ -10,8 +10,15 @@
 #define SUNXI_PWM_CH0_PERIOD		(SUNXI_PWM_BASE + 4)
 
 #define SUNXI_PWM_CTRL_PRESCALE0(x)	((x) & 0xf)
+#define SUNXI_PWM_CTRL_PRESCALE0_MASK	0xf
 #define SUNXI_PWM_CTRL_ENABLE0		(0x5 << 4)
 #define SUNXI_PWM_CTRL_POLARITY0(x)	((x) << 5)
+#define SUNXI_PWM_CTRL_CH0_ACT_STA	BIT(5)
+#define SUNXI_PWM_CTRL_CLK_GATE		BIT(6)
+
+#define SUNXI_PWM_CH0_PERIOD_MAX	(0xffff)
+#define SUNXI_PWM_CH0_PERIOD_PRD(x)	((x & 0xffff) << 16)
+#define SUNXI_PWM_CH0_PERIOD_DUTY(x)	((x) & 0xffff)
 
 #define SUNXI_PWM_PERIOD_80PCT		0x04af03c0
 

@@ -30,4 +37,9 @@
 #define SUNXI_PWM_MUX			SUN8I_GPH_PWM
 #endif
 
+struct sunxi_pwm {
+	u32 ctrl;
+	u32 ch0_period;
+};
+
 #endif
drivers/pwm/Kconfig +7 -0
index e827558052..2984b79766 100644
@@ -43,3 +43,10 @@ config PWM_TEGRA
 	  four channels with a programmable period and duty cycle. Only a
 	  32KHz clock is supported by the driver but the duty cycle is
 	  configurable.
+
+config PWM_SUNXI
+	bool "Enable support for the Allwinner Sunxi PWM"
+	depends on DM_PWM
+	help
+	  This PWM is found on H3, A64 and other Allwinner SoCs. It supports a
+	  programmable period and duty cycle. A 16-bit counter is used.
drivers/pwm/Makefile +1 -0
index 16739e7fda..a837c35ed2 100644
@@ -15,3 +15,4 @@ obj-$(CONFIG_PWM_IMX)		+= pwm-imx.o pwm-imx-util.o
 obj-$(CONFIG_PWM_ROCKCHIP)	+= rk_pwm.o
 obj-$(CONFIG_PWM_SANDBOX)	+= sandbox_pwm.o
 obj-$(CONFIG_PWM_TEGRA)		+= tegra_pwm.o
+obj-$(CONFIG_PWM_SUNXI)		+= sunxi_pwm.o
drivers/pwm/sunxi_pwm.c new file +178 -0

178 lines not on this page · raw message

Signature · 1 line
2.17.0
#2 lore raw

PATCH v4 1/2 pwm: sunxi: add support for PWM found on Allwinner A64

Quoted 125 lines · Vasily Khoruzhick

This commit adds basic support for PWM found on Allwinner A64. It can be used for pwm_backlight driver (e.g. for Pinebook)

Signed-off-by Vasily Khoruzhick <[email protected]>
---
 arch/arm/include/asm/arch-sunxi/gpio.h |   1 +
 arch/arm/include/asm/arch-sunxi/pwm.h  |  12 ++
 drivers/pwm/Kconfig                    |   7 +
 drivers/pwm/Makefile                   |   1 +
 drivers/pwm/sunxi_pwm.c                | 178 +++++++++++++++++++++++++
 5 files changed, 199 insertions(+)
 create mode 100644 drivers/pwm/sunxi_pwm.c
arch/arm/include/asm/arch-sunxi/gpio.h +1 -0
index 3334fb51f0..e4fe54d8b8 100644
@@ -172,6 +172,7 @@ enum sunxi_gpio_number {
 #define SUN8I_GPD_SDC1         3
 #define SUNXI_GPD_LCD0         2
 #define SUNXI_GPD_LVDS0                3
+#define SUNXI_GPD_PWM          2
 
 #define SUN5I_GPE_SDC2         3
 #define SUN8I_GPE_TWI2         3
arch/arm/include/asm/arch-sunxi/pwm.h +12 -0
index 47eb433fb6..dca283c7a9 100644
@@ -10,8 +10,15 @@
 #define SUNXI_PWM_CH0_PERIOD           (SUNXI_PWM_BASE + 4)
 
 #define SUNXI_PWM_CTRL_PRESCALE0(x)    ((x) & 0xf)
+#define SUNXI_PWM_CTRL_PRESCALE0_MASK  0xf
 #define SUNXI_PWM_CTRL_ENABLE0         (0x5 << 4)
 #define SUNXI_PWM_CTRL_POLARITY0(x)    ((x) << 5)
+#define SUNXI_PWM_CTRL_CH0_ACT_STA     BIT(5)
+#define SUNXI_PWM_CTRL_CLK_GATE                BIT(6)
+
+#define SUNXI_PWM_CH0_PERIOD_MAX       (0xffff)
+#define SUNXI_PWM_CH0_PERIOD_PRD(x)    ((x & 0xffff) << 16)
+#define SUNXI_PWM_CH0_PERIOD_DUTY(x)   ((x) & 0xffff)
 
 #define SUNXI_PWM_PERIOD_80PCT         0x04af03c0
 

@@ -30,4 +37,9 @@
 #define SUNXI_PWM_MUX                  SUN8I_GPH_PWM
 #endif
 
+struct sunxi_pwm {
+       u32 ctrl;
+       u32 ch0_period;
+};
+
 #endif
drivers/pwm/Kconfig +7 -0
index e827558052..2984b79766 100644
@@ -43,3 +43,10 @@ config PWM_TEGRA
          four channels with a programmable period and duty cycle. Only a
          32KHz clock is supported by the driver but the duty cycle is
          configurable.
+
+config PWM_SUNXI
+       bool "Enable support for the Allwinner Sunxi PWM"
+       depends on DM_PWM
+       help
+         This PWM is found on H3, A64 and other Allwinner SoCs. It supports a
+         programmable period and duty cycle. A 16-bit counter is used.
drivers/pwm/Makefile +1 -0
index 16739e7fda..a837c35ed2 100644
@@ -15,3 +15,4 @@ obj-$(CONFIG_PWM_IMX)         += pwm-imx.o pwm-imx-util.o
 obj-$(CONFIG_PWM_ROCKCHIP)     += rk_pwm.o
 obj-$(CONFIG_PWM_SANDBOX)      += sandbox_pwm.o
 obj-$(CONFIG_PWM_TEGRA)                += tegra_pwm.o
+obj-$(CONFIG_PWM_SUNXI)                += sunxi_pwm.o
drivers/pwm/sunxi_pwm.c new file +40 -0
new file mode 100644
index 0000000000..3c7dffdd90
@@ -0,0 +1,178 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2017-2018 Vasily Khoruzhick <[email protected]>
+ */
+
+#include <common.h>
+#include <div64.h>
+#include <dm.h>
+#include <pwm.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/pwm.h>
+#include <asm/arch/gpio.h>
+#include <power/regulator.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define OSC_24MHZ 24000000
+
+struct sunxi_pwm_priv {
+       struct sunxi_pwm *regs;
+       bool invert;
+       u32 prescaler;
+};
+
+static const u32 prescaler_table[] = {
+       120,    /* 0000 */
+       180,    /* 0001 */
+       240,    /* 0010 */
+       360,    /* 0011 */
+       480,    /* 0100 */
+       0,      /* 0101 */
+       0,      /* 0110 */
+       0,      /* 0111 */
+       12000,  /* 1000 */
+       24000,  /* 1001 */
+       36000,  /* 1010 */
+       48000,  /* 1011 */
+       72000,  /* 1100 */

drivers/pwm/sunxi_pwm.c line 50

Quoted 10 lines
drivers/pwm/sunxi_pwm.c new file +10 -0
+       0,      /* 1101 */
+       0,      /* 1110 */
+       1,      /* 1111 */
+};
+
+static int sunxi_pwm_config_pinmux(void)
+{
+#ifdef CONFIG_MACH_SUN50I
+       sunxi_gpio_set_cfgpin(SUNXI_GPD(22), SUNXI_GPD_PWM);
+#endif

Drop this ifdef, can be done through drivers_data.

author
#3 lore raw

PATCH v4 2/2 dts: sunxi: add PWM node for sun50i

In reply to Vasily Khoruzhick

Add PWM definition to sun50i-a64.dtsi

Signed-off-by Vasily Khoruzhick <[email protected]>
---
 arch/arm/dts/sun50i-a64.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)
arch/arm/dts/sun50i-a64.dtsi +9 -0
index 65a344d9ce..a82a3d89af 100644
@@ -319,6 +319,15 @@
 			};
 		};
 
+		pwm: pwm at 01c21400 {
+			compatible = "allwinner,sun50i-a64-pwm",
+				     "allwinner,sun5i-a13-pwm";
+			reg = <0x01c21400 0x8>;
+			clocks = <&osc24M>;
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+
 		uart0: serial at 1c28000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x01c28000 0x400>;
Signature · 1 line
2.17.0
#4 lore raw

v4 cover sunxi: add PWM driver for A64

In reply to Vasily Khoruzhick
Quoted 10 lines · On Mon, 14 May 2018 08:16:19 -0700 Vasily Khoruzhick anarsoul at gmail.com…

This series introduces a PWM driver for Allwinner A64.

This driver can be used to control backlight on Pinebook

v4: use the same binding as in Linux

Vasily Khoruzhick (2):
pwm: sunxi: add support for PWM found on Allwinner A64
dts: sunxi: add PWM node for sun50i

Quoted 8 lines
 arch/arm/dts/sun50i-a64.dtsi           |   9 ++
 arch/arm/include/asm/arch-sunxi/gpio.h |   1 +
 arch/arm/include/asm/arch-sunxi/pwm.h  |  12 ++
 drivers/pwm/Kconfig                    |   7 +
 drivers/pwm/Makefile                   |   1 +
 drivers/pwm/sunxi_pwm.c                | 178 +++++++++++++++++++++++++
 6 files changed, 208 insertions(+)
 create mode 100644 drivers/pwm/sunxi_pwm.c

Series applied to u-boot-video/master, thanks!

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Anatolij