Skip to contentSkip to conversation

x86: verify_cpu: use 32-bit arithmetic

PATCH In review Alexey Dobriyan 2 participants 2 messages May 17, 2018 x86

lore
Share & tools
lore
#0 lore raw

PATCH 1/3 x86: verify_cpu: use 32-bit arithmetic

32-bit instructions are 1 byte shorter than 16-bit instructions.

---

 arch/x86/kernel/verify_cpu.S |    8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
arch/x86/kernel/verify_cpu.S +4 -4
@@ -56,14 +56,14 @@ ENTRY(verify_cpu)
 	cmpl	$0x1,%eax
 	jb	.Lverify_cpu_no_longmode	# no cpuid 1
 
-	xor	%di,%di
+	xor	%edi, %edi
 	cmpl	$0x68747541,%ebx	# AuthenticAMD
 	jnz	.Lverify_cpu_noamd
 	cmpl	$0x69746e65,%edx
 	jnz	.Lverify_cpu_noamd
 	cmpl	$0x444d4163,%ecx
 	jnz	.Lverify_cpu_noamd
-	mov	$1,%di			# cpu is from AMD
+	mov	$1, %edi		# cpu is from AMD
 	jmp	.Lverify_cpu_check
 
 .Lverify_cpu_noamd:
@@ -122,13 +122,13 @@ ENTRY(verify_cpu)
 	andl	$SSE_MASK,%edx
 	cmpl	$SSE_MASK,%edx
 	je	.Lverify_cpu_sse_ok
-	test	%di,%di
+	test	%edi, %edi
 	jz	.Lverify_cpu_no_longmode	# only try to force SSE on AMD
 	movl	$MSR_K7_HWCR,%ecx
 	rdmsr
 	btr	$15,%eax		# enable SSE
 	wrmsr
-	xor	%di,%di			# don't loop
+	xor	%edi, %edi		# don't loop
 	jmp	.Lverify_cpu_sse_test	# try again
 
 .Lverify_cpu_no_longmode:
#1 lore raw
Quoted 42 lines · Alexey Dobriyan

32-bit instructions are 1 byte shorter than 16-bit instructions.

---

arch/x86/kernel/verify_cpu.S | 8 ++++----

1 file changed, 4 insertions(+), 4 deletions(-)
arch/x86/kernel/verify_cpu.S +2 -2
@@ -56,14 +56,14 @@ ENTRY(verify_cpu)
 	cmpl	$0x1,%eax
 	jb	.Lverify_cpu_no_longmode	# no cpuid 1
 
-	xor	%di,%di
+	xor	%edi, %edi
 	cmpl	$0x68747541,%ebx	# AuthenticAMD
 	jnz	.Lverify_cpu_noamd
 	cmpl	$0x69746e65,%edx
 	jnz	.Lverify_cpu_noamd
 	cmpl	$0x444d4163,%ecx
 	jnz	.Lverify_cpu_noamd
-	mov	$1,%di			# cpu is from AMD
+	mov	$1, %edi		# cpu is from AMD
 	jmp	.Lverify_cpu_check
 

.Lverify_cpu_noamd:

arch/x86/kernel/verify_cpu.S +2 -2
@@ -122,13 +122,13 @@ ENTRY(verify_cpu)
 	andl	$SSE_MASK,%edx
 	cmpl	$SSE_MASK,%edx
 	je	.Lverify_cpu_sse_ok
-	test	%di,%di
+	test	%edi, %edi
 	jz	.Lverify_cpu_no_longmode	# only try to force SSE on AMD
 	movl	$MSR_K7_HWCR,%ecx
 	rdmsr
 	btr	$15,%eax		# enable SSE
 	wrmsr
-	xor	%di,%di			# don't loop
+	xor	%edi, %edi		# don't loop
 	jmp	.Lverify_cpu_sse_test	# try again
 
Quoted 1 line

.Lverify_cpu_no_longmode:

Well, in 32/64-bit mode... this code is also assembled in 16-bit mode, and the 16-but code is more space sensitive.

Signature · 1 line
Sent from my Android device with K-9 Mail. Please excuse my brevity.