ARM: pxa: dts: add gpio-ranges to gpio controller

PATCH New Daniel Mack 2 participants 5 messages May 21, 2018 – May 22, 2018 Device tree bindings

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Daniel Mack

author

2018-05-21 22:00 UTC #0 lore raw

PATCH 1/2 ARM: pxa: dts: add gpio-ranges to gpio controller

The PXA GPIO driver calls out to the pinctrl driver for claiming pins unless the config has CONFIG_PINCTRL unset. IOW, if a pinctrl driver is active, it must be visible to the GPIO driver.

Signed-off-by Daniel Mack <[email protected]>

---
 arch/arm/boot/dts/pxa3xx.dtsi | 1 +
 1 file changed, 1 insertion(+)

arch/arm/boot/dts/pxa3xx.dtsi +1 -0

index 982d1a62661d..a13ac52e4fd2 100644
@@ -148,6 +148,7 @@
 			compatible = "intel,pxa3xx-gpio";
 			reg = <0x40e00000 0x10000>;
 			clocks = <&clks CLK_GPIO>;
+			gpio-ranges = <&pinctrl 0 0 128>;
 			interrupt-names = "gpio0", "gpio1", "gpio_mux";
 			interrupts = <8 9 10>;
 			gpio-controller;

Signature · 1 line

2.14.3

Daniel Mack

author

2018-05-21 22:00 UTC #1 lore raw

PATCH 2/2 ARM: pxa: dts: add pin definitions for extended GPIOs

The PXA3xx series features some extended GPIO banks which are named GPIO0_2, GPIO1_2 etc. The PXA300, PXA310 and PXA320 have different numbers of such pins, and they also have variant-specific register offsets.

Signed-off-by Daniel Mack <[email protected]>

---
 arch/arm/boot/dts/pxa3xx.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

arch/arm/boot/dts/pxa3xx.dtsi +24 -0

index a13ac52e4fd2..446e612688c0 100644
@@ -8,6 +8,13 @@
 	 (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) :	\
 	 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) :	\
 	 0)
+#define MFP_PIN_PXA300_0_2	0x674
+#define MFP_PIN_PXA300_1_2	0x678
+#define MFP_PIN_PXA300_2_2	0x2dc
+#define MFP_PIN_PXA300_3_2	0x2e0
+#define MFP_PIN_PXA300_4_2	0x2e4
+#define MFP_PIN_PXA300_5_2	0x2e8
+#define MFP_PIN_PXA300_6_2	0x2ec
 
 #define MFP_PIN_PXA310(gpio)				\
 	((gpio <= 2) ? (0x00b4 + 4 * gpio) :		\

@@ -18,6 +25,17 @@
 	 (gpio <= 262) ? 0 :				\
 	 (gpio <= 268) ? (0x052c + 4 * (gpio - 263)) :	\
 	 0)
+#define MFP_PIN_PXA310_0_2	0x674
+#define MFP_PIN_PXA310_1_2	0x678
+#define MFP_PIN_PXA310_2_2	0x2dc
+#define MFP_PIN_PXA310_3_2	0x2e0
+#define MFP_PIN_PXA310_4_2	0x2e4
+#define MFP_PIN_PXA310_5_2	0x2e8
+#define MFP_PIN_PXA310_6_2	0x2ec
+#define MFP_PIN_PXA310_7_2	0x52c
+#define MFP_PIN_PXA310_8_2	0x530
+#define MFP_PIN_PXA310_9_2	0x534
+#define MFP_PIN_PXA310_10_2	0x538
 
 #define MFP_PIN_PXA320(gpio)				\
 	((gpio <= 4) ? (0x0124 + 4 * gpio) :		\

@@ -30,6 +48,12 @@
 	 (gpio <= 98) ? (0x04f0 + 4 * (gpio - 74)) :	\
 	 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) :	\
 	 0)
+#define MFP_PIN_PXA320_0_2	0x674
+#define MFP_PIN_PXA320_1_2	0x678
+#define MFP_PIN_PXA320_2_2	0x67c
+#define MFP_PIN_PXA320_3_2	0x680
+#define MFP_PIN_PXA320_4_2	0x284
+#define MFP_PIN_PXA320_5_2	0x28c
 
 /*
  * MFP Alternate functions for pins having a gpio.

Signature · 1 line

2.14.3

Robert Jarzmik

2018-05-22 19:34 UTC #2 lore raw

PATCH 2/2 ARM: pxa: dts: add pin definitions for extended GPIOs

Quoted 14 lines · Daniel Mack

The PXA3xx series features some extended GPIO banks which are named GPIO0_2, GPIO1_2 etc. The PXA300, PXA310 and PXA320 have different numbers of such pins, and they also have variant-specific register offsets.
Signed-off-by Daniel Mack <[email protected]>
---
 arch/arm/boot/dts/pxa3xx.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
arch/arm/boot/dts/pxa3xx.dtsi +0 -0
index a13ac52e4fd2..446e612688c0 100644

arch/arm/boot/dts/pxa3xx.dtsi line 17

Quoted 10 lines

arch/arm/boot/dts/pxa3xx.dtsi +7 -0

@@ -8,6 +8,13 @@
 	 (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) :	\
 	 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) :	\
 	 0)
+#define MFP_PIN_PXA300_0_2	0x674
+#define MFP_PIN_PXA300_1_2	0x678
+#define MFP_PIN_PXA300_2_2	0x2dc
+#define MFP_PIN_PXA300_3_2	0x2e0
+#define MFP_PIN_PXA300_4_2	0x2e4
+#define MFP_PIN_PXA300_5_2	0x2e8
+#define MFP_PIN_PXA300_6_2	0x2ec

To be consistent with the previous items, could it be something like :
#define MFP_PIN_PXA300_2(gpio) \
... etc ...

And so on for the others.

Cheers.

Signature · 1 line

Robert

Daniel Mack

author

2018-05-22 19:46 UTC #3 lore raw

PATCH 2/2 ARM: pxa: dts: add pin definitions for extended GPIOs

Quoted 28 lines · Robert Jarzmik

Quoted 14 lines · Daniel Mack
The PXA3xx series features some extended GPIO banks which are named GPIO0_2, GPIO1_2 etc. The PXA300, PXA310 and PXA320 have different numbers of such pins, and they also have variant-specific register offsets.
Signed-off-by Daniel Mack <[email protected]>
---
  arch/arm/boot/dts/pxa3xx.dtsi | 24 ++++++++++++++++++++++++
  1 file changed, 24 insertions(+)
arch/arm/boot/dts/pxa3xx.dtsi +0 -0
index a13ac52e4fd2..446e612688c0 100644
arch/arm/boot/dts/pxa3xx.dtsi line 17
Quoted 10 lines
arch/arm/boot/dts/pxa3xx.dtsi +7 -0
@@ -8,6 +8,13 @@
  	 (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) :	\
  	 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) :	\
  	 0)
+#define MFP_PIN_PXA300_0_2	0x674
+#define MFP_PIN_PXA300_1_2	0x678
+#define MFP_PIN_PXA300_2_2	0x2dc
+#define MFP_PIN_PXA300_3_2	0x2e0
+#define MFP_PIN_PXA300_4_2	0x2e4
+#define MFP_PIN_PXA300_5_2	0x2e8
+#define MFP_PIN_PXA300_6_2	0x2ec
To be consistent with the previous items, could it be something like :

Quoted 3 lines

#define MFP_PIN_PXA300_2(gpio) \
   ... etc ...

Ah, yes. Much nicer. Will resend!

Thanks,
Daniel

Robert Jarzmik

Applied

2018-05-22 19:19 UTC #4 lore raw

PATCH 1/2 ARM: pxa: dts: add gpio-ranges to gpio controller

In reply to Daniel Mack

Quoted 5 lines · Daniel Mack

The PXA GPIO driver calls out to the pinctrl driver for claiming pins unless the config has CONFIG_PINCTRL unset. IOW, if a pinctrl driver is active, it must be visible to the GPIO driver.
Signed-off-by Daniel Mack <[email protected]>

Applied to pxa/dt, thanks.

Cheers.

--
Robert