various fixes for MIPS64

PATCH Applied Peter Mamonov 2 participants 19 messages May 22, 2018 – Jun 14, 2018

Subsystems (4)

VFS Memory technology devices (MTD) MIPS I2C muxes

lore

Share & tools

lore

Peter Mamonov

author

2018-05-22 15:34 UTC #0 lore raw

v3 cover various fixes for MIPS64

Hi,

This is a third revision of of the patchset which fixes various issues with 64 bit barebox, primarily MIPS related.

Differences from v2:
- add some comments to commits
- move MIPS' IOMEM declarations to arch/mips/include/asm/io.h
- skip [PATCH v2 09/12] mips: fix warnings from CPHYSADDR() macro for now
- Kconfig' options are disabled by default
- don't credit Andrey for trivial suggestions :)

Regards,
Peter

Peter Mamonov (12):
resource: fix iomem_resource.end for 64 bit systems
fs: fix memory access via /dev/mem for MIPS64
mtd: cfi-flash: fix write_buff() for 64 bit systems
i2c-mux-pca954x: fix out-of-bounds write for 64 bit systems
MIPS: import 64-bit address conversion macros include/common.h: move IOMEM declaration for MIPS to
arch/mips/include/asm/io.h
MIPS: add proper IOMEM() declaration for MIPS64
MIPS: fix copy_to_link_location for 64 bit mode
MIPS: use CKSEG1 instead of KSEG1
MIPS: add PHYS_ADDR_T_64BIT option
MIPS: 64BIT selects PHYS_ADDR_T_64BIT
MIPS: don't use optimized string functions for MIPS64

 arch/mips/Kconfig                   |  5 +++++
 arch/mips/boot/dtb.c                |  4 ++--
 arch/mips/include/asm/addrspace.h   | 20 ++++++++++++++++++++
 arch/mips/include/asm/io.h          |  6 ++++++
 arch/mips/include/asm/pbl_macros.h  | 21 +++++++++++----------
 arch/mips/lib/c-r4k.c               |  8 ++++----
 common/resource.c                   |  2 +-
 drivers/i2c/muxes/i2c-mux-pca954x.c |  4 +++-
 drivers/mtd/nor/cfi_flash.c         |  2 +-
 fs/fs.c                             |  4 ++--
 include/common.h                    |  7 ++-----
 11 files changed, 57 insertions(+), 26 deletions(-)

Signature · 7 lines

2.17.0


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Peter Mamonov

author

2018-05-22 15:34 UTC #1 lore raw

PATCH v3 1/12 resource: fix iomem_resource.end for 64 bit systems

Fix iomem_resource.end to cover the whole address space addressable by a variable of type resource_size_t.

Signed-off-by Peter Mamonov <[email protected]>

---
 common/resource.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

common/resource.c +1 -1

index e4bbe15fd..abc0814d2 100644
@@ -114,7 +114,7 @@ int release_region(struct resource *res)
 /* The root resource for the whole memory-mapped io space */
 struct resource iomem_resource = {
 	.start = 0,
-	.end = 0xffffffff,
+	.end = ~(resource_size_t)0,
 	.name = "iomem",
 	.children = LIST_HEAD_INIT(iomem_resource.children),
 };

Signature · 7 lines

2.17.0


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Peter Mamonov

author

2018-05-22 15:34 UTC #2 lore raw

PATCH v3 2/12 fs: fix memory access via /dev/mem for MIPS64

In reply to Peter Mamonov

lseek checks for non-negative in-memory offsets (addresses), failing otherwise. However negative address 0xffffffffXXXXXXXX is a valid MIPS64 virtual address.

Signed-off-by Peter Mamonov <[email protected]>

---
 fs/fs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

fs/fs.c +2 -2

index b66cc9b17..4322d307d 100644
@@ -962,7 +962,7 @@ loff_t lseek(int fildes, loff_t offset, int whence)
 	case SEEK_SET:
 		if (f->size != FILE_SIZE_STREAM && offset > f->size)
 			goto out;
-		if (offset < 0)
+		if (IS_ERR(offset))
 			goto out;
 		pos = offset;
 		break;

@@ -981,7 +981,7 @@ loff_t lseek(int fildes, loff_t offset, int whence)
 	}
 
 	pos = fsdrv->lseek(&f->fsdev->dev, f, pos);
-	if (pos < 0) {
+	if (IS_ERR(pos)) {
 		errno = -pos;
 		return -1;
 	}

Signature · 7 lines

2.17.0


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Sascha Hauer

2018-05-24 10:47 UTC #3 lore raw

Re: [PATCH v3 02/12] fs: fix memory access via /dev/mem for MIPS64

Quoted 13 lines · Peter Mamonov

lseek checks for non-negative in-memory offsets (addresses), failing otherwise. However negative address 0xffffffffXXXXXXXX is a valid MIPS64 virtual address.
Signed-off-by Peter Mamonov <[email protected]>
---
 fs/fs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
fs/fs.c +0 -0
index b66cc9b17..4322d307d 100644

fs/fs.c loff_t lseek(int fildes, loff_t offset, int whence) · line 965

Quoted 5 lines

fs/fs.c +1 -1

@@ -962,7 +962,7 @@ loff_t lseek(int fildes, loff_t offset, int whence)
 	case SEEK_SET:
 		if (f->size != FILE_SIZE_STREAM && offset > f->size)
 			goto out;
-		if (offset < 0)
+		if (IS_ERR(offset))

Dropped this patch. IS_ERR() takes a pointer, but offset is of type loff_t, so gcc rightfully issues a warning.

Sascha

Signature · 9 lines

Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Peter Mamonov

author

2018-05-24 14:02 UTC #4 lore raw

PATCH v4 1/1 fs: fix memory access via /dev/mem for MIPS64

lseek checks for non-negative in-memory offsets (addresses), failing otherwise. However negative address 0xffffffffXXXXXXXX is a valid MIPS64 virtual address.

---
 fs/fs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

fs/fs.c +2 -2

index b66cc9b17..8a49e32b5 100644
@@ -962,7 +962,7 @@ loff_t lseek(int fildes, loff_t offset, int whence)
 	case SEEK_SET:
 		if (f->size != FILE_SIZE_STREAM && offset > f->size)
 			goto out;
-		if (offset < 0)
+		if (IS_ERR_VALUE(offset))
 			goto out;
 		pos = offset;
 		break;

@@ -981,7 +981,7 @@ loff_t lseek(int fildes, loff_t offset, int whence)
 	}
 
 	pos = fsdrv->lseek(&f->fsdev->dev, f, pos);
-	if (pos < 0) {
+	if (IS_ERR_VALUE(pos)) {
 		errno = -pos;
 		return -1;
 	}

Signature · 7 lines

2.17.0


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Sascha Hauer

2018-06-13 08:31 UTC #5 lore raw

Re: [PATCH v4] fs: fix memory access via /dev/mem for MIPS64

Hi Peter,

Quoted 5 lines · Peter Mamonov

lseek checks for non-negative in-memory offsets (addresses), failing otherwise. However negative address 0xffffffffXXXXXXXX is a valid MIPS64 virtual address.
---
 fs/fs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

The patch looks good now, but lacks a Signed-off-by: Could you resend it?

Sascha

Quoted 27 lines

fs/fs.c +2 -2

index b66cc9b17..8a49e32b5 100644
@@ -962,7 +962,7 @@ loff_t lseek(int fildes, loff_t offset, int whence)
 	case SEEK_SET:
 		if (f->size != FILE_SIZE_STREAM && offset > f->size)
 			goto out;
-		if (offset < 0)
+		if (IS_ERR_VALUE(offset))
 			goto out;
 		pos = offset;
 		break;

@@ -981,7 +981,7 @@ loff_t lseek(int fildes, loff_t offset, int whence)
 	}
 
 	pos = fsdrv->lseek(&f->fsdev->dev, f, pos);
-	if (pos < 0) {
+	if (IS_ERR_VALUE(pos)) {
 		errno = -pos;
 		return -1;
 	}

Signature · 1 line

2.17.0

Signature · 9 lines

Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Peter Mamonov

author

2018-06-13 16:18 UTC #6 lore raw

PATCH RESEND v4 1/1 fs: fix memory access via /dev/mem for MIPS64

lseek checks for non-negative in-memory offsets (addresses), failing otherwise. However negative address 0xffffffffXXXXXXXX is a valid MIPS64 virtual address.

Signed-off-by Peter Mamonov <[email protected]>

---
 fs/fs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

fs/fs.c +2 -2

index b66cc9b17..8a49e32b5 100644
@@ -962,7 +962,7 @@ loff_t lseek(int fildes, loff_t offset, int whence)
 	case SEEK_SET:
 		if (f->size != FILE_SIZE_STREAM && offset > f->size)
 			goto out;
-		if (offset < 0)
+		if (IS_ERR_VALUE(offset))
 			goto out;
 		pos = offset;
 		break;

@@ -981,7 +981,7 @@ loff_t lseek(int fildes, loff_t offset, int whence)
 	}
 
 	pos = fsdrv->lseek(&f->fsdev->dev, f, pos);
-	if (pos < 0) {
+	if (IS_ERR_VALUE(pos)) {
 		errno = -pos;
 		return -1;
 	}

Signature · 7 lines

2.17.0


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Sascha Hauer

Applied

2018-06-14 05:36 UTC #7 lore raw

Re: [RESEND v4] fs: fix memory access via /dev/mem for MIPS64

Quoted 7 lines · Peter Mamonov

lseek checks for non-negative in-memory offsets (addresses), failing otherwise. However negative address 0xffffffffXXXXXXXX is a valid MIPS64 virtual address.
Signed-off-by Peter Mamonov <[email protected]>
---
 fs/fs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Applied, thanks

Sascha

Quoted 27 lines

fs/fs.c +2 -2

index b66cc9b17..8a49e32b5 100644
@@ -962,7 +962,7 @@ loff_t lseek(int fildes, loff_t offset, int whence)
 	case SEEK_SET:
 		if (f->size != FILE_SIZE_STREAM && offset > f->size)
 			goto out;
-		if (offset < 0)
+		if (IS_ERR_VALUE(offset))
 			goto out;
 		pos = offset;
 		break;

@@ -981,7 +981,7 @@ loff_t lseek(int fildes, loff_t offset, int whence)
 	}
 
 	pos = fsdrv->lseek(&f->fsdev->dev, f, pos);
-	if (pos < 0) {
+	if (IS_ERR_VALUE(pos)) {
 		errno = -pos;
 		return -1;
 	}

Signature · 1 line

2.17.0

Signature · 9 lines

Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Peter Mamonov

author

2018-05-22 15:34 UTC #8 lore raw

PATCH v3 3/12 mtd: cfi-flash: fix write_buff() for 64 bit systems

In reply to Peter Mamonov

write_buff() uses ~(flash_info.portwidth - 1) to mask lower bits of addr. This causes higher 32 bits of addr to be discarded on a 64 bit system, since flash_info.portwidth is 32 bits long (unsigned int) and addr is 64 bits long (unsigned long).

Signed-off-by Peter Mamonov <[email protected]>

---
 drivers/mtd/nor/cfi_flash.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/mtd/nor/cfi_flash.c +1 -1

index 5bdcccae1..01ab1aa27 100644
@@ -515,7 +515,7 @@ static int write_buff(struct flash_info *info, const u8 *src,
 	int buffered_size;
 #endif
 	/* get lower aligned address */
-	wp = addr & ~(info->portwidth - 1);
+	wp = addr & ~((unsigned long)info->portwidth - 1);
 
 	/* handle unaligned start */
 	aln = addr - wp;

Signature · 7 lines

2.17.0


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Peter Mamonov

author

2018-05-22 15:34 UTC #9 lore raw

PATCH v3 4/12 i2c-mux-pca954x: fix out-of-bounds write for 64 bit systems

In reply to Peter Mamonov

get_drv_data(..., &data->type) overwrites memory beyond data->type member due to mismatch of sizeof(enum pca_type) and sizeof(void *) on 64 bit systems.

Signed-off-by Peter Mamonov <[email protected]>

---
 drivers/i2c/muxes/i2c-mux-pca954x.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

drivers/i2c/muxes/i2c-mux-pca954x.c +3 -1

index 0d5515b71..395254cdc 100644
@@ -180,6 +180,7 @@ static int pca954x_probe(struct device_d *dev)
 	struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
 	int num, force;
 	struct pca954x *data;
+	uintptr_t tmp;
 	int ret = -ENODEV;
 	int gpio;

@@ -203,7 +204,8 @@ static int pca954x_probe(struct device_d *dev)
 		goto exit_free;
 	}
 
-	ret = dev_get_drvdata(dev, (const void **)&data->type);
+	ret = dev_get_drvdata(dev, (const void **)&tmp);
+	data->type = tmp;
 	if (ret)
 		goto exit_free;

Signature · 7 lines

2.17.0


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Peter Mamonov

author

2018-05-22 15:34 UTC #10 lore raw

PATCH v3 5/12 MIPS: import 64-bit address conversion macros

In reply to Peter Mamonov

Signed-off-by Peter Mamonov <[email protected]>

---
 arch/mips/include/asm/addrspace.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

arch/mips/include/asm/addrspace.h +20 -0

index 17d480d08..dc44d7f79 100644
@@ -73,6 +73,26 @@
 #define CKSEG2ADDR(a)		(CPHYSADDR(a) | CKSEG2)
 #define CKSEG3ADDR(a)		(CPHYSADDR(a) | CKSEG3)
 
+/*
+ * Cache modes for XKPHYS address conversion macros
+ */
+#define K_CALG_COH_EXCL1_NOL2	0
+#define K_CALG_COH_SHRL1_NOL2	1
+#define K_CALG_UNCACHED		2
+#define K_CALG_NONCOHERENT	3
+#define K_CALG_COH_EXCL		4
+#define K_CALG_COH_SHAREABLE	5
+#define K_CALG_NOTUSED		6
+#define K_CALG_UNCACHED_ACCEL	7
+
+/*
+ * 64-bit address conversions
+ */
+#define PHYS_TO_XKSEG_UNCACHED(p)	PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p))
+#define PHYS_TO_XKSEG_CACHED(p)		PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p))
+#define XKPHYS_TO_PHYS(p)		((p) & TO_PHYS_MASK)
+#define PHYS_TO_XKPHYS(cm, a)		(XKPHYS | (_ACAST64_(cm) << 59) | (a))
+
 #else
 
 #define CKSEG0ADDR(a)		(CPHYSADDR(a) | KSEG0)

Signature · 7 lines

2.17.0


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Peter Mamonov

author

2018-05-22 15:34 UTC #11 lore raw

PATCH v3 6/12 include/common.h: move IOMEM declaration for MIPS to arch/mips/include/asm/io.h

In reply to Peter Mamonov

Signed-off-by Peter Mamonov <[email protected]>

---
 arch/mips/include/asm/io.h | 2 ++
 include/common.h           | 7 ++-----
 2 files changed, 4 insertions(+), 5 deletions(-)

arch/mips/include/asm/io.h +2 -0

index 5a4cbf564..ee6151693 100644
@@ -106,6 +106,8 @@ static inline void __raw_writel(u32 b, volatile void __iomem *addr)
 #define out_be16(a, v)	__raw_writew(__cpu_to_be16(v), a)
 #define out_be32(a, v)	__raw_writel(__cpu_to_be32(v), a)
 
+#define IOMEM(addr)	((void __force __iomem *)CKSEG1ADDR(addr))
+
 #include <asm-generic/io.h>
 
 #endif	/* __ASM_MIPS_IO_H */

include/common.h +2 -5

index 60e5005b8..f93bd7f5d 100644
@@ -30,6 +30,7 @@
 #include <linux/kernel.h>
 #include <linux/stddef.h>
 #include <asm/common.h>
+#include <asm/io.h>
 #include <printk.h>
 
 /*

@@ -139,11 +140,7 @@ const char *barebox_get_hostname(void);
 void barebox_set_hostname(const char *);
 void barebox_set_hostname_no_overwrite(const char *);
 
-#if defined(CONFIG_MIPS)
-#include <asm/addrspace.h>
-
-#define IOMEM(addr)	((void __force __iomem *)CKSEG1ADDR(addr))
-#else
+#ifndef IOMEM
 #define IOMEM(addr)	((void __force __iomem *)(addr))
 #endif

Signature · 7 lines

2.17.0


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Peter Mamonov

author

2018-05-22 15:34 UTC #12 lore raw

PATCH v3 7/12 MIPS: add proper IOMEM() declaration for MIPS64

In reply to Peter Mamonov

Signed-off-by Peter Mamonov <[email protected]>

---
 arch/mips/include/asm/io.h | 4 ++++
 1 file changed, 4 insertions(+)

arch/mips/include/asm/io.h +4 -0

index ee6151693..c15519943 100644
@@ -106,7 +106,11 @@ static inline void __raw_writel(u32 b, volatile void __iomem *addr)
 #define out_be16(a, v)	__raw_writew(__cpu_to_be16(v), a)
 #define out_be32(a, v)	__raw_writel(__cpu_to_be32(v), a)
 
+#ifdef CONFIG_64BIT
+#define IOMEM(addr)	((void __force __iomem *)PHYS_TO_XKSEG_UNCACHED(addr))
+#else
 #define IOMEM(addr)	((void __force __iomem *)CKSEG1ADDR(addr))
+#endif
 
 #include <asm-generic/io.h>

Signature · 7 lines

2.17.0


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Peter Mamonov

author

2018-05-22 15:34 UTC #13 lore raw

PATCH v3 8/12 MIPS: fix copy_to_link_location for 64 bit mode

In reply to Peter Mamonov

MIPS lw instruction loads a 32 bit word from memory on both 32 bit and 64 bit systems. On the other hand LONGSIZE is either 4 or 8 depending on selected code model. This discrepancy causes copy_to_link_location failure on 64 bit systems.

Signed-off-by Peter Mamonov <[email protected]>

---
 arch/mips/include/asm/pbl_macros.h | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

arch/mips/include/asm/pbl_macros.h +11 ~~-10~~

index 37b150ac2..18115c848 100644
@@ -134,21 +134,22 @@
 	subu	t2, t1, t0	/* t2 <- size of pbl */
 	addu	a2, a0, t2	/* a2 <- source end address */
 
+#define WSIZE	4
 copy_loop:
 	/* copy from source address [a0] */
-	lw	t4, LONGSIZE * 0(a0)
-	lw	t5, LONGSIZE * 1(a0)
-	lw	t6, LONGSIZE * 2(a0)
-	lw	t7, LONGSIZE * 3(a0)
+	lw	t4, WSIZE * 0(a0)
+	lw	t5, WSIZE * 1(a0)
+	lw	t6, WSIZE * 2(a0)
+	lw	t7, WSIZE * 3(a0)
 	/* copy to target address [a1] */
-	sw	t4, LONGSIZE * 0(a1)
-	sw	t5, LONGSIZE * 1(a1)
-	sw	t6, LONGSIZE * 2(a1)
-	sw	t7, LONGSIZE * 3(a1)
-	addi	a0, LONGSIZE * 4
+	sw	t4, WSIZE * 0(a1)
+	sw	t5, WSIZE * 1(a1)
+	sw	t6, WSIZE * 2(a1)
+	sw	t7, WSIZE * 3(a1)
+	addi	a0, WSIZE * 4
 	subu	t3, a0, a2
 	blez	t3, copy_loop
-	 addi	a1, LONGSIZE * 4
+	 addi	a1, WSIZE * 4
 
 copy_loop_exit:

Signature · 7 lines

2.17.0


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Peter Mamonov

author

2018-05-22 15:34 UTC #14 lore raw

PATCH v3 9/12 MIPS: use CKSEG1 instead of KSEG1

In reply to Peter Mamonov

KSEG1 constant is defined for 32 bit MIPS only. Use CKSEG1 which is defined for both MIPS32 and MIPS64.

Signed-off-by Peter Mamonov <[email protected]>

---
 arch/mips/boot/dtb.c  | 4 ++--
 arch/mips/lib/c-r4k.c | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

arch/mips/boot/dtb.c +2 -2

index e7633a5af..3f7f46641 100644
@@ -30,10 +30,10 @@ void of_add_memory_bank(struct device_node *node, bool dump, int r,
 
 	if (IS_ENABLED(CONFIG_MMU)) {
 		sprintf(str, "kseg0_ram%d", r);
-		barebox_add_memory_bank(str, KSEG0 | base, size);
+		barebox_add_memory_bank(str, CKSEG0 | base, size);
 	} else {
 		sprintf(str, "kseg1_ram%d", r);
-		barebox_add_memory_bank(str, KSEG1 | base, size);
+		barebox_add_memory_bank(str, CKSEG1 | base, size);
 	}
 
 	if (dump)

arch/mips/lib/c-r4k.c +4 -4

index 150205840..cb0544a53 100644
@@ -58,14 +58,14 @@ void flush_cache_all(void)
 
 	dcache_size = c->dcache.waysize * c->dcache.ways;
 	lsize = c->dcache.linesz;
-	aend = (KSEG0 + dcache_size - 1) & ~(lsize - 1);
-	for (addr = KSEG0; addr <= aend; addr += lsize)
+	aend = (CKSEG0 + dcache_size - 1) & ~(lsize - 1);
+	for (addr = CKSEG0; addr <= aend; addr += lsize)
 		cache_op(Index_Writeback_Inv_D, addr);
 
 	icache_size = c->icache.waysize * c->icache.ways;
 	lsize = c->icache.linesz;
-	aend = (KSEG0 + icache_size - 1) & ~(lsize - 1);
-	for (addr = KSEG0; addr <= aend; addr += lsize)
+	aend = (CKSEG0 + icache_size - 1) & ~(lsize - 1);
+	for (addr = CKSEG0; addr <= aend; addr += lsize)
 		cache_op(Index_Invalidate_I, addr);
 
 	/* secondatory cache skipped */

Signature · 7 lines

2.17.0


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Peter Mamonov

author

2018-05-22 15:34 UTC #15 lore raw

PATCH v3 10/12 MIPS: add PHYS_ADDR_T_64BIT option

In reply to Peter Mamonov

Signed-off-by Peter Mamonov <[email protected]>

---
 arch/mips/Kconfig | 3 +++
 1 file changed, 3 insertions(+)

arch/mips/Kconfig +3 -0

index c2c555dc3..25c310a49 100644
@@ -25,6 +25,9 @@ config GENERIC_LINKER_SCRIPT
 config HAS_NO_BOARD_HL_CODE
 	bool
 
+config PHYS_ADDR_T_64BIT
+	bool
+
 menu "Machine selection"
 
 config BUILTIN_DTB

Signature · 7 lines

2.17.0


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Peter Mamonov

author

2018-05-22 15:34 UTC #16 lore raw

PATCH v3 11/12 MIPS: 64BIT selects PHYS_ADDR_T_64BIT

In reply to Peter Mamonov

Signed-off-by Peter Mamonov <[email protected]>

---
 arch/mips/Kconfig | 1 +
 1 file changed, 1 insertion(+)

arch/mips/Kconfig +1 -0

index 25c310a49..da613eb39 100644
@@ -278,6 +278,7 @@ config 64BIT
 	bool "64-bit barebox"
 	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
 	select ARCH_DMA_ADDR_T_64BIT
+	select PHYS_ADDR_T_64BIT
 	help
 	  Select this option if you want to build a 64-bit barebox.

Signature · 7 lines

2.17.0


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Peter Mamonov

author

2018-05-22 15:34 UTC #17 lore raw

PATCH v3 12/12 MIPS: don't use optimized string functions for MIPS64

In reply to Peter Mamonov

Barebox port of optimized string functions from Linux lacks support for MIPS64.

Signed-off-by Peter Mamonov <[email protected]>

---
 arch/mips/Kconfig | 1 +
 1 file changed, 1 insertion(+)

arch/mips/Kconfig +1 -0

index da613eb39..359f67883 100644
@@ -341,6 +341,7 @@ config NMON_HELP
 
 config MIPS_OPTIMIZED_STRING_FUNCTIONS
 	bool "use assembler optimized string functions"
+	depends on !64BIT
 	default y
 	help
 	  Say yes here to use assembler optimized memcpy / memset functions.

Signature · 7 lines

2.17.0


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Sascha Hauer

Applied

2018-05-23 08:11 UTC #18 lore raw

In reply to Peter Mamonov

Quoted 11 lines · Peter Mamonov

Hi,
This is a third revision of of the patchset which fixes various issues with 64 bit barebox, primarily MIPS related.
Differences from v2:
- add some comments to commits
- move MIPS' IOMEM declarations to arch/mips/include/asm/io.h
- skip [PATCH v2 09/12] mips: fix warnings from CPHYSADDR() macro for now
- Kconfig' options are disabled by default
- don't credit Andrey for trivial suggestions :)

Thanks for the commit messages, they really give the warm feeling that I'm doing the right thing applying these patches ;)

Applied, thanks

Sascha

Signature · 9 lines

Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox