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Reintroduce i.MX EPIT Timer

PATCH Superseded Clément Péron 3 participants 13 messages May 29, 2018

Subsystems (7)

v2 of 7 Superseded Latest is v7 →

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#0 lore raw

v2 cover Reintroduce i.MX EPIT Timer

From: Clément Peron <[email protected]>

As suggested in the commit message we have added the device tree support, proper bindings and we moved the driver into the correct folder.

Moreover we made some changes like use of relaxed IO accesor, implement sched_clock, delay_timer and reduce the clockevents min_delta.

Changes since v1 (Thanks Vladimir Zapolskiy):
- Add OF dependency in Kconfig
- Sort header
- Use BIT macro
- Remove useless comments
- Fix incorrect indent
- Fix memory leak
- Add check and handle possible returned error

Clément Peron (2):
ARM: imx: remove inexistant EPIT timer init
Documentation: DT: add i.MX EPIT timer binding

Colin Didier (3):
ARM: clk-imx6q: add EPIT clock support
clocksource: add driver for i.MX EPIT timer
ARM: dts: imx6qdl: add missing compatible and clock properties for
EPIT

 .../devicetree/bindings/clock/imx6q,epit.txt  |  25 ++
 arch/arm/boot/dts/imx6qdl.dtsi                |  12 +
 arch/arm/mach-imx/common.h                    |   1 -
 drivers/clk/imx/clk-imx6q.c                   |   2 +
 drivers/clocksource/Kconfig                   |  12 +
 drivers/clocksource/Makefile                  |   1 +
 drivers/clocksource/timer-imx-epit.c          | 273 ++++++++++++++++++
 include/dt-bindings/clock/imx6qdl-clock.h     |   4 +-
 8 files changed, 328 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/imx6q,epit.txt
 create mode 100644 drivers/clocksource/timer-imx-epit.c
Signature · 1 line
2.17.0
#1 lore raw

PATCH v2 1/5 ARM: imx: remove inexistant EPIT timer init

From: Clément Peron <[email protected]>

i.MX EPIT timer has been removed but not the init function declaration.

---
 arch/arm/mach-imx/common.h | 1 -
 1 file changed, 1 deletion(-)
arch/arm/mach-imx/common.h +0 -1
index c8d68e918b2f..18aae76fa2da 100644
@@ -38,7 +38,6 @@ void imx21_soc_init(void);
 void imx27_soc_init(void);
 void imx31_soc_init(void);
 void imx35_soc_init(void);
-void epit_timer_init(void __iomem *base, int irq);
 int mx21_clocks_init(unsigned long lref, unsigned long fref);
 int mx27_clocks_init(unsigned long fref);
 int mx31_clocks_init(unsigned long fref);
Signature · 1 line
2.17.0
#3 lore raw

PATCH v2 2/5 ARM: clk-imx6q: add EPIT clock support

In reply to Clément Péron

From: Colin Didier <[email protected]>

Add EPIT clock support to the i.MX6Q clocking infrastructure.

---
 drivers/clk/imx/clk-imx6q.c               | 2 ++
 include/dt-bindings/clock/imx6qdl-clock.h | 4 +++-
 2 files changed, 5 insertions(+), 1 deletion(-)
drivers/clk/imx/clk-imx6q.c +2 -0
index 8d518ad5dc13..b9ea7037e193 100644
@@ -753,6 +753,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
 	else
 		clk[IMX6Q_CLK_ECSPI5] = imx_clk_gate2("ecspi5",        "ecspi_root",        base + 0x6c, 8);
 	clk[IMX6QDL_CLK_ENET]         = imx_clk_gate2("enet",          "ipg",               base + 0x6c, 10);
+	clk[IMX6QDL_CLK_EPIT1]        = imx_clk_gate2("epit1",         "ipg",               base + 0x6c, 12);
+	clk[IMX6QDL_CLK_EPIT2]        = imx_clk_gate2("epit2",         "ipg",               base + 0x6c, 14);
 	clk[IMX6QDL_CLK_ESAI_EXTAL]   = imx_clk_gate2_shared("esai_extal",   "esai_podf",   base + 0x6c, 16, &share_count_esai);
 	clk[IMX6QDL_CLK_ESAI_IPG]     = imx_clk_gate2_shared("esai_ipg",   "ahb",           base + 0x6c, 16, &share_count_esai);
 	clk[IMX6QDL_CLK_ESAI_MEM]     = imx_clk_gate2_shared("esai_mem", "ahb",             base + 0x6c, 16, &share_count_esai);
include/dt-bindings/clock/imx6qdl-clock.h +3 -1
index da59fd9cdb5e..7ad171b8f3bf 100644
@@ -271,6 +271,8 @@
 #define IMX6QDL_CLK_PRE_AXI			258
 #define IMX6QDL_CLK_MLB_SEL			259
 #define IMX6QDL_CLK_MLB_PODF			260
-#define IMX6QDL_CLK_END				261
+#define IMX6QDL_CLK_EPIT1			261
+#define IMX6QDL_CLK_EPIT2			262
+#define IMX6QDL_CLK_END				263
 
 #endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */
Signature · 1 line
2.17.0
reviewer Reviewed-by on v2 2/5
#4 lore raw

Re: [PATCH v2 2/5] ARM: clk-imx6q: add EPIT clock support

Quoted 6 lines · On Tue, May 29, 2018 at 12:04 PM, Cl=C3=A9ment P=C3=A9ron <peron.clem@gmail=…

From: Colin Didier <[email protected]>

Add EPIT clock support to the i.MX6Q clocking infrastructure.

Subject could be improved to match the existing style:

clk: imx6: add EPIT clock support

Other than that:

#5 lore raw

PATCH v2 3/5 Documentation: DT: add i.MX EPIT timer binding

In reply to Clément Péron

From: Clément Peron <[email protected]>

Add devicetree binding document for NXP's i.MX SoC specific EPIT timer driver.

---
 .../devicetree/bindings/clock/imx6q,epit.txt  | 25 +++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/imx6q,epit.txt
Documentation/devicetree/bindings/clock/imx6q,epit.txt new file +25 -0
new file mode 100644
index 000000000000..d54d455cebdc
@@ -0,0 +1,25 @@
+Binding for the i.MX6 EPIT timer
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible: should be "fsl,imx6q-epit"
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- interrupts: Should contain EPIT controller interrupt
+- clocks: list of clock specifiers, must contain an entry for each required
+  entry in clock-names
+- clock-names : as described in the clock bindings
+
+Example:
+	epit1: epit@20d0000 {
+		compatible = "fsl,imx6q-epit";
+		reg = <0x020d0000 0x4000>;
+		interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clks IMX6QDL_CLK_EPIT1>,
+			<&clks IMX6QDL_CLK_IPG_PER>,
+			<&clks IMX6QDL_CLK_CKIL>;
+		clock-names = "ipg", "per", "ckil";
+	};
Signature · 1 line
2.17.0
reviewer
#6 lore raw

Re: [PATCH v2 3/5] Documentation: DT: add i.MX EPIT timer binding

Quoted 10 lines · On Tue, May 29, 2018 at 12:04 PM, Cl=C3=A9ment P=C3=A9ron <peron.clem@gmail=…

From: Cl=C3=A9ment Peron <[email protected]>

Add devicetree binding document for NXP's i.MX SoC specific EPIT timer driver.

---
 .../devicetree/bindings/clock/imx6q,epit.txt  | 25 +++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/imx6q,epit.tx=

t

Doc=

Quoted 2 lines
Doc= renamed from Documentation/devicetree/bindings/clock/imx6q,epit.txt +0 -0

umentation/devicetree/bindings/clock/imx6q,epit.txt

Quoted 5 lines

new file mode 100644
index 000000000000..d54d455cebdc

Documentation/devicetree/bindings/clock/imx6q,epit.txt line 9

Quoted 9 lines
Documentation/devicetree/bindings/clock/imx6q,epit.txt new file +9 -0
@@ -0,0 +1,25 @@
+Binding for the i.MX6 EPIT timer
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible: should be "fsl,imx6q-epit"
+- reg: physical base address of the controller and length of memory mapp=

ed

Documentation/devicetree/bindings/clock/imx6q,epit.txt

Quoted 3 lines
Documentation/devicetree/bindings/clock/imx6q,epit.txt new file +3 -0
+  region.
+- interrupts: Should contain EPIT controller interrupt
+- clocks: list of clock specifiers, must contain an entry for each requi=

red

Documentation/devicetree/bindings/clock/imx6q,epit.txt line 14

Quoted 2 lines
Documentation/devicetree/bindings/clock/imx6q,epit.txt new file +2 -0
+  entry in clock-names
+- clock-names : as described in the clock bindings

Please list the name of each required clock here.

I see that the driver does not request a "ckil" clock.

maintainer
#7 lore raw

Re: [PATCH v2 3/5] Documentation: DT: add i.MX EPIT timer binding

In reply to Clément Péron
Quoted 10 lines · On Tue, May 29, 2018 at 10:04 AM, Cl=C3=A9ment P=C3=A9ron <peron.clem@gmail=…

From: Cl=C3=A9ment Peron <[email protected]>

Add devicetree binding document for NXP's i.MX SoC specific EPIT timer driver.

---
 .../devicetree/bindings/clock/imx6q,epit.txt  | 25 +++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/imx6q,epit.tx=

t

Please send DT bindings to the correct list.

Rob

#8 lore raw

PATCH v2 4/5 clocksource: add driver for i.MX EPIT timer

In reply to Clément Péron

From: Colin Didier <[email protected]>

Add driver for NXP's EPIT timer used in i.MX 6 family of SoC.

---
 drivers/clocksource/Kconfig          |  12 ++
 drivers/clocksource/Makefile         |   1 +
 drivers/clocksource/timer-imx-epit.c | 273 +++++++++++++++++++++++++++
 3 files changed, 286 insertions(+)
 create mode 100644 drivers/clocksource/timer-imx-epit.c
drivers/clocksource/Kconfig +12 -0
index 8e8a09755d10..920a0874f3a4 100644
@@ -576,6 +576,18 @@ config H8300_TPU
 	  This enables the clocksource for the H8300 platform with the
 	  H8S2678 cpu.
 
+config CLKSRC_IMX_EPIT
+	bool "Clocksource using i.MX EPIT"
+	depends on ARM && CLKDEV_LOOKUP && OF && (ARCH_MXC || COMPILE_TEST)
+	select TIMER_OF
+	select CLKSRC_MMIO
+	help
+	  This enables EPIT support available on some i.MX platforms.
+	  Normally you don't have a reason to do so as the EPIT has
+	  the same features and uses the same clocks as the GPT.
+	  Anyway, on some systems the GPT may be in use for other
+	  purposes.
+
 config CLKSRC_IMX_GPT
 	bool "Clocksource using i.MX GPT" if COMPILE_TEST
 	depends on ARM && CLKDEV_LOOKUP
drivers/clocksource/Makefile +1 -0
index 00caf37e52f9..d9426f69ec69 100644
@@ -69,6 +69,7 @@ obj-$(CONFIG_INTEGRATOR_AP_TIMER)	+= timer-integrator-ap.o
 obj-$(CONFIG_CLKSRC_VERSATILE)		+= versatile.o
 obj-$(CONFIG_CLKSRC_MIPS_GIC)		+= mips-gic-timer.o
 obj-$(CONFIG_CLKSRC_TANGO_XTAL)		+= tango_xtal.o
+obj-$(CONFIG_CLKSRC_IMX_EPIT)		+= timer-imx-epit.o
 obj-$(CONFIG_CLKSRC_IMX_GPT)		+= timer-imx-gpt.o
 obj-$(CONFIG_CLKSRC_IMX_TPM)		+= timer-imx-tpm.o
 obj-$(CONFIG_ASM9260_TIMER)		+= asm9260_timer.o
drivers/clocksource/timer-imx-epit.c new file +273 -0

273 lines not on this page · raw message

Signature · 1 line
2.17.0
reviewer
#9 lore raw

Re: [PATCH v2 4/5] clocksource: add driver for i.MX EPIT timer

Quoted 10 lines · On Tue, May 29, 2018 at 12:04 PM, Cl=C3=A9ment P=C3=A9ron <peron.clem@gmail=…
drivers/clocksource/timer-imx-epit.c new file +10 -0
+static int __init epit_timer_init(struct device_node *np)
+{
+       struct epit_timer *epittm;
+       struct clk *clk_ipg;
+       int ret;
+
+       epittm =3D kzalloc(sizeof(*epittm), GFP_KERNEL);
+       if (!epittm)
+               return -ENOMEM;
+

drivers/clocksource/timer-imx-epit.c line 223

Quoted 10 lines
drivers/clocksource/timer-imx-epit.c new file +10 -0
+       epittm->base =3D of_iomap(np, 0);
+       if (!epittm->base) {
+               ret =3D -ENXIO;
+               goto out_kfree;
+       }
+
+       epittm->irq =3D irq_of_parse_and_map(np, 0);
+       if (!epittm->irq) {
+               ret =3D -EINVAL;
+               goto out_kfree;

You should jump to out_iounmap and call of_iounmap().

drivers/clocksource/timer-imx-epit.c line 232

Quoted 9 lines
drivers/clocksource/timer-imx-epit.c new file +9 -0
+       }
+
+       clk_ipg =3D of_clk_get_by_name(np, "ipg");
+       if (IS_ERR(clk_ipg)) {
+               pr_err("i.MX EPIT: unable to get clk_ipg\n");
+               ret =3D PTR_ERR(clk_ipg);
+               goto out_kfree;
+       }
+       clk_prepare_enable(clk_ipg);

clk_prepare_enable() may fail, so better check its return value and propagate it in the case of error.

drivers/clocksource/timer-imx-epit.c line 240

Quoted 8 lines
drivers/clocksource/timer-imx-epit.c new file +8 -0
+
+       epittm->clk_per =3D of_clk_get_by_name(np, "per");
+       if (IS_ERR(epittm->clk_per)) {
+               pr_err("i.MX EPIT: unable to get clk_per\n");
+               ret =3D PTR_ERR(epittm->clk_per);
+               goto out_clk_ipg_disable;
+       }
+       clk_prepare_enable(epittm->clk_per);

Ditto.

drivers/clocksource/timer-imx-epit.c line 244

Quoted 4 lines
drivers/clocksource/timer-imx-epit.c new file +4 -0
+
+       /*
+        * Initialise to a known state (all timers off, and timing reset)
+        */

For a single line of comment you could simply write:

/* bla bla */

#10 lore raw

Re: [PATCH v2 4/5] clocksource: add driver for i.MX EPIT timer

Hi Fabio,

Quoted 1 line · Fabio Estevam

On Tue, May 29, 2018 at 12:04 PM, Cl=C3=A9ment P=C3=A9ron <peron.clem@gma=

il.com>

Quoted 45 lines · wrote:
Quoted 10 lines
drivers/clocksource/timer-imx-epit.c new file +10 -0
+static int __init epit_timer_init(struct device_node *np)
+{
+       struct epit_timer *epittm;
+       struct clk *clk_ipg;
+       int ret;
+
+       epittm =3D kzalloc(sizeof(*epittm), GFP_KERNEL);
+       if (!epittm)
+               return -ENOMEM;
+

drivers/clocksource/timer-imx-epit.c line 223

Quoted 10 lines
drivers/clocksource/timer-imx-epit.c new file +10 -0
+       epittm->base =3D of_iomap(np, 0);
+       if (!epittm->base) {
+               ret =3D -ENXIO;
+               goto out_kfree;
+       }
+
+       epittm->irq =3D irq_of_parse_and_map(np, 0);
+       if (!epittm->irq) {
+               ret =3D -EINVAL;
+               goto out_kfree;

You should jump to out_iounmap and call of_iounmap().

drivers/clocksource/timer-imx-epit.c line 232

Quoted 9 lines
drivers/clocksource/timer-imx-epit.c new file +9 -0
+       }
+
+       clk_ipg =3D of_clk_get_by_name(np, "ipg");
+       if (IS_ERR(clk_ipg)) {
+               pr_err("i.MX EPIT: unable to get clk_ipg\n");
+               ret =3D PTR_ERR(clk_ipg);
+               goto out_kfree;
+       }
+       clk_prepare_enable(clk_ipg);

clk_prepare_enable() may fail, so better check its return value and propagate it in the case of error.

drivers/clocksource/timer-imx-epit.c line 240

Quoted 8 lines
drivers/clocksource/timer-imx-epit.c new file +8 -0
+
+       epittm->clk_per =3D of_clk_get_by_name(np, "per");
+       if (IS_ERR(epittm->clk_per)) {
+               pr_err("i.MX EPIT: unable to get clk_per\n");
+               ret =3D PTR_ERR(epittm->clk_per);
+               goto out_clk_ipg_disable;
+       }
+       clk_prepare_enable(epittm->clk_per);
Quoted 5 lines

Ditto.

Quoted 3 lines
drivers/clocksource/timer-imx-epit.c new file +3 -0
+
+       /*
+        * Initialise to a known state (all timers off, and timing

reset)

Quoted 5 lines
Quoted 1 line

+ */

For a single line of comment you could simply write:

/* bla bla */

Thanks for the review, i will send a new version

Clement

#11 lore raw

PATCH v2 5/5 ARM: dts: imx6qdl: add missing compatible and clock properties for EPIT

In reply to Clément Péron

From: Colin Didier <[email protected]>

Add missing compatible and clock properties for EPIT node.

---
 arch/arm/boot/dts/imx6qdl.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm/boot/dts/imx6qdl.dtsi +12 -0
index c003e62bf290..16fec147dcb8 100644
@@ -844,13 +844,25 @@
 			};
 
 			epit1: epit@20d0000 { /* EPIT1 */
+				compatible = "fsl,imx6q-epit";
 				reg = <0x020d0000 0x4000>;
 				interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6QDL_CLK_EPIT1>,
+					<&clks IMX6QDL_CLK_IPG_PER>,
+					<&clks IMX6QDL_CLK_CKIL>;
+				clock-names = "ipg", "per", "ckil";
+				status = "disabled";
 			};
 
 			epit2: epit@20d4000 { /* EPIT2 */
+				compatible = "fsl,imx6q-epit";
 				reg = <0x020d4000 0x4000>;
 				interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6QDL_CLK_EPIT2>,
+					<&clks IMX6QDL_CLK_IPG_PER>,
+					<&clks IMX6QDL_CLK_CKIL>;
+				clock-names = "ipg", "per", "ckil";
+				status = "disabled";
 			};
 
 			src: src@20d8000 {
Signature · 1 line
2.17.0
reviewer Reviewed-by on v2 5/5
#12 lore raw

Re: [PATCH v2 5/5] ARM: dts: imx6qdl: add missing compatible and clock properties for EPIT

Quoted 6 lines · On Tue, May 29, 2018 at 12:04 PM, Cl=C3=A9ment P=C3=A9ron <peron.clem@gmail=…

From: Colin Didier <[email protected]>

Add missing compatible and clock properties for EPIT node.