Reintroduce i.MX EPIT Timer
Subsystems (7)
v4 cover Reintroduce i.MX EPIT Timer
From: Cl?ment Peron <[email protected]>
As suggested in the commit message we have added the device tree support, proper bindings and we moved the driver into the correct folder.
Moreover we made some changes like use of relaxed IO accesor, implement sched_clock, delay_timer and reduce the clockevents min_delta.
Changes since v3:
- Clean Kconfig
- Rename imx6q-epit to imx31-epit
- Update doc and bindings
- Indent and fix
Changes since v2 (Thanks Fabio Estevam):
- Removed unused ckil clock
- Add out_iounmap
- Check and handle if clk_prepare_enable failed
- Fix comment typo
Changes since v1 (Thanks Vladimir Zapolskiy):
- Add OF dependency in Kconfig
- Sort header
- Use BIT macro
- Remove useless comments
- Fix incorrect indent
- Fix memory leak
- Add check and handle possible returned error
Cl?ment Peron (2):
ARM: imx: remove inexistant EPIT timer init
Documentation: DT: add i.MX EPIT timer binding
Colin Didier (3):
clk: imx6: add EPIT clock support
clocksource: add driver for i.MX EPIT timer
ARM: dts: imx6qdl: add missing compatible and clock properties for
EPIT
.../devicetree/bindings/timer/fsl,imxepit.txt | 24 ++ arch/arm/boot/dts/imx6qdl.dtsi | 10 + arch/arm/mach-imx/common.h | 1 - drivers/clk/imx/clk-imx6q.c | 2 + drivers/clocksource/Kconfig | 11 + drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-imx-epit.c | 281 ++++++++++++++++++ include/dt-bindings/clock/imx6qdl-clock.h | 4 +- 8 files changed, 332 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxepit.txt create mode 100644 drivers/clocksource/timer-imx-epit.c
Signature · 1 line
2.17.0
PATCH v4 1/5 ARM: imx: remove inexistant EPIT timer init
From: Cl?ment Peron <[email protected]>
i.MX EPIT timer has been removed but not the init function declaration.
--- arch/arm/mach-imx/common.h | 1 - 1 file changed, 1 deletion(-)
arch/arm/mach-imx/common.h +0 -1
@@ -38,7 +38,6 @@ void imx21_soc_init(void);void imx27_soc_init (void );void imx31_soc_init (void );void imx35_soc_init (void ); -void epit_timer_init (void __iomem *base,int irq);int mx21_clocks_init (unsigned long lref,unsigned long fref);int mx27_clocks_init (unsigned long fref);int mx31_clocks_init (unsigned long fref);
Signature · 1 line
2.17.0
PATCH v4 2/5 clk: imx6: add EPIT clock support
In reply to Clément PéronFrom: Colin Didier <[email protected]>
Add EPIT clock support to the i.MX6Q clocking infrastructure.
--- drivers/clk/imx/clk-imx6q.c | 2 ++ include/dt-bindings/clock/imx6qdl-clock.h | 4 +++- 2 files changed, 5 insertions(+), 1 deletion(-)
drivers/clk/imx/clk-imx6q.c +2 -0
@@ -753,6 +753,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)else clk[IMX6Q_CLK_ECSPI5 ] =imx_clk_gate2 ("ecspi5" ,"ecspi_root" , base +0x6c ,8 ); clk[IMX6QDL_CLK_ENET ] =imx_clk_gate2 ("enet" ,"ipg" , base +0x6c ,10 ); + clk[IMX6QDL_CLK_EPIT1 ] =imx_clk_gate2 ("epit1" ,"ipg" , base +0x6c ,12 ); + clk[IMX6QDL_CLK_EPIT2 ] =imx_clk_gate2 ("epit2" ,"ipg" , base +0x6c ,14 ); clk[IMX6QDL_CLK_ESAI_EXTAL ] =imx_clk_gate2_shared ("esai_extal" ,"esai_podf" , base +0x6c ,16 , &share_count_esai); clk[IMX6QDL_CLK_ESAI_IPG ] =imx_clk_gate2_shared ("esai_ipg" ,"ahb" , base +0x6c ,16 , &share_count_esai); clk[IMX6QDL_CLK_ESAI_MEM ] =imx_clk_gate2_shared ("esai_mem" ,"ahb" , base +0x6c ,16 , &share_count_esai);
include/dt-bindings/clock/imx6qdl-clock.h +3 -1
@@ -271,6 +271,8 @@#define IMX6QDL_CLK_PRE_AXI 258#define IMX6QDL_CLK_MLB_SEL 259#define IMX6QDL_CLK_MLB_PODF 260 -#define IMX6QDL_CLK_END 261 +#define IMX6QDL_CLK_EPIT1 261 +#define IMX6QDL_CLK_EPIT2 262 +#define IMX6QDL_CLK_END 263#endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */
Signature · 1 line
2.17.0
Re: [PATCH v4 2/5] clk: imx6: add EPIT clock support
Quoted 10 lines · Cl?ment P?ron
From: Colin Didier <[email protected]>
Add EPIT clock support to the i.MX6Q clocking infrastructure.
Signed-off-by Colin Didier <[email protected]>Signed-off-by Cl?ment Peron <[email protected]>Reviewed-by Fabio Estevam <[email protected]>--- drivers/clk/imx/clk-imx6q.c | 2 ++ include/dt-bindings/clock/imx6qdl-clock.h | 4 +++-
Quoted 1 line
2 files changed, 5 insertions(+), 1 deletion(-)
PATCH v4 3/5 Documentation: DT: add i.MX EPIT timer binding
In reply to Clément PéronFrom: Cl?ment Peron <[email protected]>
Add devicetree binding document for NXP's i.MX SoC specific EPIT timer driver.
--- .../devicetree/bindings/timer/fsl,imxepit.txt | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxepit.txt
Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file +24 -0
@@ -0,0 +1,24 @@ +Binding for the i.MX EPIT timer + +This binding uses the common clock binding[1]. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt + +Required properties: +- compatible: should be "fsl,imx31-epit" +- reg: physical base address of the controller and length of memory mapped + region. +- interrupts: Should contain EPIT controller interrupt +- clocks: list of clock specifiers, must contain an entry for each required + entry in clock-names +- clock-names : should include entries "ipg", "per" + +Example for i.MX6QDL: + epit1: epit at 20d0000 { + compatible = "fsl,imx6q-epit", "fsl,imx31-epit"; + reg = <0x020d0000 0x4000>; + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_IPG_PER>, + <&clks IMX6QDL_CLK_EPIT1>; + clock-names = "ipg", "per"; + };
Signature · 1 line
2.17.0
Rob Herring
maintainerRe: [PATCH v4 3/5] Documentation: DT: add i.MX EPIT timer binding
Quoted 1 line · Cl?ment P?ron
From: Cl?ment Peron <[email protected]>
"dt-bindings: timer: ..." is the preferred subject prefix.
Quoted 16 lines
Add devicetree binding document for NXP's i.MX SoC specific EPIT timer driver.
Signed-off-by Cl?ment Peron <[email protected]>--- .../devicetree/bindings/timer/fsl,imxepit.txt | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxepit.txtDocumentation/devicetree/bindings/timer/fsl,imxepit.txt new file +0
-0
Documentation/devicetree/bindings/timer/fsl,imxepit.txt line 5
Quoted 5 lines
Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file +5
-0@@ -0,0 +1,24 @@ +Binding for the i.MX EPIT timer + +This binding uses the common clock binding[1]. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
No need to state this. Listing "clocks" tells us that.
Documentation/devicetree/bindings/timer/fsl,imxepit.txt line 8
Quoted 3 lines
Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file +3
-0+ +Required properties: +- compatible: should be "fsl,imx31-epit"
What about imx6q listed below?
Documentation/devicetree/bindings/timer/fsl,imxepit.txt line 17
Quoted 9 lines
Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file +9
-0+- reg: physical base address of the controller and length of memory mapped + region. +- interrupts: Should contain EPIT controller interrupt +- clocks: list of clock specifiers, must contain an entry for each required + entry in clock-names +- clock-names : should include entries "ipg", "per" + +Example for i.MX6QDL: + epit1: epit at 20d0000 {
timer at ...
Quoted 10 lines
Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file +7
-0+ compatible = "fsl,imx6q-epit", "fsl,imx31-epit"; + reg = <0x020d0000 0x4000>; + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_IPG_PER>, + <&clks IMX6QDL_CLK_EPIT1>; + clock-names = "ipg", "per"; + };Signature · 1 line
2.17.0
Re: [PATCH v4 3/5] Documentation: DT: add i.MX EPIT timer binding
In reply to Clément PéronHi Cl?ment,
Quoted 17 lines · Cl?ment P?ron
From: Cl?ment Peron <[email protected]>
Add devicetree binding document for NXP's i.MX SoC specific EPIT timer driver.
Signed-off-by Cl?ment Peron <[email protected]>--- .../devicetree/bindings/timer/fsl,imxepit.txt | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxepit.txtDocumentation/devicetree/bindings/timer/fsl,imxepit.txt new file +0
-0
Documentation/devicetree/bindings/timer/fsl,imxepit.txt line 6
Quoted 6 lines
Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file +6
-0@@ -0,0 +1,24 @@ +Binding for the i.MX EPIT timer + +This binding uses the common clock binding[1]. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt +
no, this leftover reference to clock-bindings.txt is invalid, please remove it.
Instead you may add a simple description of the timer module.
Documentation/devicetree/bindings/timer/fsl,imxepit.txt line 8
Quoted 2 lines
Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file +2
-0+Required properties: +- compatible: should be "fsl,imx31-epit"
To satisfy compatibles with multiple SoCs, apparently you may follow a model, which is used with other Freescale controllers, for instance
gpio/fsl-imx-gpio.txt - compatible : Should be "fsl,<soc>-gpio"mmc/fsl-imx-esdhc.txt - compatible : Should be "fsl,<chip>-esdhc"serial/fsl-imx-uart.txt - compatible : Should be "fsl,<soc>-uart"timer/fsl,imxgpt.txt - compatible : should be "fsl,<soc>-gpt"
and so on, I hope it would cover Rob's ask.
Quoted 7 lines
Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file +6
-0+- reg: physical base address of the controller and length of memory mapped + region. +- interrupts: Should contain EPIT controller interrupt +- clocks: list of clock specifiers, must contain an entry for each required + entry in clock-names +- clock-names : should include entries "ipg", "per"
Documentation/devicetree/bindings/timer/fsl,imxepit.txt line 24
Quoted 10 lines
Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file +10
-0+ +Example for i.MX6QDL: + epit1: epit at 20d0000 { + compatible = "fsl,imx6q-epit", "fsl,imx31-epit"; + reg = <0x020d0000 0x4000>; + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_IPG_PER>, + <&clks IMX6QDL_CLK_EPIT1>; + clock-names = "ipg", "per"; + };
--
With best wishes,
Vladimir
PATCH v4 4/5 clocksource: add driver for i.MX EPIT timer
In reply to Clément PéronFrom: Colin Didier <[email protected]>
Add driver for NXP's EPIT timer used in i.MX 6 family of SoC.
--- drivers/clocksource/Kconfig | 11 ++ drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-imx-epit.c | 281 +++++++++++++++++++++++++++ 3 files changed, 293 insertions(+) create mode 100644 drivers/clocksource/timer-imx-epit.c
drivers/clocksource/Kconfig +11 -0
@@ -576,6 +576,17 @@ config H8300_TPU This enables the clocksource for the H8300 platform with the H8S2678 cpu. +config CLKSRC_IMX_EPIT + bool "Clocksource using i.MX EPIT" + depends on CLKDEV_LOOKUP && (ARCH_MXC || COMPILE_TEST) + select CLKSRC_MMIO + help + This enables EPIT support available on some i.MX platforms. + Normally you don't have a reason to do so as the EPIT has + the same features and uses the same clocks as the GPT. + Anyway, on some systems the GPT may be in use for other + purposes. + config CLKSRC_IMX_GPT bool "Clocksource using i.MX GPT" if COMPILE_TEST depends on ARM && CLKDEV_LOOKUP
drivers/clocksource/Makefile +1 -0
@@ -69,6 +69,7 @@ obj-$(CONFIG_INTEGRATOR_AP_TIMER) += timer-integrator-ap.o obj-$(CONFIG_CLKSRC_VERSATILE) += versatile.o obj-$(CONFIG_CLKSRC_MIPS_GIC) += mips-gic-timer.o obj-$(CONFIG_CLKSRC_TANGO_XTAL) += tango_xtal.o +obj-$(CONFIG_CLKSRC_IMX_EPIT) += timer-imx-epit.o obj-$(CONFIG_CLKSRC_IMX_GPT) += timer-imx-gpt.o obj-$(CONFIG_CLKSRC_IMX_TPM) += timer-imx-tpm.o obj-$(CONFIG_ASM9260_TIMER) += asm9260_timer.o
drivers/clocksource/timer-imx-epit.c new file +281 -0
281 lines not on this page · raw message
Signature · 1 line
2.17.0
Re: [PATCH v4 4/5] clocksource: add driver for i.MX EPIT timer
Hi Cl?ment,
Quoted 7 lines · Cl?ment P?ron
From: Colin Didier <[email protected]>
Add driver for NXP's EPIT timer used in i.MX 6 family of SoC.
Signed-off-by Colin Didier <[email protected]>Signed-off-by Cl?ment Peron <[email protected]>---
[snip]
Quoted 4 lines
+++
b/drivers/clocksource/timer-imx-epit.cdrivers/clocksource/timer-imx-epit.c new file +2
-0@@ -0,0 +1,281 @@ +// SPDX-License-Identifier: GPL-2.0 +/*
drivers/clocksource/timer-imx-epit.c line 12
Quoted 10 lines
drivers/clocksource/timer-imx-epit.c new file +10
-0+* i.MX EPIT Timer +* +* Copyright (C) 2010 Sascha Hauer <[email protected]> +* Copyright (C) 2018 Colin Didier <[email protected]> +* Copyright (C) 2018 Cl?ment P?ron <[email protected]> +*/ + +#include <linux/clk.h> +#include <linux/clockchips.h> +#include <linux/err.h>
The included header above still can be removed.
I have no more comments about the code, I will try to find time to test the driver, but please don't take it as a promise.
--
With best wishes,
Vladimir
Re: [PATCH v4 4/5] clocksource: add driver for i.MX EPIT timer
Hi Vladimir,
Quoted 14 lines · Vladimir Zapolskiy
Hi Cl?ment,
Quoted 7 lines · Cl?ment P?ron
From: Colin Didier <[email protected]>
Add driver for NXP's EPIT timer used in i.MX 6 family of SoC.
Signed-off-by Colin Didier <[email protected]>Signed-off-by Cl?ment Peron <[email protected]>---
[snip]
Quoted 16 lines
Quoted 4 lines
+++
b/drivers/clocksource/timer-imx-epit.cdrivers/clocksource/timer-imx-epit.c new file +2
-0@@ -0,0 +1,281 @@ +// SPDX-License-Identifier: GPL-2.0 +/* drivers/clocksource/timer-imx-epit.c line 12
Quoted 10 lines
drivers/clocksource/timer-imx-epit.c new file +10
-0+* i.MX EPIT Timer +* +* Copyright (C) 2010 Sascha Hauer <[email protected]> +* Copyright (C) 2018 Colin Didier <[email protected]> +* Copyright (C) 2018 Cl?ment P?ron <[email protected]> +*/ + +#include <linux/clk.h> +#include <linux/clockchips.h> +#include <linux/err.h> The included header above still can be removed.
Ok.
Quoted 3 lines
I have no more comments about the code, I will try to find time to test the driver, but please don't take it as a promise.
Regarding the clks, i think the management of the ipg clk in the driver is useless
has it is already handled by the imx clk driver.
I remove the ipg clk and test it on i.MX6Q.
My test is limited to disabled the GPT and enabled the EPIT in the device-tree
&gpt {
status = "disabled";
};&epit1 {
status = "okay";
};[ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Linux version 4.17.0-rc6 (cperon at cperon-Latitude-7490) (gcc version 6.4.1 20170707 (Linaro GCC 6.4-2017.08)) #1 SMP PREEMPT Mon Jun 4 11:13:41 CEST 2018 [ 0.000000] CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache [ 0.000000] OF: fdt: Machine model: Devialet Aerobase [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] On node 0 totalpages: 262144 [ 0.000000] Normal zone: 2048 pages used for memmap [ 0.000000] Normal zone: 0 pages reserved [ 0.000000] Normal zone: 262144 pages, LIFO batch:31 [ 0.000000] random: get_random_bytes called from start_kernel+0x80/0x398 with crng_init=0 [ 0.000000] percpu: Embedded 16 pages/cpu @(ptrval) s35084 r8192 d22260 u65536 [ 0.000000] pcpu-alloc: s35084 r8192 d22260 u65536 alloc=16*4096 [ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 260096 [ 0.000000] Kernel command line: console=ttymxc0,115200 root=/dev/nfs rw nfsroot=192.168.0.4:/opt/nfsroot,v3,tcp ip=dhcp [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 1029544K/1048576K available (6144K kernel code, 194K rwdata, 1312K rodata, 1024K init, 224K bss, 19032K reserved, 0K cma-reserved) [ 0.000000] Virtual kernel memory layout: [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Tasks RCU enabled.\x00 [ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16 [ 0.000000] L2C-310 errata 752271 769419 enabled [ 0.000000] L2C-310 enabling early BRESP for Cortex-A9 [ 0.000000] L2C-310 full line of zeros enabled for Cortex-A9 [ 0.000000] L2C-310 ID prefetch enabled, offset 16 lines [ 0.000000] L2C-310 dynamic clock gating enabled, standby mode enabled [ 0.000000] L2C-310 cache controller enabled, 16 ways, 1024 kB [ 0.000000] L2C-310: CACHE_ID 0x410000c7, AUX_CTRL 0x76470001 [ 0.000012] sched_clock: 32 bits at 66MHz, resolution 15ns, wraps every 32537631224ns [ 0.000032] clocksource: epit: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 28958491609 ns [ 0.001231] Calibrating delay loop... 1560.57 BogoMIPS (lpj=780288) [ 0.008161] pid_max: default: 32768 minimum: 301 [ 0.008336] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.008360] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.009042] CPU: Testing write buffer coherency: ok [ 0.009506] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.014238] Setting up static identity map for 0x10100000 - 0x10100060 [ 0.015207] Hierarchical SRCU implementation. [ 0.017208] smp: Bringing up secondary CPUs ... [ 0.029147] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.041146] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002 [ 0.053146] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003 [ 0.053321] smp: Brought up 1 node, 4 CPUs [ 0.053340] SMP: Total of 4 processors activated (6303.74 BogoMIPS). [ 0.053349] CPU: All CPU(s) started in SVC mode. [ 0.054441] devtmpfs: initialized [ 0.063770] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4 [ 0.064454] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns [ 0.064477] futex hash table entries: 1024 (order: 4, 65536 bytes) [ 0.064742] pinctrl core: initialized pinctrl subsystem [ 0.066693] NET: Registered protocol family 16 [ 0.068623] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.071654] cpuidle: using governor menu [ 0.071802] CPU identified as i.MX6Q, silicon rev 1.2
Quoted 4 lines
--
With best wishes,
Vladimir
PATCH v4 5/5 ARM: dts: imx6qdl: add missing compatible and clock properties for EPIT
In reply to Clément PéronFrom: Colin Didier <[email protected]>
Add missing compatible and clock properties for EPIT node.
--- arch/arm/boot/dts/imx6qdl.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)
arch/arm/boot/dts/imx6qdl.dtsi +10 -0
@@ -844,13 +844,23 @@ }; epit1: epit at 20d0000 { /* EPIT1 */ + compatible = "fsl,imx6q-epit", "fsl,imx31-epit"; reg = <0x020d0000 0x4000>; interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_IPG_PER>, + <&clks IMX6QDL_CLK_EPIT1>; + clock-names = "ipg", "per"; + status = "disabled"; }; epit2: epit at 20d4000 { /* EPIT2 */ + compatible = "fsl,imx6q-epit", "fsl,imx31-epit"; reg = <0x020d4000 0x4000>; interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_IPG_PER>, + <&clks IMX6QDL_CLK_EPIT2>; + clock-names = "ipg", "per"; + status = "disabled"; }; src: src at 20d8000 {
Signature · 1 line
2.17.0
Re: [PATCH v4 5/5] ARM: dts: imx6qdl: add missing compatible and clock properties for EPIT
Quoted 16 lines · Cl?ment P?ron
From: Colin Didier <[email protected]>
Add missing compatible and clock properties for EPIT node.
Signed-off-by Colin Didier <[email protected]>Signed-off-by Cl?ment Peron <[email protected]>Reviewed-by Fabio Estevam <[email protected]>--- arch/arm/boot/dts/imx6qdl.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)arch/arm/boot/dts/imx6qdl.dtsi +0
-0
arch/arm/boot/dts/imx6qdl.dtsi line 846
Quoted 3 lines
arch/arm/boot/dts/imx6qdl.dtsi +0
-0@@ -844,13 +844,23 @@ }; epit1: epit at 20d0000 { /* EPIT1 */
epit1: timer at 20d0000 { ...
And /* EPIT1 */ comment can be removed, it is quite clear from the same line context.
Formally it is a subject to another patch, but I think this can be accepted as a part of this one.
arch/arm/boot/dts/imx6qdl.dtsi line 856
Quoted 10 lines
arch/arm/boot/dts/imx6qdl.dtsi +5
-0+ compatible = "fsl,imx6q-epit", "fsl,imx31-epit"; reg = <0x020d0000 0x4000>; interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_IPG_PER>, + <&clks IMX6QDL_CLK_EPIT1>; + clock-names = "ipg", "per"; + status = "disabled"; }; epit2: epit at 20d4000 { /* EPIT2 */
Same as above.
arch/arm/boot/dts/imx6qdl.dtsi line 866
Quoted 11 lines
arch/arm/boot/dts/imx6qdl.dtsi +5
-0+ compatible = "fsl,imx6q-epit", "fsl,imx31-epit"; reg = <0x020d4000 0x4000>; interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_IPG_PER>, + <&clks IMX6QDL_CLK_EPIT2>; + clock-names = "ipg", "per"; + status = "disabled"; }; src: src at 20d8000 {
--
With best wishes,
Vladimir
Re: [PATCH v4 5/5] ARM: dts: imx6qdl: add missing compatible and clock properties for EPIT
Hi Vladimir,
Quoted 24 lines · Vladimir Zapolskiy
Quoted 16 lines · Cl?ment P?ron
From: Colin Didier <[email protected]>
Add missing compatible and clock properties for EPIT node.
Signed-off-by Colin Didier <[email protected]>Signed-off-by Cl?ment Peron <[email protected]>Reviewed-by Fabio Estevam <[email protected]>--- arch/arm/boot/dts/imx6qdl.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)arch/arm/boot/dts/imx6qdl.dtsi +0
-0arch/arm/boot/dts/imx6qdl.dtsi line 846
Quoted 3 lines
arch/arm/boot/dts/imx6qdl.dtsi +0
-0@@ -844,13 +844,23 @@ }; epit1: epit at 20d0000 { /* EPIT1 */epit1: timer at 20d0000 { ...
Quoted 5 lines
And /* EPIT1 */ comment can be removed, it is quite clear from the same line context.
Formally it is a subject to another patch, but I think this can be accepted as a part of this one.
Should I also update other boards ?
I only did it for imx6qdl.dtsi, but the EPIT is present in other boards but i can't test it myself.
Quoted 29 lines
arch/arm/boot/dts/imx6qdl.dtsi line 856
Quoted 11 lines
arch/arm/boot/dts/imx6qdl.dtsi +5
-0+ compatible = "fsl,imx6q-epit", "fsl,imx31-epit"; reg = <0x020d0000 0x4000>; interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_IPG_PER>, + <&clks IMX6QDL_CLK_EPIT1>; + clock-names = "ipg", "per"; + status = "disabled"; }; epit2: epit at 20d4000 { /* EPIT2 */Same as above.
arch/arm/boot/dts/imx6qdl.dtsi line 866
Quoted 11 lines
arch/arm/boot/dts/imx6qdl.dtsi +5
-0+ compatible = "fsl,imx6q-epit", "fsl,imx31-epit"; reg = <0x020d4000 0x4000>; interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_IPG_PER>, + <&clks IMX6QDL_CLK_EPIT2>; + clock-names = "ipg", "per"; + status = "disabled"; }; src: src at 20d8000 {--
With best wishes,
Vladimir
Re: [PATCH v4 5/5] ARM: dts: imx6qdl: add missing compatible and clock properties for EPIT
Hi Cl?ment,
Quoted 31 lines · Cl?ment P?ron
Hi Vladimir,
Quoted 27 lines · Vladimir Zapolskiy
Quoted 16 lines · Cl?ment P?ron
From: Colin Didier <[email protected]>
Add missing compatible and clock properties for EPIT node.
Signed-off-by Colin Didier <[email protected]>Signed-off-by Cl?ment Peron <[email protected]>Reviewed-by Fabio Estevam <[email protected]>--- arch/arm/boot/dts/imx6qdl.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)arch/arm/boot/dts/imx6qdl.dtsi +0
-0arch/arm/boot/dts/imx6qdl.dtsi line 846
Quoted 3 lines
arch/arm/boot/dts/imx6qdl.dtsi +0
-0@@ -844,13 +844,23 @@ }; epit1: epit at 20d0000 { /* EPIT1 */epit1: timer at 20d0000 { ...
And /* EPIT1 */ comment can be removed, it is quite clear from the same line context.
Quoted 7 lines
Quoted 2 lines
Formally it is a subject to another patch, but I think this can be accepted as a part of this one.
Should I also update other boards ?
I only did it forimx6qdl.dtsi, but the EPIT is present in other boards but i can't test it myself.
Sure, please do it, why not, it is quite a safe modification.
One change per one dtsi file will suffice, and I see that imx25.dtsi already contains the requested change, however probably you may want to update its compatible = "fsl,imx25-epit" line.
Regarding compatibles for other imx6* SoCs, I think all of them should be documented in fsl,imxepit.txt and then added to the correspondent dtsi files one per SoC.
And I forgot the outcome of one former discussion with Uwe Kleine-K?nig, but if my bad memory serves me, we agreed that i.MX25 was released later than i.MX31, so the most generic (the last value in the list) compatible should be a compatible with i.MX31 like in
imx25.dtsi:367: compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
--
With best wishes,
Vladimir
Re: [PATCH v4 5/5] ARM: dts: imx6qdl: add missing compatible and clock properties for EPIT
Hi Vladimir,
Quoted 45 lines · Vladimir Zapolskiy
Hi Cl?ment,
Quoted 31 lines · Cl?ment P?ron
Hi Vladimir,
Quoted 27 lines · Vladimir Zapolskiy
Quoted 16 lines · Cl?ment P?ron
From: Colin Didier <[email protected]>
Add missing compatible and clock properties for EPIT node.
Signed-off-by Colin Didier <[email protected]>Signed-off-by Cl?ment Peron <[email protected]>Reviewed-by Fabio Estevam <[email protected]>--- arch/arm/boot/dts/imx6qdl.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)arch/arm/boot/dts/imx6qdl.dtsi +0
-0arch/arm/boot/dts/imx6qdl.dtsi line 846
Quoted 3 lines
arch/arm/boot/dts/imx6qdl.dtsi +0
-0@@ -844,13 +844,23 @@ }; epit1: epit at 20d0000 { /* EPIT1 */epit1: timer at 20d0000 { ...
And /* EPIT1 */ comment can be removed, it is quite clear from the same line context.
Quoted 7 lines
Quoted 2 lines
Formally it is a subject to another patch, but I think this can be accepted as a part of this one.
Should I also update other boards ?
I only did it forimx6qdl.dtsi, but the EPIT is present in other boards but i can't test it myself.Sure, please do it, why not, it is quite a safe modification.
Quoted 7 lines
One change per one dtsi file will suffice, and I see that
imx25.dtsialready contains the requested change, however probably you may want to update its compatible = "fsl,imx25-epit" line.Regarding compatibles for other imx6* SoCs, I think all of them should be documented in fsl,imxepit.txt and then added to the correspondent dtsi files one per SoC.
Nvidia UART doc did this :
- For other Tegra, must contain '"nvidia,<chip>-uart", "nvidia,tegra20-uart"' where <chip> is tegra30, tegra114, tegra124,
I will follow this.
Quoted 11 lines
And I forgot the outcome of one former discussion with Uwe Kleine-K?nig, but if my bad memory serves me, we agreed that i.MX25 was released later than i.MX31, so the most generic (the last value in the list) compatible should be a compatible with i.MX31 like in
imx25.dtsi:367: compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";--
With best wishes,
Vladimir
Regards,
Clement