Reintroduce i.MX EPIT Timer

PATCH Superseded Clément Péron 3 participants 9 messages Jun 4, 2018 – Jun 6, 2018

Subsystems (5)

Device tree bindings Arm (32-bit) Arm sub-architectures Arm i.MX and Layerscape +1 more subsystems

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Clément Péron

author

2018-06-04 10:00 UTC #0 lore raw

v5 cover Reintroduce i.MX EPIT Timer

From: Cl?ment Peron <[email protected]>

As suggested in the commit message we have added the device tree support, proper bindings and we moved the driver into the correct folder.

Moreover we made some changes like use of relaxed IO accesor, implement sched_clock, delay_timer and reduce the clockevents min_delta.

Changes since v4:
- removed ipg clk
- change in dt epit to timer
- add introduction in doc
- add all compatibles in doc
- update epit entry for other i.MX device-trees

Changes since v3:
- Clean Kconfig
- Rename imx6q-epit to imx31-epit
- Update doc and bindings
- Indent and fix

Changes since v2 (Thanks Fabio Estevam):
- Removed unused ckil clock
- Add out_iounmap
- Check and handle if clk_prepare_enable failed
- Fix comment typo

Changes since v1 (Thanks Vladimir Zapolskiy):
- Add OF dependency in Kconfig
- Sort header
- Use BIT macro
- Remove useless comments
- Fix incorrect indent
- Fix memory leak
- Add check and handle possible returned error

Cl?ment Peron (2):
ARM: imx: remove inexistant EPIT timer init
dt-bindings: timer: add i.MX EPIT timer binding

Colin Didier (2):
clocksource: add driver for i.MX EPIT timer
ARM: dts: imx: add missing compatible and clock properties for EPIT

 .../devicetree/bindings/timer/fsl,imxepit.txt |  21 ++
 arch/arm/boot/dts/imx25.dtsi                  |   8 +-
 arch/arm/boot/dts/imx6qdl.dtsi                |  10 +-
 arch/arm/boot/dts/imx6sl.dtsi                 |  14 +-
 arch/arm/boot/dts/imx6sx.dtsi                 |  10 +-
 arch/arm/boot/dts/imx6ul.dtsi                 |  10 +-
 arch/arm/mach-imx/common.h                    |   1 -
 drivers/clocksource/Kconfig                   |  11 +
 drivers/clocksource/Makefile                  |   1 +
 drivers/clocksource/timer-imx-epit.c          | 265 ++++++++++++++++++
 10 files changed, 338 insertions(+), 13 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxepit.txt
 create mode 100644 drivers/clocksource/timer-imx-epit.c

Signature · 1 line

2.17.0

Clément Péron

author

2018-06-04 10:00 UTC #1 lore raw

PATCH v5 1/4 ARM: imx: remove inexistant EPIT timer init

From: Cl?ment Peron <[email protected]>

i.MX EPIT timer has been removed but not the init function declaration.

Signed-off-by Cl?ment Peron <[email protected]>

Reviewed-by Fabio Estevam <[email protected]>

---
 arch/arm/mach-imx/common.h | 1 -
 1 file changed, 1 deletion(-)

arch/arm/mach-imx/common.h +0 -1

index c8d68e918b2f..18aae76fa2da 100644
@@ -38,7 +38,6 @@ void imx21_soc_init(void);
 void imx27_soc_init(void);
 void imx31_soc_init(void);
 void imx35_soc_init(void);
-void epit_timer_init(void __iomem *base, int irq);
 int mx21_clocks_init(unsigned long lref, unsigned long fref);
 int mx27_clocks_init(unsigned long fref);
 int mx31_clocks_init(unsigned long fref);

Signature · 1 line

2.17.0

Clément Péron

author

2018-06-04 10:00 UTC #2 lore raw

PATCH v5 2/4 dt-bindings: timer: add i.MX EPIT timer binding

In reply to Clément Péron

From: Cl?ment Peron <[email protected]>

Add devicetree binding document for NXP's i.MX SoC specific EPIT timer driver.

Signed-off-by Cl?ment Peron <[email protected]>

---
 .../devicetree/bindings/timer/fsl,imxepit.txt | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxepit.txt

Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file +21 -0

new file mode 100644
index 000000000000..de2e6ef68d24
@@ -0,0 +1,21 @@
+Binding for the i.MX Enhanced Periodic Interrupt Timer (EPIT)
+
+The Enhanced Periodic Interrupt Timer (EPIT) is a 32-bit set-and-forget timer
+that is capable of providing precise interrupts at regular intervals with
+minimal processor intervention.
+
+Required properties:
+- compatible: should be "fsl,<chip>-epit", "fsl,imx31-epit" where <chip> is
+  imx25, imx6qdl, imx6sl, imx6sul or imx6sx.
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- interrupts: Should contain EPIT controller interrupt
+- clocks : The clock provided by the SoC to drive the timer.
+
+Example for i.MX6QDL:
+	epit1: epit at 20d0000 {
+		compatible = "fsl,imx6qdl-epit", "fsl,imx31-epit";
+		reg = <0x020d0000 0x4000>;
+		interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clks IMX6QDL_CLK_EPIT1>;
+	};

Signature · 1 line

2.17.0

Rob Herring

maintainer

2018-06-05 15:23 UTC #3 lore raw

Re: [PATCH v5 2/4] dt-bindings: timer: add i.MX EPIT timer binding

Quoted 23 lines · Cl?ment P?ron

From: Cl?ment Peron <[email protected]>
Add devicetree binding document for NXP's i.MX SoC specific EPIT timer driver.
Signed-off-by Cl?ment Peron <[email protected]>
---
 .../devicetree/bindings/timer/fsl,imxepit.txt | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxepit.txt
Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file +6 -0
new file mode 100644
index 000000000000..de2e6ef68d24
@@ -0,0 +1,21 @@
+Binding for the i.MX Enhanced Periodic Interrupt Timer (EPIT)
+
+The Enhanced Periodic Interrupt Timer (EPIT) is a 32-bit set-and-forget timer
+that is capable of providing precise interrupts at regular intervals with
+minimal processor intervention.
+

Documentation/devicetree/bindings/timer/fsl,imxepit.txt line 16

Quoted 10 lines

Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file +10 -0

+Required properties:
+- compatible: should be "fsl,<chip>-epit", "fsl,imx31-epit" where <chip> is
+  imx25, imx6qdl, imx6sl, imx6sul or imx6sx.
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- interrupts: Should contain EPIT controller interrupt
+- clocks : The clock provided by the SoC to drive the timer.
+
+Example for i.MX6QDL:
+	epit1: epit at 20d0000 {

I think I already mentioned this, but:

timer at ...

Quoted 8 lines

Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file +5 -0
+		compatible = "fsl,imx6qdl-epit", "fsl,imx31-epit";
+		reg = <0x020d0000 0x4000>;
+		interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clks IMX6QDL_CLK_EPIT1>;
+	};
Signature · 1 line
2.17.0

Clément Péron

author

2018-06-06 08:12 UTC #4 lore raw

Re: [PATCH v5 2/4] dt-bindings: timer: add i.MX EPIT timer binding

Hi Rob,

Quoted 29 lines · Rob Herring

Quoted 27 lines · Cl?ment P?ron

From: Cl?ment Peron <[email protected]>

Add devicetree binding document for NXP's i.MX SoC specific EPIT timer driver.

Signed-off-by Cl?ment Peron <[email protected]>

---
 .../devicetree/bindings/timer/fsl,imxepit.txt | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxepit.txt

Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file +10 -0

new file mode 100644
index 000000000000..de2e6ef68d24
@@ -0,0 +1,21 @@
+Binding for the i.MX Enhanced Periodic Interrupt Timer (EPIT)
+
+The Enhanced Periodic Interrupt Timer (EPIT) is a 32-bit set-and-forget timer
+that is capable of providing precise interrupts at regular intervals with
+minimal processor intervention.
+
+Required properties:
+- compatible: should be "fsl,<chip>-epit", "fsl,imx31-epit" where <chip> is
+  imx25, imx6qdl, imx6sl, imx6sul or imx6sx.
+- reg: physical base address of the controller and length of memory mapped

Quoted 8 lines

Documentation/devicetree/bindings/timer/fsl,imxepit.txt line 16
Quoted 6 lines
Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file +6 -0
+  region.
+- interrupts: Should contain EPIT controller interrupt
+- clocks : The clock provided by the SoC to drive the timer.
+
+Example for i.MX6QDL:
+     epit1: epit at 20d0000 {
I think I already mentioned this, but:

My bad, will update it

Quoted 11 lines

timer at ...

Quoted 8 lines

Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file +5 -1

+             compatible = "fsl,imx6qdl-epit", "fsl,imx31-epit";
+             reg = <0x020d0000 0x4000>;
+             interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
+             clocks = <&clks IMX6QDL_CLK_EPIT1>;
+     };
--

2.17.0

Clément Péron

author

2018-06-04 10:00 UTC #5 lore raw

PATCH v5 3/4 clocksource: add driver for i.MX EPIT timer

In reply to Clément Péron

From: Colin Didier <[email protected]>

Add driver for NXP's EPIT timer used in i.MX SoC.

Signed-off-by Colin Didier <[email protected]>

Signed-off-by Cl?ment Peron <[email protected]>

---
 drivers/clocksource/Kconfig          |  11 ++
 drivers/clocksource/Makefile         |   1 +
 drivers/clocksource/timer-imx-epit.c | 265 +++++++++++++++++++++++++++
 3 files changed, 277 insertions(+)
 create mode 100644 drivers/clocksource/timer-imx-epit.c

drivers/clocksource/Kconfig +11 -0

index 8e8a09755d10..790478afd02c 100644
@@ -576,6 +576,17 @@ config H8300_TPU
 	  This enables the clocksource for the H8300 platform with the
 	  H8S2678 cpu.
 
+config CLKSRC_IMX_EPIT
+	bool "Clocksource using i.MX EPIT"
+	depends on CLKDEV_LOOKUP && (ARCH_MXC || COMPILE_TEST)
+	select CLKSRC_MMIO
+	help
+	  This enables EPIT support available on some i.MX platforms.
+	  Normally you don't have a reason to do so as the EPIT has
+	  the same features and uses the same clocks as the GPT.
+	  Anyway, on some systems the GPT may be in use for other
+	  purposes.
+
 config CLKSRC_IMX_GPT
 	bool "Clocksource using i.MX GPT" if COMPILE_TEST
 	depends on ARM && CLKDEV_LOOKUP

drivers/clocksource/Makefile +1 -0

index 00caf37e52f9..d9426f69ec69 100644
@@ -69,6 +69,7 @@ obj-$(CONFIG_INTEGRATOR_AP_TIMER)	+= timer-integrator-ap.o
 obj-$(CONFIG_CLKSRC_VERSATILE)		+= versatile.o
 obj-$(CONFIG_CLKSRC_MIPS_GIC)		+= mips-gic-timer.o
 obj-$(CONFIG_CLKSRC_TANGO_XTAL)		+= tango_xtal.o
+obj-$(CONFIG_CLKSRC_IMX_EPIT)		+= timer-imx-epit.o
 obj-$(CONFIG_CLKSRC_IMX_GPT)		+= timer-imx-gpt.o
 obj-$(CONFIG_CLKSRC_IMX_TPM)		+= timer-imx-tpm.o
 obj-$(CONFIG_ASM9260_TIMER)		+= asm9260_timer.o

drivers/clocksource/timer-imx-epit.c new file +265 -0

265 lines not on this page · raw message

Signature · 1 line

2.17.0

Clément Péron

author

2018-06-04 10:00 UTC #6 lore raw

PATCH v5 4/4 ARM: dts: imx: add missing compatible and clock properties for EPIT

In reply to Clément Péron

From: Colin Didier <[email protected]>

Add missing compatible and clock properties for EPIT node.

Signed-off-by Colin Didier <[email protected]>

Signed-off-by Cl?ment Peron <[email protected]>

---
 arch/arm/boot/dts/imx25.dtsi   |  8 ++++++--
 arch/arm/boot/dts/imx6qdl.dtsi | 10 ++++++++--
 arch/arm/boot/dts/imx6sl.dtsi  | 14 ++++++++++----
 arch/arm/boot/dts/imx6sx.dtsi  | 10 ++++++++--
 arch/arm/boot/dts/imx6ul.dtsi  | 10 ++++++++--
 5 files changed, 40 insertions(+), 12 deletions(-)

arch/arm/boot/dts/imx25.dtsi +6 -2

index cf70df20b19c..15fd4308dad8 100644
@@ -396,15 +396,19 @@
 			};
 
 			epit1: timer at 53f94000 {
-				compatible = "fsl,imx25-epit";
+				compatible = "fsl,imx25-epit", "fsl,imx31-epit";
 				reg = <0x53f94000 0x4000>;
 				interrupts = <28>;
+				clocks = <&clks 83>;
+				status = "disabled";
 			};
 
 			epit2: timer at 53f98000 {
-				compatible = "fsl,imx25-epit";
+				compatible = "fsl,imx25-epit", "fsl,imx31-epit";
 				reg = <0x53f98000 0x4000>;
 				interrupts = <27>;
+				clocks = <&clks 84>;
+				status = "disabled";
 			};
 
 			gpio4: gpio at 53f9c000 {

arch/arm/boot/dts/imx6qdl.dtsi +8 -2

index c003e62bf290..65c4ee07454c 100644
@@ -843,14 +843,20 @@
 				};
 			};
 
-			epit1: epit at 20d0000 { /* EPIT1 */
+			epit1: timer at 20d0000 {
+				compatible = "fsl,imx6qdl-epit", "fsl,imx31-epit";
 				reg = <0x020d0000 0x4000>;
 				interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6QDL_CLK_EPIT1>;
+				status = "disabled";
 			};
 
-			epit2: epit at 20d4000 { /* EPIT2 */
+			epit2: timer at 20d4000 {
+				compatible = "fsl,imx6qdl-epit", "fsl,imx31-epit";
 				reg = <0x020d4000 0x4000>;
 				interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6QDL_CLK_EPIT2>;
+				status = "disabled";
 			};
 
 			src: src at 20d8000 {

arch/arm/boot/dts/imx6sl.dtsi +10 -4

index ab6a7e2e7e8f..6229bbef7ccc 100644
@@ -671,14 +671,20 @@
 				};
 			};
 
-			epit1: epit at 20d0000 {
+			epit1: timer at 20d0000 {
+				compatible = "fsl,imx6sl-epit", "fsl,imx31-epit";
 				reg = <0x020d0000 0x4000>;
-				interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
+				interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6SL_CLK_EPIT1>;
+				status = "disabled";
 			};
 
-			epit2: epit at 20d4000 {
+			epit2: timer at 20d4000 {
+				compatible = "fsl,imx6sl-epit", "fsl,imx31-epit";
 				reg = <0x020d4000 0x4000>;
-				interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
+				interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6SL_CLK_EPIT2>;
+				status = "disabled";
 			};
 
 			src: src at 20d8000 {

arch/arm/boot/dts/imx6sx.dtsi +8 -2

index 49c7205b8db8..2b30559d3270 100644
@@ -736,14 +736,20 @@
 				};
 			};
 
-			epit1: epit at 20d0000 {
+			epit1: timer at 20d0000 {
+				compatible = "fsl,imx6sx-epit", "fsl,imx31-epit";
 				reg = <0x020d0000 0x4000>;
 				interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6SX_CLK_EPIT1>;
+				status = "disabled";
 			};
 
-			epit2: epit at 20d4000 {
+			epit2: timer at 20d4000 {
+				compatible = "fsl,imx6sx-epit", "fsl,imx31-epit";
 				reg = <0x020d4000 0x4000>;
 				interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6SX_CLK_EPIT2>;
+				status = "disabled";
 			};
 
 			src: src at 20d8000 {

arch/arm/boot/dts/imx6ul.dtsi +8 -2

index 1241972b16ba..d5f765da1ee2 100644
@@ -658,14 +658,20 @@
 				};
 			};
 
-			epit1: epit at 20d0000 {
+			epit1: timer at 20d0000 {
+				compatible = "fsl,imx6ul-epit", "fsl,imx31-epit";
 				reg = <0x020d0000 0x4000>;
 				interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6UL_CLK_EPIT1>;
+				status = "disabled";
 			};
 
-			epit2: epit at 20d4000 {
+			epit2: timer at 20d4000 {
+				compatible = "fsl,imx6ul-epit", "fsl,imx31-epit";
 				reg = <0x020d4000 0x4000>;
 				interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6UL_CLK_EPIT2>;
+				status = "disabled";
 			};
 
 			src: src at 20d8000 {

Signature · 1 line

2.17.0

kbuild test robot

build bot

2018-06-04 14:57 UTC #7 lore raw

Re: [PATCH v5 4/4] ARM: dts: imx: add missing compatible and clock properties for EPIT

Thank you for the patch! Yet something to improve:

Hi Colin,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on shawnguo/for-next]
[also build test ERROR on v4.17 next-20180601]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Cl-ment-P-ron/Reintroduce-i-MX-EPIT-Timer/20180604-211036
base:   https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git for-next
config: arm-realview_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0

reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm

All errors (new ones prefixed by >>):

>> Error: arch/arm/boot/dts/imx6sl.dtsi:661.19-20 syntax error

FATAL ERROR: Unable to parse input tree

---
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https://lists.01.org/pipermail/kbuild-all Intel Corporation
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kbuild test robot

build bot

2018-06-04 17:58 UTC #8 lore raw

Re: [PATCH v5 4/4] ARM: dts: imx: add missing compatible and clock properties for EPIT

In reply to Clément Péron

Thank you for the patch! Yet something to improve:

Hi Colin,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on shawnguo/for-next]
[also build test ERROR on v4.17 next-20180601]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Cl-ment-P-ron/Reintroduce-i-MX-EPIT-Timer/20180604-211036
base:   https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git for-next
config: arm-at91_dt_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0

All errors (new ones prefixed by >>):

>> Error: arch/arm/boot/dts/imx6qdl.dtsi:832.21-22 syntax error

FATAL ERROR: Unable to parse input tree

---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation