x86/apic/vector: Print APIC control bits in debugfs
PATCH 8/8 x86/apic/vector: Print APIC control bits in debugfs
Extend the debugability of the vector management by adding the state bits to the debugfs output.
Signed-off-by Thomas Gleixner <[email protected]>
--- arch/x86/kernel/apic/vector.c | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-)
arch/x86/kernel/apic/vector.c +14 -13
@@ -588,8 +588,7 @@ static int x86_vector_alloc_irqs(structstatic void x86_vector_debug_show (struct seq_file *m,struct irq_domain *d,struct irq_data *irqd,int ind) { -unsigned int cpu, vector, prev_cpu, prev_vector; -struct apic_chip_data *apicd; +struct apic_chip_data apicd;unsigned long flags;int irq;
@@ -605,24 +604,26 @@ static void x86_vector_debug_show(structreturn ; } - apicd = irqd->chip_data; -if (!apicd) { +if (!irqd->chip_data) {seq_printf (m,"%*sVector: Not assigned\n" , ind,"" );return ; }raw_spin_lock_irqsave (&vector_lock, flags); - cpu = apicd->cpu; - vector = apicd->vector; - prev_cpu = apicd->prev_cpu; - prev_vector = apicd->prev_vector; +memcpy (&apicd, irqd->chip_data,sizeof (apicd));raw_spin_unlock_irqrestore (&vector_lock, flags); -seq_printf (m,"%*sVector: %5u\n" , ind,"" , vector); -seq_printf (m,"%*sTarget: %5u\n" , ind,"" , cpu); -if (prev_vector) { -seq_printf (m,"%*sPrevious vector: %5u\n" , ind,"" , prev_vector); -seq_printf (m,"%*sPrevious target: %5u\n" , ind,"" , prev_cpu); + +seq_printf (m,"%*sVector: %5u\n" , ind,"" , apicd.vector); +seq_printf (m,"%*sTarget: %5u\n" , ind,"" , apicd.cpu); +if (apicd.prev_vector) { +seq_printf (m,"%*sPrevious vector: %5u\n" , ind,"" , apicd.prev_vector); +seq_printf (m,"%*sPrevious target: %5u\n" , ind,"" , apicd.prev_cpu); } +seq_printf (m,"%*smove_in_progress: %u\n" , ind,"" , apicd.move_in_progress ?1 :0 ); +seq_printf (m,"%*sis_managed: %u\n" , ind,"" , apicd.is_managed ?1 :0 ); +seq_printf (m,"%*scan_reserve: %u\n" , ind,"" , apicd.can_reserve ?1 :0 ); +seq_printf (m,"%*shas_reserved: %u\n" , ind,"" , apicd.has_reserved ?1 :0 ); +seq_printf (m,"%*scleanup_pending: %u\n" , ind,"" , !hlist_unhashed (&apicd.clist)); }#endif
tip-bot for Thomas Gleixner
merge botx86/apic/vector: Print APIC control bits in debugfs
Commit-ID: a07771ac6a78860777a9da5d9bc38830ec993fe7 Gitweb: https://git.kernel.org/tip/a07771ac6a78860777a9da5d9bc38830ec993fe7 Author: Thomas Gleixner <[email protected]> AuthorDate: Mon, 4 Jun 2018 17:34:00 +0200 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 6 Jun 2018 15:18:22 +0200
x86/apic/vector: Print APIC control bits in debugfs
Extend the debugability of the vector management by adding the state bits to the debugfs output.
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Song Liu <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Peter Zijlstra <[email protected]>
Cc Song Liu <[email protected]>
Cc Dmitry Safonov <[email protected]>
Cc Mike Travis <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Tariq Toukan <[email protected]>
--- arch/x86/kernel/apic/vector.c | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-)
arch/x86/kernel/apic/vector.c +14 -13
@@ -588,8 +588,7 @@ error:static void x86_vector_debug_show (struct seq_file *m,struct irq_domain *d,struct irq_data *irqd,int ind) { -unsigned int cpu, vector, prev_cpu, prev_vector; -struct apic_chip_data *apicd; +struct apic_chip_data apicd;unsigned long flags;int irq;
@@ -605,24 +604,26 @@ static void x86_vector_debug_show(struct seq_file *m, struct irq_domain *d,return ; } - apicd = irqd->chip_data; -if (!apicd) { +if (!irqd->chip_data) {seq_printf (m,"%*sVector: Not assigned\n" , ind,"" );return ; }raw_spin_lock_irqsave (&vector_lock, flags); - cpu = apicd->cpu; - vector = apicd->vector; - prev_cpu = apicd->prev_cpu; - prev_vector = apicd->prev_vector; +memcpy (&apicd, irqd->chip_data,sizeof (apicd));raw_spin_unlock_irqrestore (&vector_lock, flags); -seq_printf (m,"%*sVector: %5u\n" , ind,"" , vector); -seq_printf (m,"%*sTarget: %5u\n" , ind,"" , cpu); -if (prev_vector) { -seq_printf (m,"%*sPrevious vector: %5u\n" , ind,"" , prev_vector); -seq_printf (m,"%*sPrevious target: %5u\n" , ind,"" , prev_cpu); + +seq_printf (m,"%*sVector: %5u\n" , ind,"" , apicd.vector); +seq_printf (m,"%*sTarget: %5u\n" , ind,"" , apicd.cpu); +if (apicd.prev_vector) { +seq_printf (m,"%*sPrevious vector: %5u\n" , ind,"" , apicd.prev_vector); +seq_printf (m,"%*sPrevious target: %5u\n" , ind,"" , apicd.prev_cpu); } +seq_printf (m,"%*smove_in_progress: %u\n" , ind,"" , apicd.move_in_progress ?1 :0 ); +seq_printf (m,"%*sis_managed: %u\n" , ind,"" , apicd.is_managed ?1 :0 ); +seq_printf (m,"%*scan_reserve: %u\n" , ind,"" , apicd.can_reserve ?1 :0 ); +seq_printf (m,"%*shas_reserved: %u\n" , ind,"" , apicd.has_reserved ?1 :0 ); +seq_printf (m,"%*scleanup_pending: %u\n" , ind,"" , !hlist_unhashed (&apicd.clist)); }#endif