Skip to contentSkip to conversation

ARM: pxa: irq: fix handling of ICMR registers in suspend/resume

PATCH New Daniel Mack 2 participants 4 messages Jul 6, 2018 – Jul 7, 2018

Subsystems (3)
lore
Share & tools
lore

Daniel Mack

author maintainer
#0 lore raw

PATCH 1/1 ARM: pxa: irq: fix handling of ICMR registers in suspend/resume

PXA3xx platforms have 56 interrupts that are stored in two ICMR registers. The code in pxa_irq_suspend() and pxa_irq_resume() however does a simple division by 32 which only leads to one register being saved at suspend and restored at resume time. The NAND interrupt setting, for instance, is lost.

Fix this by using DIV_ROUND_UP() instead.

---
 arch/arm/mach-pxa/irq.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/mach-pxa/irq.c +2 -2
index 9c10248fadcc..4e8c2116808e 100644
@@ -185,7 +185,7 @@ static int pxa_irq_suspend(void)
 {
 	int i;
 
-	for (i = 0; i < pxa_internal_irq_nr / 32; i++) {
+	for (i = 0; i < DIV_ROUND_UP(pxa_internal_irq_nr, 32); i++) {
 		void __iomem *base = irq_base(i);
 
 		saved_icmr[i] = __raw_readl(base + ICMR);
@@ -204,7 +204,7 @@ static void pxa_irq_resume(void)
 {
 	int i;
 
-	for (i = 0; i < pxa_internal_irq_nr / 32; i++) {
+	for (i = 0; i < DIV_ROUND_UP(pxa_internal_irq_nr, 32); i++) {
 		void __iomem *base = irq_base(i);
 
 		__raw_writel(saved_icmr[i], base + ICMR);
Signature · 1 line
2.17.1
maintainer
#1 lore raw

PATCH 1/1 ARM: pxa: irq: fix handling of ICMR registers in suspend/resume

Quoted 18 lines · Daniel Mack

PXA3xx platforms have 56 interrupts that are stored in two ICMR registers. The code in pxa_irq_suspend() and pxa_irq_resume() however does a simple division by 32 which only leads to one register being saved at suspend and restored at resume time. The NAND interrupt setting, for instance, is lost.

Fix this by using DIV_ROUND_UP() instead.

---
 arch/arm/mach-pxa/irq.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/mach-pxa/irq.c +0 -0
index 9c10248fadcc..4e8c2116808e 100644

arch/arm/mach-pxa/irq.c static int pxa_irq_suspend(void) · line 188

Quoted 5 lines
arch/arm/mach-pxa/irq.c +1 -1
@@ -185,7 +185,7 @@ static int pxa_irq_suspend(void)
 {
 	int i;
 
-	for (i = 0; i < pxa_internal_irq_nr / 32; i++) {
+	for (i = 0; i < DIV_ROUND_UP(pxa_internal_irq_nr, 32); i++) {

Okay, I get it. Still, something tells me saved_icmr deserves some love too, even if the result in the end won't change, it's just for corectness sake.

Of course, while@it I wonder if we couldn't have :
- pxa_init_irq_common()
- a kmalloc_array() or similar for saved_icmr[] and saved_ipr[]
That could be in this patch or another one ...

Cheers.

Signature · 1 line
Robert
author maintainer
#2 lore raw

PATCH 1/1 ARM: pxa: irq: fix handling of ICMR registers in suspend/resume

Quoted 28 lines · Robert Jarzmik
Quoted 18 lines · Daniel Mack

PXA3xx platforms have 56 interrupts that are stored in two ICMR registers. The code in pxa_irq_suspend() and pxa_irq_resume() however does a simple division by 32 which only leads to one register being saved at suspend and restored at resume time. The NAND interrupt setting, for instance, is lost.

Fix this by using DIV_ROUND_UP() instead.

---
 arch/arm/mach-pxa/irq.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/mach-pxa/irq.c +0 -0
index 9c10248fadcc..4e8c2116808e 100644

arch/arm/mach-pxa/irq.c static int pxa_irq_suspend(void) · line 188

Quoted 5 lines
arch/arm/mach-pxa/irq.c +1 -1
@@ -185,7 +185,7 @@ static int pxa_irq_suspend(void)
 {
 	int i;
 
-	for (i = 0; i < pxa_internal_irq_nr / 32; i++) {
+	for (i = 0; i < DIV_ROUND_UP(pxa_internal_irq_nr, 32); i++) {

Okay, I get it. Still, something tells me saved_icmr deserves some love too, even if the result in the end won't change, it's just for corectness sake.

Quoted 4 lines

Of course, while at it I wonder if we couldn't have :
- pxa_init_irq_common()
- a kmalloc_array() or similar for saved_icmr[] and saved_ipr[]
That could be in this patch or another one ...

I'd rather do it in a separate patch then and leave this one as-is.

Thanks,
Daniel

maintainer Applied
#3 lore raw

PATCH 1/1 ARM: pxa: irq: fix handling of ICMR registers in suspend/resume

Quoted 1 line · Daniel Mack

I'd rather do it in a separate patch then and leave this one as-is.

Queued to pxa/fixes.

Cheers.

Signature · 1 line
Robert