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dt-bindings: freescale: Add bindings for the tigerp module

PATCH New Fabio Estevam 3 participants 8 messages Jul 10, 2018 – Jul 12, 2018

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#0 lore raw

PATCH v4 1/6 dt-bindings: freescale: Add bindings for the tigerp module

Add bindings for the tigerp module present on i.MX51.

---
Changes since v3:
- None

 Documentation/devicetree/bindings/arm/freescale/tigerp.txt | 12 ++++++++++++
 1 file changed, 12 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/tigerp.txt
Documentation/devicetree/bindings/arm/freescale/tigerp.txt new file +12 -0
new file mode 100644
index 0000000..19e2aad
@@ -0,0 +1,12 @@
+* Freescale Tigerp platform module
+
+Required properties:
+- compatible : Should be "fsl,imx51-tigerp"
+- reg : Address and length of the register set for the device
+
+Example:
+
+tigerp: tigerp at 83fa0000 {
+	compatible = "fsl,imx51-tigerp";
+	reg = <0x83fa0000 0x28>;
+};
Signature · 1 line
2.7.4
#1 lore raw

PATCH v4 2/6 ARM: dts: imx51: Add PMU support

Add PMU support in the device tree.

---
Changes since v3:
- None

 arch/arm/boot/dts/imx51.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)
arch/arm/boot/dts/imx51.dtsi +6 -0
index 66e4187..113ddbc 100644
@@ -93,6 +93,12 @@
 		};
 	};
 
+	pmu: pmu {
+		compatible = "arm,cortex-a8-pmu";
+		interrupt-parent = <&tzic>;
+		interrupts = <77>;
+	};
+
 	usbphy0: usbphy0 {
 		compatible = "usb-nop-xceiv";
 		clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
Signature · 1 line
2.7.4
#2 lore raw

PATCH v4 3/6 ARM: dts: imx51: Add tigerp support

In reply to Fabio Estevam

As per the i.MX51 Reference Manual add an entry for the 'tigerp' region in the device tree.

This is needed for accessing the ARM_GPC register to set the DBGEN bit, so that the debug clocks can be turned on.

---
Changes since v3:
- None

 arch/arm/boot/dts/imx51.dtsi | 5 +++++
 1 file changed, 5 insertions(+)
arch/arm/boot/dts/imx51.dtsi +5 -0
index 113ddbc..da9d4ce 100644
@@ -451,6 +451,11 @@
 				clocks = <&clks IMX5_CLK_IIM_GATE>;
 			};
 
+			tigerp: tigerp at 83fa0000 {
+				compatible = "fsl,imx51-tigerp";
+				reg = <0x83fa0000 0x28>;
+			};
+
 			owire: owire at 83fa4000 {
 				compatible = "fsl,imx51-owire", "fsl,imx21-owire";
 				reg = <0x83fa4000 0x4000>;
Signature · 1 line
2.7.4
#3 lore raw

PATCH v4 4/6 ARM: dts: imx53: Add tigerp support

In reply to Fabio Estevam

As per the i.MX53 Reference Manual add an entry for the 'tigerp' region in the device tree.

This is needed for accessing the ARM_GPC register to set the DBGEN bit, so that the debug clocks can be turned on.

---
Changes since v3:
- None

 arch/arm/boot/dts/imx53.dtsi | 5 +++++
 1 file changed, 5 insertions(+)
arch/arm/boot/dts/imx53.dtsi +5 -0
index 1a7a7bb..3fd553c 100644
@@ -672,6 +672,11 @@
 				status = "disabled";
 			};
 
+			tigerp: tigerp at 63fa0000 {
+				compatible = "fsl,imx53-tigerp", "fsl,imx51-tigerp";
+				reg = <0x63fa0000 0x28>;
+			};
+
 			owire: owire at 63fa4000 {
 				compatible = "fsl,imx53-owire", "fsl,imx21-owire";
 				reg = <0x63fa4000 0x4000>;
Signature · 1 line
2.7.4
#4 lore raw

PATCH v4 5/6 ARM: dts: imx53: Add a label for the PMU node

In reply to Fabio Estevam

Add a label for the PMU node so that the board dts may be able to pass the 'secure-reg-access' property like this:

&pmu {
	secure-reg-access;
};

This also makes it consistent with the PMU node in imx6qdl.dtsi

---
Changes since v3:
- None

 arch/arm/boot/dts/imx53.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/imx53.dtsi +1 -1
index 3fd553c..6386185 100644
@@ -113,7 +113,7 @@
 		};
 	};
 
-	pmu {
+	pmu: pmu {
 		compatible = "arm,cortex-a8-pmu";
 		interrupt-parent = <&tzic>;
 		interrupts = <77>;
Signature · 1 line
2.7.4
#5 lore raw

PATCH v4 6/6 ARM: mx5: Set the DBGEN bit in ARM_GPC register

In reply to Fabio Estevam

On i.MX51/i.MX53 it is necessary to set the DBGEN bit in ARM_GPC register in order to turn on the debug clocks.

The DBGEN bit of ARM_GPC register has the following description in the i.MX53 Reference Manual:

"This allows the user to manually activate clocks within the debug system. This register bit directly controls the platform's dbgen_out output signal which connects to the DAP_SYS to enable all debug clocks. Once enabled, the clocks cannot be disabled except by asserting the disable_trace input of the DAP_SYS."

Based on a previous patch from Sebastian Reichel.

---
Changes since v3:
- Add missing of_node_put()

 arch/arm/mach-imx/common.h     |  1 +
 arch/arm/mach-imx/cpu-imx5.c   | 45 ++++++++++++++++++++++++++++++++++++++++++
 arch/arm/mach-imx/mach-imx51.c |  2 +-
 arch/arm/mach-imx/mach-imx53.c |  2 +-
 4 files changed, 48 insertions(+), 2 deletions(-)
arch/arm/mach-imx/common.h +1 -0
index 93225db7..423dd76 100644
@@ -62,6 +62,7 @@ void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw);
 void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw);
 void imx25_pm_init(void);
 void imx27_pm_init(void);
+void imx5_pmu_init(void);
 
 enum mxc_cpu_pwr_mode {
 	WAIT_CLOCKED,		/* wfi only */
arch/arm/mach-imx/cpu-imx5.c +45 -0

48 lines not on this page · raw message

arch/arm/mach-imx/mach-imx51.c +1 -1
index 3835b6a..8838fba 100644
@@ -52,7 +52,7 @@ static void __init imx51_dt_init(void)
 {
 	imx51_ipu_mipi_setup();
 	imx_src_init();
-
+	imx5_pmu_init();
 	imx_aips_allow_unprivileged_access("fsl,imx51-aipstz");
 }
 
arch/arm/mach-imx/mach-imx53.c +1 -1
index 07c2e8d..5ec7100 100644
@@ -31,7 +31,7 @@ static void __init imx53_init_early(void)
 static void __init imx53_dt_init(void)
 {
 	imx_src_init();
-
+	imx5_pmu_init();
 	imx_aips_allow_unprivileged_access("fsl,imx53-aipstz");
 }
 
Signature · 1 line
2.7.4
maintainer
#6 lore raw

PATCH v4 1/6 dt-bindings: freescale: Add bindings for the tigerp module

In reply to Fabio Estevam
Quoted 10 lines · Fabio Estevam

Add bindings for the tigerp module present on i.MX51.

---
Changes since v3:
- None

 Documentation/devicetree/bindings/arm/freescale/tigerp.txt | 12 ++++++++++++
 1 file changed, 12 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/tigerp.txt