fsi: Coldfire coprocessor offload
Subsystems (6)
cover fsi: Coldfire coprocessor offload
This series implements support for offloading the FSI protocol bitbanging to the ColdFire secondary core of the Aspeed SoCs. The result increases FSI performance by a factor of 4, and on systems that don't support async FSI clock, provide much more regular and continuous clocking which helps reliability.
This series is much smaller than the previous submissions as I already merged all the "preparatory" work into the FSI tree. This is now strictly the coldfire support and is now only waiting for ack of the DT bindings (and whatever other review comments might come my way) before I put it into the FSI tree and sends it to Greg.
There are two dependencies to be able to build/use this. The above prep work:
https://git.kernel.org/pub/scm/linux/kernel/git/benh/linux-fsi.git/log/
And the Aspeed GPIO driver changes for handling with GPIO lines ownership and handshaking. The patches have been merged into the GPIO tree and a dedicated immutable topic branch and can be found here:
https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git/log/?h=ib-aspeed
Finally, the driver needs a machine specific firmware file. The firwmare is open source and available at:
https://github.com/ozbenh/cf-fsi
I will submit it to linux-firmware if there's enough popular demand ;-)
v2. Fix misuse of devm_kzalloc for objects containing a struct device
in fsi-master-gpio and fsi-master-ast-cf (similar fixes for the various FSI drivers will come later a part of rework to move away from misc devs).
v3. Sparse fix and updated DT bindings as per Rob's comments.
PATCH v3 1/5 dt-bindings: fsi: Document binding for the fsi-master-ast-cf "device"
This isn't per-se a real device, it's a pseudo-device that represents the use of the Aspeed built-in ColdFire to implement the FSI protocol by bitbanging the GPIOs instead of doing it from the ARM core.
Thus it's a drop-in replacement for the existing fsi-master-gpio pseudo-device for use on systems based on the Aspeed chips. It has most of the same properties, plus some more needed to operate the coprocessor.
--- .../bindings/fsi/fsi-master-ast-cf.txt | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt
Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt new file +36 -0
@@ -0,0 +1,36 @@ +Device-tree bindings for ColdFire offloaded gpio-based FSI master driver +------------------------------------------------------------------------ + +Required properties: + - compatible = + "aspeed,ast2400-cf-fsi-master" for an AST2400 based system + or + "aspeed,ast2500-cf-fsi-master" for an AST2500 based system + + - clock-gpios = <gpio-descriptor>; : GPIO for FSI clock + - data-gpios = <gpio-descriptor>; : GPIO for FSI data signal + - enable-gpios = <gpio-descriptor>; : GPIO for enable signal + - trans-gpios = <gpio-descriptor>; : GPIO for voltage translator enable + - mux-gpios = <gpio-descriptor>; : GPIO for pin multiplexing with other + functions (eg, external FSI masters) + - memory-region = <phandle>; : Reference to the reserved memory for + the ColdFire. Must be 2M aligned on + AST2400 and 1M aligned on AST2500 + - aspeed,sram = <phandle>; : Reference to the SRAM node. + - aspeed,cvic = <phandle>; : Reference to the CVIC node. + +Examples: + + fsi-master { + compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master"; + + clock-gpios = <&gpio 0>; + data-gpios = <&gpio 1>; + enable-gpios = <&gpio 2>; + trans-gpios = <&gpio 3>; + mux-gpios = <&gpio 4>; + + memory-region = <&coldfire_memory>; + sram = <&sram>; + cvic = <&cvic>; + }
Signature · 1 line
2.17.1
Re: [PATCH v3 1/5] dt-bindings: fsi: Document binding for the fsi-master-ast-cf "device"
Quoted 47 lines · Benjamin Herrenschmidt
This isn't per-se a real device, it's a pseudo-device that represents the use of the Aspeed built-in ColdFire to implement the FSI protocol by bitbanging the GPIOs instead of doing it from the ARM core.
Thus it's a drop-in replacement for the existing fsi-master-gpio pseudo-device for use on systems based on the Aspeed chips. It has most of the same properties, plus some more needed to operate the coprocessor.
Signed-off-by Benjamin Herrenschmidt <[email protected]>--- .../bindings/fsi/fsi-master-ast-cf.txt | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txtDocumentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt new file +25
-0@@ -0,0 +1,36 @@ +Device-tree bindings for ColdFire offloaded gpio-based FSI master driver +------------------------------------------------------------------------ + +Required properties: + - compatible = + "aspeed,ast2400-cf-fsi-master" for an AST2400 based system + or + "aspeed,ast2500-cf-fsi-master" for an AST2500 based system + + - clock-gpios = <gpio-descriptor>; : GPIO for FSI clock + - data-gpios = <gpio-descriptor>; : GPIO for FSI data signal + - enable-gpios = <gpio-descriptor>; : GPIO for enable signal + - trans-gpios = <gpio-descriptor>; : GPIO for voltage translator enable + - mux-gpios = <gpio-descriptor>; : GPIO for pin multiplexing with other + functions (eg, external FSI masters) + - memory-region = <phandle>; : Reference to the reserved memory for + the ColdFire. Must be 2M aligned on + AST2400 and 1M aligned on AST2500 + - aspeed,sram = <phandle>; : Reference to the SRAM node. + - aspeed,cvic = <phandle>; : Reference to the CVIC node. + +Examples: + + fsi-master { + compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master";
Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt line 35
Quoted 10 lines
Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt new file +10
-0+ + clock-gpios = <&gpio 0>; + data-gpios = <&gpio 1>; + enable-gpios = <&gpio 2>; + trans-gpios = <&gpio 3>; + mux-gpios = <&gpio 4>; + + memory-region = <&coldfire_memory>; + sram = <&sram>; + cvic = <&cvic>;
Need to update the example. With that,
Re: [PATCH v3 1/5] dt-bindings: fsi: Document binding for the fsi-master-ast-cf "device"
Quoted 52 lines · Rob Herring
Quoted 51 lines · Benjamin Herrenschmidt
This isn't per-se a real device, it's a pseudo-device that represents the use of the Aspeed built-in ColdFire to implement the FSI protocol by bitbanging the GPIOs instead of doing it from the ARM core.
Thus it's a drop-in replacement for the existing fsi-master-gpio pseudo-device for use on systems based on the Aspeed chips. It has most of the same properties, plus some more needed to operate the coprocessor.
Signed-off-by Benjamin Herrenschmidt <[email protected]>--- .../bindings/fsi/fsi-master-ast-cf.txt | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txtDocumentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt new file +29
-0@@ -0,0 +1,36 @@ +Device-tree bindings for ColdFire offloaded gpio-based FSI master driver +------------------------------------------------------------------------ + +Required properties: + - compatible = + "aspeed,ast2400-cf-fsi-master" for an AST2400 based system + or + "aspeed,ast2500-cf-fsi-master" for an AST2500 based system + + - clock-gpios = <gpio-descriptor>; : GPIO for FSI clock + - data-gpios = <gpio-descriptor>; : GPIO for FSI data signal + - enable-gpios = <gpio-descriptor>; : GPIO for enable signal + - trans-gpios = <gpio-descriptor>; : GPIO for voltage translator enable + - mux-gpios = <gpio-descriptor>; : GPIO for pin multiplexing with other + functions (eg, external FSI masters) + - memory-region = <phandle>; : Reference to the reserved memory for + the ColdFire. Must be 2M aligned on + AST2400 and 1M aligned on AST2500 + - aspeed,sram = <phandle>; : Reference to the SRAM node. + - aspeed,cvic = <phandle>; : Reference to the CVIC node. + +Examples: + + fsi-master { + compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master"; + + clock-gpios = <&gpio 0>; + data-gpios = <&gpio 1>; + enable-gpios = <&gpio 2>;
Quoted 8 lines
Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt line 35
Quoted 6 lines
Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt new file +6
-0+ trans-gpios = <&gpio 3>; + mux-gpios = <&gpio 4>; + + memory-region = <&coldfire_memory>; + sram = <&sram>; + cvic = <&cvic>;Need to update the example. With that
Ah right, thanks. The next spin will have that fixed and will go into the fsi tree.
Quoted 1 line
Reviewed-by Rob Herring <[email protected]>
PATCH v3 2/5 devres: Add devm_of_iomap()
In reply to Benjamin HerrenschmidtThere are still quite a few cases where a device might want to get to a different node of the device-tree, obtain the resources and map them.
We have of_iomap() and of_io_request_and_map() but they both have shortcomings, such as not returning the size of the resource found (which can be useful) and not being "managed".
This adds a devm_of_iomap() that provides all of these and should probably replace uses of the above in most drivers.
--- include/linux/device.h | 4 ++++ lib/devres.c | 36 ++++++++++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+)
include/linux/device.h +4 -0
@@ -688,6 +688,10 @@ extern void devm_free_pages(struct device *dev, unsigned long addr);void __iomem *devm_ioremap_resource (struct device *dev,struct resource *res); +void __iomem *devm_of_iomap (struct device *dev, +struct device_node *node,int index, +resource_size_t *size); +/* allows to add/remove a custom action to devres stack */ int devm_add_action (struct device *dev,void (*action)(void *),void *data);void devm_remove_action (struct device *dev,void (*action)(void *),void *data);
lib/devres.c +36 -0
@@ -4,6 +4,7 @@#include <linux/io.h> #include <linux/gfp.h> #include <linux/export.h> +#include <linux/of_address.h> enum devm_ioremap_type {DEVM_IOREMAP =0 ,
@@ -162,6 +163,41 @@ void __iomem *devm_ioremap_resource(struct device *dev, struct resource *res) }EXPORT_SYMBOL (devm_ioremap_resource); +/* +* devm_of_iomap - Requests a resource and maps the memory mapped IO +* for a given device_node managed by a given device +* +* Checks that a resource is a valid memory region, requests the memory +* region and ioremaps it. All operations are managed and will be undone +* on driver detach of the device. +* +* This is to be used when a device requests/maps resources described +* by other device tree nodes (children or otherwise). +* +* @dev: The device "managing" the resource +* @node: The device-tree node where the resource resides +* @index: index of the MMIO range in the "reg" property +* @size: Returns the size of the resource (pass NULL if not needed) +* Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded +* error code on failure. Usage example: +* +* base = devm_of_iomap(&pdev->dev, node, 0, NULL); +* if (IS_ERR(base)) +* return PTR_ERR(base); +*/ +void __iomem *devm_of_iomap (struct device *dev,struct device_node *node,int index, +resource_size_t *size) +{ +struct resource res; + +if (of_address_to_resource (node, index, &res)) +return IOMEM_ERR_PTR (-EINVAL ); +if (size) + *size =resource_size (&res); +return devm_ioremap_resource (dev, &res); +} +EXPORT_SYMBOL (devm_of_iomap); +#ifdef CONFIG_HAS_IOPORT_MAP /* * Generic iomap devres
Signature · 1 line
2.17.1
PATCH v3 3/5 fsi: master-ast-cf: Add new FSI master using Aspeed ColdFire
In reply to Benjamin HerrenschmidtThe Aspeed AST2x00 can contain a ColdFire v1 coprocessor which is currently unused on OpenPower systems.
This adds an alternative to the fsi-master-gpio driver that uses that coprocessor instead of bit banging from the ARM core itself. The end result is about 4 times faster.
The firmware for the coprocessor and its source code can be found at https://github.com/ozbenh/cf-fsi and is system specific.
--- drivers/fsi/Kconfig | 9 + drivers/fsi/Makefile | 1 + drivers/fsi/cf-fsi-fw.h | 157 +++ drivers/fsi/fsi-master-ast-cf.c | 1438 ++++++++++++++++++++++ include/trace/events/fsi_master_ast_cf.h | 150 +++ 5 files changed, 1755 insertions(+) create mode 100644 drivers/fsi/cf-fsi-fw.h create mode 100644 drivers/fsi/fsi-master-ast-cf.c create mode 100644 include/trace/events/fsi_master_ast_cf.h
drivers/fsi/Kconfig +9 -0
@@ -27,6 +27,15 @@ config FSI_MASTER_HUB allow chaining of FSI links to an arbitrary depth. This allows for a high target device fanout. +config FSI_MASTER_AST_CF + tristate "FSI master based on Aspeed ColdFire coprocessor" + depends on GPIOLIB + depends on GPIO_ASPEED + ---help--- + This option enables a FSI master using the AST2400 and AST2500 GPIO + lines driven by the internal ColdFire coprocessor. This requires + the corresponding machine specific ColdFire firmware to be available. + config FSI_SCOM tristate "SCOM FSI client device driver" ---help---
drivers/fsi/Makefile +1 -0
@@ -2,6 +2,7 @@ obj-$(CONFIG_FSI) += fsi-core.o obj-$(CONFIG_FSI_MASTER_HUB) += fsi-master-hub.o obj-$(CONFIG_FSI_MASTER_GPIO) += fsi-master-gpio.o +obj-$(CONFIG_FSI_MASTER_AST_CF) += fsi-master-ast-cf.o obj-$(CONFIG_FSI_SCOM) += fsi-scom.o obj-$(CONFIG_FSI_SBEFIFO) += fsi-sbefifo.o obj-$(CONFIG_FSI_OCC) += fsi-occ.o
drivers/fsi/cf-fsi-fw.h new file +157 -0
157 lines not on this page · raw message
drivers/fsi/fsi-master-ast-cf.c new file +1438 -0
1,438 lines not on this page · raw message
include/trace/events/fsi_master_ast_cf.h new file +150 -0
150 lines not on this page · raw message
Signature · 1 line
2.17.1
Re: [PATCH v3 3/5] fsi: master-ast-cf: Add new FSI master using Aspeed ColdFire
Quoted 28 lines · Benjamin Herrenschmidt
The Aspeed AST2x00 can contain a ColdFire v1 coprocessor which is currently unused on OpenPower systems.
This adds an alternative to the fsi-master-gpio driver that uses that coprocessor instead of bit banging from the ARM core itself. The end result is about 4 times faster.
The firmware for the coprocessor and its source code can be found at https://github.com/ozbenh/cf-fsi and is system specific.
Signed-off-by Benjamin Herrenschmidt <[email protected]>--- drivers/fsi/Kconfig | 9 + drivers/fsi/Makefile | 1 + drivers/fsi/cf-fsi-fw.h | 157 +++ drivers/fsi/fsi-master-ast-cf.c | 1438 ++++++++++++++++++++++ include/trace/events/fsi_master_ast_cf.h | 150 +++ 5 files changed, 1755 insertions(+) create mode 100644 drivers/fsi/cf-fsi-fw.h create mode 100644 drivers/fsi/fsi-master-ast-cf.c create mode 100644 include/trace/events/fsi_master_ast_cf.hdrivers/fsi/Kconfig +0
-0@@ -27,6 +27,15 @@ config FSI_MASTER_HUB allow chaining of FSI links to an arbitrary depth. This allows for
drivers/fsi/Kconfig config FSI_MASTER_HUB · line 37
Quoted 10 lines
drivers/fsi/Kconfig +8
-0a high target device fanout. +config FSI_MASTER_AST_CF + tristate "FSI master based on Aspeed ColdFire coprocessor" + depends on GPIOLIB + depends on GPIO_ASPEED + ---help--- + This option enables a FSI master using the AST2400 and AST2500 GPIO + lines driven by the internal ColdFire coprocessor. This requires + the corresponding machine specific ColdFire firmware to be available.
The "machine specific" part isn't true anymore, is it?
I gave this a spin on a palmetto and it appeared to work fine for me.
Re: [PATCH v3 3/5] fsi: master-ast-cf: Add new FSI master using Aspeed ColdFire
Quoted 32 lines · Joel Stanley
Quoted 30 lines · Benjamin Herrenschmidt
The Aspeed AST2x00 can contain a ColdFire v1 coprocessor which is currently unused on OpenPower systems.
This adds an alternative to the fsi-master-gpio driver that uses that coprocessor instead of bit banging from the ARM core itself. The end result is about 4 times faster.
The firmware for the coprocessor and its source code can be found at https://github.com/ozbenh/cf-fsi and is system specific.
Signed-off-by Benjamin Herrenschmidt <[email protected]>--- drivers/fsi/Kconfig | 9 + drivers/fsi/Makefile | 1 + drivers/fsi/cf-fsi-fw.h | 157 +++ drivers/fsi/fsi-master-ast-cf.c | 1438 ++++++++++++++++++++++ include/trace/events/fsi_master_ast_cf.h | 150 +++ 5 files changed, 1755 insertions(+) create mode 100644 drivers/fsi/cf-fsi-fw.h create mode 100644 drivers/fsi/fsi-master-ast-cf.c create mode 100644 include/trace/events/fsi_master_ast_cf.hdrivers/fsi/Kconfig +0
-0@@ -27,6 +27,15 @@ config FSI_MASTER_HUB allow chaining of FSI links to an arbitrary depth. This allows for a high target device fanout.
Quoted 10 lines
drivers/fsi/Kconfig config FSI_MASTER_HUB · line 37
Quoted 8 lines
drivers/fsi/Kconfig +8
-0+config FSI_MASTER_AST_CF + tristate "FSI master based on Aspeed ColdFire coprocessor" + depends on GPIOLIB + depends on GPIO_ASPEED + ---help--- + This option enables a FSI master using the AST2400 and AST2500 GPIO + lines driven by the internal ColdFire coprocessor. This requires + the corresponding machine specific ColdFire firmware to be available.The "machine specific" part isn't true anymore, is it?
Right, I'll fixup the changelog before pushing if that's the last spin.
Quoted 3 lines
I gave this a spin on a palmetto and it appeared to work fine for me.
Tested-by Joel Stanley <[email protected]>
Thanks !
Cheers,
Ben
.
PATCH v3 4/5 arm: dts: OpenPower Romulus system can use coprocessor for FSI
In reply to Benjamin Herrenschmidt--- arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-)
arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts +10 -2
@@ -37,6 +37,11 @@ compatible = "shared-dma-pool"; reusable; }; + + coldfire_memory: codefire_memory at 9ef00000 { + reg = <0x9ef00000 0x00100000>; + no-map; + }; }; leds {
@@ -56,10 +61,13 @@ }; fsi: gpio-fsi { - compatible = "fsi-master-gpio", "fsi-master"; + compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master"; #address-cells = <2>; #size-cells = <0>; - no-gpio-delays; + + memory-region = <&coldfire_memory>; + aspeed,sram = <&sram>; + aspeed,cvic = <&cvic>; clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; data-gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_HIGH>;
Signature · 1 line
2.17.1
PATCH v3 5/5 arm: dts: OpenPower Palmetto system can use coprocessor for FSI
In reply to Benjamin HerrenschmidtThis switches away from userspace bitbanging to kernel FSI using the coprocessor.
--- arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 28 ++++++++++++++----- 1 file changed, 21 insertions(+), 7 deletions(-)
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts +21 -7
@@ -31,6 +31,11 @@ no-map; reg = <0x98000000 0x01000000>; /* 16MB */ }; + + coldfire_memory: codefire_memory at 5ee00000 { + reg = <0x5ee00000 0x00200000>; + no-map; + }; }; leds {
@@ -49,6 +54,22 @@ }; }; + fsi: gpio-fsi { + compatible = "aspeed,ast2400-cf-fsi-master", "fsi-master"; + #address-cells = <2>; + #size-cells = <0>; + + memory-region = <&coldfire_memory>; + aspeed,sram = <&sram>; + aspeed,cvic = <&cvic>; + + clock-gpios = <&gpio ASPEED_GPIO(A, 4) GPIO_ACTIVE_HIGH>; + data-gpios = <&gpio ASPEED_GPIO(A, 5) GPIO_ACTIVE_HIGH>; + mux-gpios = <&gpio ASPEED_GPIO(A, 6) GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>; + trans-gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_HIGH>; + }; + gpio-keys { compatible = "gpio-keys";
@@ -323,13 +344,6 @@ line-name = "SYS_PWROK_BMC"; }; - pin_gpio_h6 { - gpio-hog; - gpios = <ASPEED_GPIO(H, 6) GPIO_ACTIVE_HIGH>; - output-high; - line-name = "SCM1_FSI0_DATA_EN"; - }; - pin_gpio_h7 { gpio-hog; gpios = <ASPEED_GPIO(H, 7) GPIO_ACTIVE_HIGH>;
Signature · 1 line
2.17.1