KVM: Support PUD hugepages at stage 2
Subsystems (3)
v6 cover KVM: Support PUD hugepages at stage 2
This series is an update to the PUD hugepage support previously posted at [0]. This patchset adds support for PUD hugepages at stage 2 a feature that is useful on cores that have support for large sized TLB mappings (e.g., 1GB for 4K granule).
This version adds tags and addresses feedback received on v5. Additionally, Patch 1 (1 & 2 in this version) has been split to help make it easy to review.
Support is added to code that is shared between arm and arm64. Dummy helpers for arm are provided as the port does not support PUD hugepage sizes.
The patches have been tested on an A57 based system. The patchset is based on v4.18-rc5. The are a few conflicts with the support for 52 bit IPA[1] - I'll work with Suzuki to resolve this once the code is in the right shape.
Thanks,
Punit
v5 -> v6
* Split Patch 1 to move out the refactoring of exec permissions on page table entries.
* Patch 4 - Initialise p*dpp pointers in stage2_get_leaf_entry()
* Patch 5 - Trigger a BUG() in kvm_pud_pfn() on arm
v4 -> v5:
* Patch 1 - Drop helper stage2_should_exec() and refactor the condition to decide if a page table entry should be marked executable
* Patch 4-6 - Introduce stage2_get_leaf_entry() and use it in this and latter patches
* Patch 7 - Use stage 2 accessors instead of using the page table helpers directly
* Patch 7 - Add a note to update the PUD hugepage support when number of levels of stage 2 tables differs from stage 1
v3 -> v4:
* Patch 1 and 7 - Don't put down hugepages pte if logging is enabled
* Patch 4-5 - Add PUD hugepage support for exec and access faults
* Patch 6 - PUD hugepage support for aging page table entries
v2 -> v3:
* Update vma_pagesize directly if THP [1/4]. Previsouly this was done indirectly via hugetlb
* Added review tag [4/4]
v1 -> v2:
* Create helper to check if the page should have exec permission [1/4]
* Fix broken condition to detect THP hugepage [1/4]
* Fix in-correct hunk resulting from a rebase [4/4]
[0] https://www.spinics.net/lists/arm-kernel/msg664276.html
[1] https://www.spinics.net/lists/kvm/msg171065.html
Punit Agrawal (8):
KVM: arm/arm64: Share common code in user_mem_abort()
KVM: arm/arm64: Re-factor setting the Stage 2 entry to exec on fault
KVM: arm/arm64: Introduce helpers to manipulate page table entries
KVM: arm64: Support dirty page tracking for PUD hugepages
KVM: arm64: Support PUD hugepage in stage2_is_exec()
KVM: arm64: Support handling access faults for PUD hugepages
KVM: arm64: Update age handlers to support PUD hugepages
KVM: arm64: Add support for creating PUD hugepages at stage 2
arch/arm/include/asm/kvm_mmu.h | 61 +++++ arch/arm64/include/asm/kvm_mmu.h | 47 ++++ arch/arm64/include/asm/pgtable-hwdef.h | 4 + arch/arm64/include/asm/pgtable.h | 9 + virt/kvm/arm/mmu.c | 294 ++++++++++++++++++------- 5 files changed, 341 insertions(+), 74 deletions(-)
Signature · 1 line
2.17.1
PATCH v6 1/8 KVM: arm/arm64: Share common code in user_mem_abort()
The code for operations such as marking the pfn as dirty, and dcache/icache maintenance during stage 2 fault handling is duplicated between normal pages and PMD hugepages.
Instead of creating another copy of the operations when we introduce PUD hugepages, let's share them across the different pagesizes.
--- virt/kvm/arm/mmu.c | 39 +++++++++++++++++++++++---------------- 1 file changed, 23 insertions(+), 16 deletions(-)
virt/kvm/arm/mmu.c +23 -16
@@ -1431,7 +1431,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,kvm_pfn_t pfn;pgprot_t mem_type =PAGE_S2 ;bool logging_active =memslot_is_logging (memslot); -unsigned long flags =0 ; +unsigned long vma_pagesize, flags =0 ; write_fault =kvm_is_write_fault (vcpu); exec_fault =kvm_vcpu_trap_is_iabt (vcpu);
@@ -1451,7 +1451,8 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,return -EFAULT ; } -if (vma_kernel_pagesize (vma) ==PMD_SIZE && !logging_active) { + vma_pagesize =vma_kernel_pagesize (vma); +if (vma_pagesize ==PMD_SIZE && !logging_active) { hugetlb = true; gfn = (fault_ipa &PMD_MASK ) >>PAGE_SHIFT ; }else {
@@ -1520,23 +1521,34 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,if (mmu_notifier_retry (kvm, mmu_seq)) goto out_unlock; -if (!hugetlb && !force_pte) +if (!hugetlb && !force_pte) { +/* +* Only PMD_SIZE transparent hugepages(THP) are +* currently supported. This code will need to be +* updated to support other THP sizes. +*/ hugetlb =transparent_hugepage_adjust (&pfn, &fault_ipa); +if (hugetlb) + vma_pagesize =PMD_SIZE ; + } + +if (writable) +kvm_set_pfn_dirty (pfn); + +if (fault_status !=FSC_PERM ) +clean_dcache_guest_page (pfn, vma_pagesize); + +if (exec_fault) +invalidate_icache_guest_page (pfn, vma_pagesize); -if (hugetlb) { +if (hugetlb && vma_pagesize ==PMD_SIZE ) {pmd_t new_pmd =pfn_pmd (pfn, mem_type); new_pmd =pmd_mkhuge (new_pmd); -if (writable) { +if (writable) new_pmd =kvm_s2pmd_mkwrite (new_pmd); -kvm_set_pfn_dirty (pfn); - } - -if (fault_status !=FSC_PERM ) -clean_dcache_guest_page (pfn,PMD_SIZE );if (exec_fault) { new_pmd =kvm_s2pmd_mkexec (new_pmd); -invalidate_icache_guest_page (pfn,PMD_SIZE ); }else if (fault_status ==FSC_PERM ) {/* Preserve execute if XN was already cleared */ if (stage2_is_exec (kvm, fault_ipa))
@@ -1549,16 +1561,11 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,if (writable) { new_pte =kvm_s2pte_mkwrite (new_pte); -kvm_set_pfn_dirty (pfn);mark_page_dirty (kvm, gfn); } -if (fault_status !=FSC_PERM ) -clean_dcache_guest_page (pfn,PAGE_SIZE ); -if (exec_fault) { new_pte =kvm_s2pte_mkexec (new_pte); -invalidate_icache_guest_page (pfn,PAGE_SIZE ); }else if (fault_status ==FSC_PERM ) {/* Preserve execute if XN was already cleared */ if (stage2_is_exec (kvm, fault_ipa))
Signature · 1 line
2.17.1
Re: [PATCH v6 1/8] KVM: arm/arm64: Share common code in user_mem_abort()
Quoted 10 lines · Punit Agrawal
The code for operations such as marking the pfn as dirty, and dcache/icache maintenance during stage 2 fault handling is duplicated between normal pages and PMD hugepages.
Instead of creating another copy of the operations when we introduce PUD hugepages, let's share them across the different pagesizes.
Signed-off-by Punit Agrawal <[email protected]>Cc Christoffer Dall <[email protected]>Cc Marc Zyngier <[email protected]>
Thanks for splitting the patch. It looks much simpler this way.
Re: [PATCH v6 1/8] KVM: arm/arm64: Share common code in user_mem_abort()
Hi Suzuki,
Quoted 8 lines · Suzuki K Poulose
Quoted 7 lines · Punit Agrawal
The code for operations such as marking the pfn as dirty, and dcache/icache maintenance during stage 2 fault handling is duplicated between normal pages and PMD hugepages.
Instead of creating another copy of the operations when we introduce PUD hugepages, let's share them across the different pagesizes.
Quoted 7 lines
Quoted 3 lines
Signed-off-by Punit Agrawal <[email protected]>Cc Christoffer Dall <[email protected]>Cc Marc Zyngier <[email protected]>Thanks for splitting the patch. It looks much simpler this way.
Reviewed-by Suzuki K Poulose <[email protected]>
Thanks for reviewing the patches.
Punit
Quoted 4 lines
_______________________________________________
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https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
PATCH v6 2/8 KVM: arm/arm64: Re-factor setting the Stage 2 entry to exec on fault
In reply to Punit AgrawalStage 2 fault handler marks a page as executable if it is handling an execution fault or if it was a permission fault in which case the executable bit needs to be preserved.
The logic to decide if the page should be marked executable is duplicated for PMD and PTE entries. To avoid creating another copy when support for PUD hugepages is introduced refactor the code to share the checks needed to mark a page table entry as executable.
--- virt/kvm/arm/mmu.c | 28 +++++++++++++++------------- 1 file changed, 15 insertions(+), 13 deletions(-)
virt/kvm/arm/mmu.c +15 -13
@@ -1422,7 +1422,8 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, unsigned long fault_status) {int ret; -bool write_fault, exec_fault, writable, hugetlb = false, force_pte = false; +bool write_fault, writable, hugetlb = false, force_pte = false; +bool exec_fault, needs_exec;unsigned long mmu_seq;gfn_t gfn = fault_ipa >>PAGE_SHIFT ;struct kvm *kvm = vcpu->kvm;
@@ -1541,19 +1542,25 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,if (exec_fault)invalidate_icache_guest_page (pfn, vma_pagesize); +/* +* If we took an execution fault we have made the +* icache/dcache coherent above and should now let the s2 +* mapping be executable. +* +* Write faults (!exec_fault && FSC_PERM) are orthogonal to +* execute permissions, and we preserve whatever we have. +*/ + needs_exec = exec_fault || + (fault_status ==FSC_PERM &&stage2_is_exec (kvm, fault_ipa)); +if (hugetlb && vma_pagesize ==PMD_SIZE ) {pmd_t new_pmd =pfn_pmd (pfn, mem_type); new_pmd =pmd_mkhuge (new_pmd);if (writable) new_pmd =kvm_s2pmd_mkwrite (new_pmd); -if (exec_fault) { +if (needs_exec) new_pmd =kvm_s2pmd_mkexec (new_pmd); - }else if (fault_status ==FSC_PERM ) { -/* Preserve execute if XN was already cleared */ -if (stage2_is_exec (kvm, fault_ipa)) - new_pmd =kvm_s2pmd_mkexec (new_pmd); - } ret =stage2_set_pmd_huge (kvm, memcache, fault_ipa, &new_pmd); }else {
@@ -1564,13 +1571,8 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,mark_page_dirty (kvm, gfn); } -if (exec_fault) { +if (needs_exec) new_pte =kvm_s2pte_mkexec (new_pte); - }else if (fault_status ==FSC_PERM ) { -/* Preserve execute if XN was already cleared */ -if (stage2_is_exec (kvm, fault_ipa)) - new_pte =kvm_s2pte_mkexec (new_pte); - } ret =stage2_set_pte (kvm, memcache, fault_ipa, &new_pte, flags); }
Signature · 1 line
2.17.1
Re: [PATCH v6 2/8] KVM: arm/arm64: Re-factor setting the Stage 2 entry to exec on fault
Quoted 4 lines · Punit Agrawal
Stage 2 fault handler marks a page as executable if it is handling an execution fault or if it was a permission fault in which case the executable bit needs to be preserved.
Quoted 8 lines
The logic to decide if the page should be marked executable is duplicated for PMD and PTE entries. To avoid creating another copy when support for PUD hugepages is introduced refactor the code to share the checks needed to mark a page table entry as executable.
Signed-off-by Punit Agrawal <[email protected]>Cc Christoffer Dall <[email protected]>Cc Marc Zyngier <[email protected]>
PATCH v6 3/8 KVM: arm/arm64: Introduce helpers to manipulate page table entries
In reply to Punit AgrawalIntroduce helpers to abstract architectural handling of the conversion of pfn to page table entries and marking a PMD page table entry as a block entry.
The helpers are introduced in preparation for supporting PUD hugepages at stage 2 - which are supported on arm64 but do not exist on arm.
--- arch/arm/include/asm/kvm_mmu.h | 5 +++++ arch/arm64/include/asm/kvm_mmu.h | 5 +++++ virt/kvm/arm/mmu.c | 8 +++++--- 3 files changed, 15 insertions(+), 3 deletions(-)
arch/arm/include/asm/kvm_mmu.h +5 -0
@@ -75,6 +75,11 @@ phys_addr_t kvm_get_idmap_vector(void);int kvm_mmu_init (void );void kvm_clear_hyp_idmap (void ); +#define kvm_pfn_pte (pfn, prot) pfn_pte(pfn, prot) +#define kvm_pfn_pmd (pfn, prot) pfn_pmd(pfn, prot) + +#define kvm_pmd_mkhuge (pmd) pmd_mkhuge(pmd) +static inline void kvm_set_pmd (pmd_t *pmd,pmd_t new_pmd) { *pmd = new_pmd;
arch/arm64/include/asm/kvm_mmu.h +5 -0
@@ -172,6 +172,11 @@ void kvm_clear_hyp_idmap(void);#define kvm_set_pte (ptep, pte) set_pte(ptep, pte)#define kvm_set_pmd (pmdp, pmd) set_pmd(pmdp, pmd) +#define kvm_pfn_pte (pfn, prot) pfn_pte(pfn, prot) +#define kvm_pfn_pmd (pfn, prot) pfn_pmd(pfn, prot) + +#define kvm_pmd_mkhuge (pmd) pmd_mkhuge(pmd) +static inline pte_t kvm_s2pte_mkwrite (pte_t pte) {pte_val (pte) |=PTE_S2_RDWR ;
virt/kvm/arm/mmu.c +5 -3
@@ -1554,8 +1554,10 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, (fault_status ==FSC_PERM &&stage2_is_exec (kvm, fault_ipa));if (hugetlb && vma_pagesize ==PMD_SIZE ) { -pmd_t new_pmd =pfn_pmd (pfn, mem_type); - new_pmd =pmd_mkhuge (new_pmd); +pmd_t new_pmd =kvm_pfn_pmd (pfn, mem_type); + + new_pmd =kvm_pmd_mkhuge (new_pmd); +if (writable) new_pmd =kvm_s2pmd_mkwrite (new_pmd);
@@ -1564,7 +1566,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, ret =stage2_set_pmd_huge (kvm, memcache, fault_ipa, &new_pmd); }else { -pte_t new_pte =pfn_pte (pfn, mem_type); +pte_t new_pte =kvm_pfn_pte (pfn, mem_type);if (writable) { new_pte =kvm_s2pte_mkwrite (new_pte);
Signature · 1 line
2.17.1
PATCH v6 4/8 KVM: arm64: Support dirty page tracking for PUD hugepages
In reply to Punit AgrawalIn preparation for creating PUD hugepages at stage 2, add support for write protecting PUD hugepages when they are encountered. Write protecting guest tables is used to track dirty pages when migrating VMs.
Also, provide trivial implementations of required kvm_s2pud_* helpers to allow sharing of code with arm32.
--- arch/arm/include/asm/kvm_mmu.h | 16 ++++++++++++++++ arch/arm64/include/asm/kvm_mmu.h | 10 ++++++++++ virt/kvm/arm/mmu.c | 11 +++++++---- 3 files changed, 33 insertions(+), 4 deletions(-)
arch/arm/include/asm/kvm_mmu.h +16 -0
@@ -80,6 +80,22 @@ void kvm_clear_hyp_idmap(void);#define kvm_pmd_mkhuge (pmd) pmd_mkhuge(pmd) +/* +* The following kvm_*pud*() functions are provided strictly to allow +* sharing code with arm64. They should never be called in practice. +*/ +static inline void kvm_set_s2pud_readonly (pud_t *pud) +{ +BUG (); +} + +static inline bool kvm_s2pud_readonly (pud_t *pud) +{ +BUG (); +return false; +} + +static inline void kvm_set_pmd (pmd_t *pmd,pmd_t new_pmd) { *pmd = new_pmd;
arch/arm64/include/asm/kvm_mmu.h +10 -0
@@ -239,6 +239,16 @@ static inline bool kvm_s2pmd_exec(pmd_t *pmdp)return !(READ_ONCE (pmd_val (*pmdp)) &PMD_S2_XN ); } +static inline void kvm_set_s2pud_readonly (pud_t *pudp) +{ +kvm_set_s2pte_readonly ((pte_t *)pudp); +} + +static inline bool kvm_s2pud_readonly (pud_t *pudp) +{ +return kvm_s2pte_readonly ((pte_t *)pudp); +} +static inline bool kvm_page_empty (void *ptr) {struct page *ptr_page =virt_to_page (ptr);
virt/kvm/arm/mmu.c +7 -4
@@ -1288,9 +1288,12 @@ static void stage2_wp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)do { next =stage2_pud_addr_end (addr, end);if (!stage2_pud_none (*pud)) { -/* TODO:PUD not supported, revisit later if supported */ -BUG_ON (stage2_pud_huge (*pud)); -stage2_wp_pmds (pud, addr, next); +if (stage2_pud_huge (*pud)) { +if (!kvm_s2pud_readonly (pud)) +kvm_set_s2pud_readonly (pud); + }else { +stage2_wp_pmds (pud, addr, next); + } } }while (pud++, addr = next, addr != end); }
@@ -1333,7 +1336,7 @@ static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)* * Called to start logging dirty pages after memory region * KVM_MEM_LOG_DIRTY_PAGES operation is called. After this function returns -* all present PMD and PTEs are write protected in the memory region. +* all present PUD, PMD and PTEs are write protected in the memory region. * Afterwards read of dirty page log can be called. * * Acquires kvm_mmu_lock. Called with kvm->slots_lock mutex acquired,
Signature · 1 line
2.17.1
PATCH v6 5/8 KVM: arm64: Support PUD hugepage in stage2_is_exec()
In reply to Punit AgrawalIn preparation for creating PUD hugepages at stage 2, add support for detecting execute permissions on PUD page table entries. Faults due to lack of execute permissions on page table entries is used to perform i-cache invalidation on first execute.
Provide trivial implementations of arm32 helpers to allow sharing of code.
--- arch/arm/include/asm/kvm_mmu.h | 6 +++ arch/arm64/include/asm/kvm_mmu.h | 5 +++ arch/arm64/include/asm/pgtable-hwdef.h | 2 + virt/kvm/arm/mmu.c | 53 +++++++++++++++++++++++--- 4 files changed, 61 insertions(+), 5 deletions(-)
arch/arm/include/asm/kvm_mmu.h +6 -0
@@ -96,6 +96,12 @@ static inline bool kvm_s2pud_readonly(pud_t *pud) } +static inline bool kvm_s2pud_exec (pud_t *pud) +{ +BUG (); +return false; +} +static inline void kvm_set_pmd (pmd_t *pmd,pmd_t new_pmd) { *pmd = new_pmd;
arch/arm64/include/asm/kvm_mmu.h +5 -0
@@ -249,6 +249,11 @@ static inline bool kvm_s2pud_readonly(pud_t *pudp)return kvm_s2pte_readonly ((pte_t *)pudp); } +static inline bool kvm_s2pud_exec (pud_t *pudp) +{ +return !(READ_ONCE (pud_val (*pudp)) &PUD_S2_XN ); +} +static inline bool kvm_page_empty (void *ptr) {struct page *ptr_page =virt_to_page (ptr);
arch/arm64/include/asm/pgtable-hwdef.h +2 -0
@@ -193,6 +193,8 @@#define PMD_S2_RDWR (_AT(pmdval_t, 3) << 6)/* HAP[2:1] */ #define PMD_S2_XN (_AT(pmdval_t, 2) << 53)/* XN[1:0] */ +#define PUD_S2_XN (_AT(pudval_t, 2) << 53)/* XN[1:0] */ +/* * Memory Attribute override for Stage-2 (MemAttr[3:0]) */
virt/kvm/arm/mmu.c +48 -5
71 lines not on this page · raw message
Signature · 1 line
2.17.1
PATCH v6 6/8 KVM: arm64: Support handling access faults for PUD hugepages
In reply to Punit AgrawalIn preparation for creating larger hugepages at Stage 2, extend the access fault handling at Stage 2 to support PUD hugepages when encountered.
Provide trivial helpers for arm32 to allow sharing of code.
--- arch/arm/include/asm/kvm_mmu.h | 9 +++++++++ arch/arm64/include/asm/kvm_mmu.h | 7 +++++++ arch/arm64/include/asm/pgtable.h | 6 ++++++ virt/kvm/arm/mmu.c | 22 +++++++++++----------- 4 files changed, 33 insertions(+), 11 deletions(-)
arch/arm/include/asm/kvm_mmu.h +9 -0
@@ -78,6 +78,9 @@ void kvm_clear_hyp_idmap(void);#define kvm_pfn_pte (pfn, prot) pfn_pte(pfn, prot)#define kvm_pfn_pmd (pfn, prot) pfn_pmd(pfn, prot) +#define kvm_pud_pfn (pud) ({ BUG(); 0; }) + +#define kvm_pmd_mkhuge (pmd) pmd_mkhuge(pmd)/*
@@ -102,6 +105,12 @@ static inline bool kvm_s2pud_exec(pud_t *pud)return false; } +static inline pud_t kvm_s2pud_mkyoung (pud_t pud) +{ +BUG (); +return pud; +} +static inline void kvm_set_pmd (pmd_t *pmd,pmd_t new_pmd) { *pmd = new_pmd;
arch/arm64/include/asm/kvm_mmu.h +7 -0
@@ -175,6 +175,8 @@ void kvm_clear_hyp_idmap(void);#define kvm_pfn_pte (pfn, prot) pfn_pte(pfn, prot)#define kvm_pfn_pmd (pfn, prot) pfn_pmd(pfn, prot) +#define kvm_pud_pfn (pud) pud_pfn(pud) +#define kvm_pmd_mkhuge (pmd) pmd_mkhuge(pmd)static inline pte_t kvm_s2pte_mkwrite (pte_t pte)
@@ -254,6 +256,11 @@ static inline bool kvm_s2pud_exec(pud_t *pudp)return !(READ_ONCE (pud_val (*pudp)) &PUD_S2_XN ); } +static inline pud_t kvm_s2pud_mkyoung (pud_t pud) +{ +return pud_mkyoung (pud); +} +static inline bool kvm_page_empty (void *ptr) {struct page *ptr_page =virt_to_page (ptr);
arch/arm64/include/asm/pgtable.h +6 -0
@@ -314,6 +314,11 @@ static inline pte_t pud_pte(pud_t pud)return __pte (pud_val (pud)); } +static inline pud_t pte_pud (pte_t pte) +{ +return __pud (pte_val (pte)); +} +static inline pmd_t pud_pmd (pud_t pud) {return __pmd (pud_val (pud));
@@ -380,6 +385,7 @@ static inline int pmd_protnone(pmd_t pmd)#define pfn_pmd (pfn,prot) __pmd(__phys_to_pmd_val((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot))#define mk_pmd (page,prot) pfn_pmd(page_to_pfn(page),prot) +#define pud_mkyoung (pud) pte_pud(pte_mkyoung(pud_pte(pud)))#define pud_write (pud) pte_write(pud_pte(pud))#define __pud_to_phys (pud) __pte_to_phys(pud_pte(pud))
virt/kvm/arm/mmu.c +11 -11
@@ -1641,6 +1641,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,*/ static void handle_access_fault (struct kvm_vcpu *vcpu,phys_addr_t fault_ipa) { +pud_t *pud;pmd_t *pmd;pte_t *pte;kvm_pfn_t pfn;
@@ -1650,24 +1651,23 @@ static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)spin_lock (&vcpu->kvm->mmu_lock); - pmd =stage2_get_pmd (vcpu->kvm,NULL , fault_ipa); -if (!pmd ||pmd_none (*pmd))/* Nothing there */ +if (!stage2_get_leaf_entry (vcpu->kvm, fault_ipa, &pud, &pmd, &pte)) goto out; -if (pmd_thp_or_huge (*pmd)) {/* THP, HugeTLB */ +if (pud) {/* HugeTLB */ + *pud =kvm_s2pud_mkyoung (*pud); + pfn =kvm_pud_pfn (*pud); + pfn_valid = true; + }else if (pmd) {/* THP, HugeTLB */ *pmd =pmd_mkyoung (*pmd); pfn =pmd_pfn (*pmd); pfn_valid = true; - goto out; + }else { + *pte =pte_mkyoung (*pte);/* Just a page... */ + pfn =pte_pfn (*pte); + pfn_valid = true; } - pte =pte_offset_kernel (pmd, fault_ipa); -if (pte_none (*pte))/* Nothing there either */ - goto out; - - *pte =pte_mkyoung (*pte);/* Just a page... */ - pfn =pte_pfn (*pte); - pfn_valid = true; out:spin_unlock (&vcpu->kvm->mmu_lock);if (pfn_valid)
Signature · 1 line
2.17.1
Re: [PATCH v6 6/8] KVM: arm64: Support handling access faults for PUD hugepages
Quoted 4 lines · Punit Agrawal
In preparation for creating larger hugepages at Stage 2, extend the access fault handling at Stage 2 to support PUD hugepages when encountered.
Quoted 8 lines
Provide trivial helpers for arm32 to allow sharing of code.
Signed-off-by Punit Agrawal <[email protected]>Cc Christoffer Dall <[email protected]>Cc Marc Zyngier <[email protected]>Cc Russell King <[email protected]>Cc Catalin Marinas <[email protected]>Cc Will Deacon <[email protected]>
PATCH v6 7/8 KVM: arm64: Update age handlers to support PUD hugepages
In reply to Punit AgrawalIn preparation for creating larger hugepages at Stage 2, add support to the age handling notifiers for PUD hugepages when encountered.
Provide trivial helpers for arm32 to allow sharing code.
--- arch/arm/include/asm/kvm_mmu.h | 6 +++++ arch/arm64/include/asm/kvm_mmu.h | 5 ++++ arch/arm64/include/asm/pgtable.h | 1 + virt/kvm/arm/mmu.c | 39 ++++++++++++++++---------------- 4 files changed, 32 insertions(+), 19 deletions(-)
arch/arm/include/asm/kvm_mmu.h +6 -0
@@ -111,6 +111,12 @@ static inline pud_t kvm_s2pud_mkyoung(pud_t pud)return pud; } +static inline bool kvm_s2pud_young (pud_t pud) +{ +BUG (); +return false; +} +static inline void kvm_set_pmd (pmd_t *pmd,pmd_t new_pmd) { *pmd = new_pmd;
arch/arm64/include/asm/kvm_mmu.h +5 -0
@@ -261,6 +261,11 @@ static inline pud_t kvm_s2pud_mkyoung(pud_t pud)return pud_mkyoung (pud); } +static inline bool kvm_s2pud_young (pud_t pud) +{ +return pud_young (pud); +} +static inline bool kvm_page_empty (void *ptr) {struct page *ptr_page =virt_to_page (ptr);
arch/arm64/include/asm/pgtable.h +1 -0
@@ -385,6 +385,7 @@ static inline int pmd_protnone(pmd_t pmd)#define pfn_pmd (pfn,prot) __pmd(__phys_to_pmd_val((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot))#define mk_pmd (page,prot) pfn_pmd(page_to_pfn(page),prot) +#define pud_young (pud) pte_young(pud_pte(pud))#define pud_mkyoung (pud) pte_pud(pte_mkyoung(pud_pte(pud)))#define pud_write (pud) pte_write(pud_pte(pud))
virt/kvm/arm/mmu.c +20 -19
@@ -1176,6 +1176,11 @@ static int stage2_pmdp_test_and_clear_young(pmd_t *pmd)return stage2_ptep_test_and_clear_young ((pte_t *)pmd); } +static int stage2_pudp_test_and_clear_young (pud_t *pud) +{ +return stage2_ptep_test_and_clear_young ((pte_t *)pud); +} +/** * kvm_phys_addr_ioremap - map a device range to guest IPA *
@@ -1880,42 +1885,38 @@ void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)static int kvm_age_hva_handler (struct kvm *kvm,gpa_t gpa,u64 size,void *data) { +pud_t *pud;pmd_t *pmd;pte_t *pte; -WARN_ON (size !=PAGE_SIZE && size !=PMD_SIZE ); - pmd =stage2_get_pmd (kvm,NULL , gpa); -if (!pmd ||pmd_none (*pmd))/* Nothing there */ +WARN_ON (size !=PAGE_SIZE && size !=PMD_SIZE && size !=PUD_SIZE ); +if (!stage2_get_leaf_entry (kvm, gpa, &pud, &pmd, &pte))return 0 ; -if (pmd_thp_or_huge (*pmd))/* THP, HugeTLB */ +if (pud) +return stage2_pudp_test_and_clear_young (pud); +else if (pmd)return stage2_pmdp_test_and_clear_young (pmd); - - pte =pte_offset_kernel (pmd, gpa); -if (pte_none (*pte)) -return 0 ; - -return stage2_ptep_test_and_clear_young (pte); +else +return stage2_ptep_test_and_clear_young (pte); }static int kvm_test_age_hva_handler (struct kvm *kvm,gpa_t gpa,u64 size,void *data) { +pud_t *pud;pmd_t *pmd;pte_t *pte; -WARN_ON (size !=PAGE_SIZE && size !=PMD_SIZE ); - pmd =stage2_get_pmd (kvm,NULL , gpa); -if (!pmd ||pmd_none (*pmd))/* Nothing there */ +WARN_ON (size !=PAGE_SIZE && size !=PMD_SIZE && size !=PUD_SIZE ); +if (!stage2_get_leaf_entry (kvm, gpa, &pud, &pmd, &pte))return 0 ; -if (pmd_thp_or_huge (*pmd))/* THP, HugeTLB */ +if (pud) +return kvm_s2pud_young (*pud); +else if (pmd)return pmd_young (*pmd); - - pte =pte_offset_kernel (pmd, gpa); -if (!pte_none (*pte))/* Just a page... */ +else return pte_young (*pte); - -return 0 ; }int kvm_age_hva (struct kvm *kvm,unsigned long start,unsigned long end)
Signature · 1 line
2.17.1
PATCH v6 8/8 KVM: arm64: Add support for creating PUD hugepages at stage 2
In reply to Punit AgrawalKVM only supports PMD hugepages at stage 2. Now that the various page handling routines are updated, extend the stage 2 fault handling to map in PUD hugepages.
Addition of PUD hugepage support enables additional page sizes (e.g., 1G with 4K granule) which can be useful on cores that support mapping larger block sizes in the TLB entries.
--- arch/arm/include/asm/kvm_mmu.h | 19 +++++ arch/arm64/include/asm/kvm_mmu.h | 15 ++++ arch/arm64/include/asm/pgtable-hwdef.h | 2 + arch/arm64/include/asm/pgtable.h | 2 + virt/kvm/arm/mmu.c | 98 ++++++++++++++++++++++++-- 5 files changed, 131 insertions(+), 5 deletions(-)
arch/arm/include/asm/kvm_mmu.h +19 -0
@@ -77,11 +77,14 @@ void kvm_clear_hyp_idmap(void);#define kvm_pfn_pte (pfn, prot) pfn_pte(pfn, prot)#define kvm_pfn_pmd (pfn, prot) pfn_pmd(pfn, prot) +#define kvm_pfn_pud (pfn, prot) (__pud(0))#define kvm_pud_pfn (pud) ({ BUG(); 0; })#define kvm_pmd_mkhuge (pmd) pmd_mkhuge(pmd) +/* No support for pud hugepages */ +#define kvm_pud_mkhuge (pud) (pud)/* * The following kvm_*pud*() functions are provided strictly to allow
@@ -98,6 +101,22 @@ static inline bool kvm_s2pud_readonly(pud_t *pud)return false; } +static inline void kvm_set_pud (pud_t *pud,pud_t new_pud) +{ +BUG (); +} + +static inline pud_t kvm_s2pud_mkwrite (pud_t pud) +{ +BUG (); +return pud; +} + +static inline pud_t kvm_s2pud_mkexec (pud_t pud) +{ +BUG (); +return pud; +}static inline bool kvm_s2pud_exec (pud_t *pud) {
arch/arm64/include/asm/kvm_mmu.h +15 -0
@@ -171,13 +171,16 @@ void kvm_clear_hyp_idmap(void);#define kvm_set_pte (ptep, pte) set_pte(ptep, pte)#define kvm_set_pmd (pmdp, pmd) set_pmd(pmdp, pmd) +#define kvm_set_pud (pudp, pud) set_pud(pudp, pud)#define kvm_pfn_pte (pfn, prot) pfn_pte(pfn, prot)#define kvm_pfn_pmd (pfn, prot) pfn_pmd(pfn, prot) +#define kvm_pfn_pud (pfn, prot) pfn_pud(pfn, prot)#define kvm_pud_pfn (pud) pud_pfn(pud)#define kvm_pmd_mkhuge (pmd) pmd_mkhuge(pmd) +#define kvm_pud_mkhuge (pud) pud_mkhuge(pud)static inline pte_t kvm_s2pte_mkwrite (pte_t pte) {
@@ -191,6 +194,12 @@ static inline pmd_t kvm_s2pmd_mkwrite(pmd_t pmd)return pmd; } +static inline pud_t kvm_s2pud_mkwrite (pud_t pud) +{ +pud_val (pud) |=PUD_S2_RDWR ; +return pud; +} +static inline pte_t kvm_s2pte_mkexec (pte_t pte) {pte_val (pte) &= ~PTE_S2_XN ;
@@ -203,6 +212,12 @@ static inline pmd_t kvm_s2pmd_mkexec(pmd_t pmd)return pmd; } +static inline pud_t kvm_s2pud_mkexec (pud_t pud) +{ +pud_val (pud) &= ~PUD_S2_XN ; +return pud; +} +static inline void kvm_set_s2pte_readonly (pte_t *ptep) {pteval_t old_pteval, pteval;
arch/arm64/include/asm/pgtable-hwdef.h +2 -0
@@ -193,6 +193,8 @@#define PMD_S2_RDWR (_AT(pmdval_t, 3) << 6)/* HAP[2:1] */ #define PMD_S2_XN (_AT(pmdval_t, 2) << 53)/* XN[1:0] */ +#define PUD_S2_RDONLY (_AT(pudval_t, 1) << 6)/* HAP[2:1] */ +#define PUD_S2_RDWR (_AT(pudval_t, 3) << 6)/* HAP[2:1] */ #define PUD_S2_XN (_AT(pudval_t, 2) << 53)/* XN[1:0] */ /*
arch/arm64/include/asm/pgtable.h +2 -0
@@ -389,6 +389,8 @@ static inline int pmd_protnone(pmd_t pmd)#define pud_mkyoung (pud) pte_pud(pte_mkyoung(pud_pte(pud)))#define pud_write (pud) pte_write(pud_pte(pud)) +#define pud_mkhuge (pud) (__pud(pud_val(pud) & ~PUD_TABLE_BIT)) +#define __pud_to_phys (pud) __pte_to_phys(pud_pte(pud))#define __phys_to_pud_val (phys) __phys_to_pte_val(phys)#define pud_pfn (pud) ((__pud_to_phys(pud) & PUD_MASK) >> PAGE_SHIFT)
virt/kvm/arm/mmu.c +93 -5
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Signature · 1 line
2.17.1