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spl: fit: display a message when an FPGA image is loaded

PATCH New Luis Araneda 2 participants 4 messages Jul 19, 2018

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#0 lore raw

PATCH 1/3 spl: fit: display a message when an FPGA image is loaded

A message should be displayed if an image is loaded to an FPGA, because the hardware might have changed, and the user should be informed

---
 common/spl/spl_fit.c | 1 +
 1 file changed, 1 insertion(+)
common/spl/spl_fit.c +1 -0
index 5b51a28a08..9eabb1c105 100644
@@ -412,6 +412,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 			printf("%s: Cannot load the FPGA: %i\n", __func__, ret);
 			return ret;
 		}
+		puts("FPGA image loaded from FIT\n");
 		node = -1;
 	}
 #endif
Signature · 1 line
2.18.0
#1 lore raw

PATCH 2/3 drivers: fpga: zynqpl: fix compilation with SPL

Disable the use of function zynq_loadfs when compiling the driver for the SPL, as the following filesystem functions are not found by the linker:
- fs_set_blk_dev
- fs_read
- fs_set_blk_dev
- fs_read
- fs_read

---
 drivers/fpga/zynqpl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/fpga/zynqpl.c +2 -2
index fd37d18c7f..8e49c7010e 100644
@@ -410,7 +410,7 @@ static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize,
 	return FPGA_SUCCESS;
 }
 
-#if defined(CONFIG_CMD_FPGA_LOADFS)
+#if defined(CONFIG_CMD_FPGA_LOADFS) && !defined(CONFIG_SPL_BUILD)
 static int zynq_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
 		       fpga_fs_info *fsinfo)
 {
@@ -493,7 +493,7 @@ static int zynq_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
 
 struct xilinx_fpga_op zynq_op = {
 	.load = zynq_load,
-#if defined(CONFIG_CMD_FPGA_LOADFS)
+#if defined(CONFIG_CMD_FPGA_LOADFS) && !defined(CONFIG_SPL_BUILD)
 	.loadfs = zynq_loadfs,
 #endif
 };
Signature · 1 line
2.18.0
#2 lore raw

PATCH 3/3 arm: zynq: spl: fix FPGA initialization

In reply to Luis Araneda

commit 4aba5fb857c1 ("arm: zynq: Rework FPGA initialization") moved FPGA initialization from board_init() to arch_early_init_r(), which is not called as part of the SPL

Fix this by calling arch_early_init_r() in the spl_board_init() function, so the FPGA is correctly initialized

---
 arch/arm/mach-zynq/spl.c | 3 +++
 1 file changed, 3 insertions(+)
arch/arm/mach-zynq/spl.c +3 -0
index 83297d6c69..9b7c0be951 100644
@@ -29,6 +29,9 @@ void board_init_f(ulong dummy)
 void spl_board_init(void)
 {
 	preloader_console_init();
+#if defined(CONFIG_ARCH_EARLY_INIT_R) && defined(CONFIG_SPL_FPGA_SUPPORT)
+	arch_early_init_r();
+#endif
 	board_init();
 }
 #endif
Signature · 1 line
2.18.0
#3 lore raw

PATCH 1/3 spl: fit: display a message when an FPGA image is loaded

In reply to Luis Araneda
Quoted 15 lines · Luis Araneda

A message should be displayed if an image is loaded to an FPGA, because the hardware might have changed, and the user should be informed

---
 common/spl/spl_fit.c | 1 +
 1 file changed, 1 insertion(+)
common/spl/spl_fit.c +0 -0
index 5b51a28a08..9eabb1c105 100644

common/spl/spl_fit.c int spl_load_simple_fit(struct spl_image_info *spl_image, · line 418

Quoted 7 lines
common/spl/spl_fit.c +1 -0
@@ -412,6 +412,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 			printf("%s: Cannot load the FPGA: %i\n", __func__, ret);
 			return ret;
 		}
+		puts("FPGA image loaded from FIT\n");
 		node = -1;
 	}
 #endif

Applied all.

Thanks,
Michal