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powerpc/64s/radix: tlb do not flush on page size when fullmm

PATCH Applied Nicholas Piggin 3 participants 3 messages Jul 25, 2018 – Aug 8, 2018

Subsystems (2)
PowerPC MMU gather and TLB invalidation
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Nicholas Piggin

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#0 lore raw

PATCH 1/1 powerpc/64s/radix: tlb do not flush on page size when fullmm

When the mm is being torn down there will be a full PID flush so there is no need to flush the TLB on page size changes.

Signed-off-by Nicholas Piggin <[email protected]>
---
 arch/powerpc/include/asm/tlb.h | 3 +++
 1 file changed, 3 insertions(+)
arch/powerpc/include/asm/tlb.h +3 -0
index 5d3107f2b014..d1b3dc4a6a0a 100644
@@ -84,6 +84,9 @@ static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
 static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb,
 						     unsigned int page_size)
 {
+	if (tlb->fullmm)
+		return;
+
 	if (!tlb->page_size)
 		tlb->page_size = page_size;
 	else if (tlb->page_size != page_size) {
Signature · 1 line
2.17.0
Reviewed-by on v1 1/1
#1 lore raw
Quoted 2 lines · Nicholas Piggin

When the mm is being torn down there will be a full PID flush so there is no need to flush the TLB on page size changes.

and that tlb flush is PID flush since tlb->fulmm is set? So this avoids multiple PID tlb flush.

Reviewed-by Aneesh Kumar K.V <[email protected]>
Quoted 22 lines
Signed-off-by Nicholas Piggin <[email protected]>
---
 arch/powerpc/include/asm/tlb.h | 3 +++
 1 file changed, 3 insertions(+)
arch/powerpc/include/asm/tlb.h +3 -0
index 5d3107f2b014..d1b3dc4a6a0a 100644
@@ -84,6 +84,9 @@ static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
 static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb,
 						     unsigned int page_size)
 {
+	if (tlb->fullmm)
+		return;
+
 	if (!tlb->page_size)
 		tlb->page_size = page_size;
 	else if (tlb->page_size != page_size) {
Signature · 1 line
2.17.0