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iommu/arm-smmu-v3: sync the OVACKFLG to PRIQ consumer register

PATCH New Shaokun Zhang 3 participants 5 messages Jul 23, 2018 – Jul 27, 2018 IOMMU

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#0 lore raw

PATCH 1/1 iommu/arm-smmu-v3: sync the OVACKFLG to PRIQ consumer register

From: Miao Zhong <[email protected]>

When PRI queue occurs overflow, driver should update the OVACKFLG to the PRIQ consumer register, otherwise subsequent PRI requests will not be processed.

Cc Will Deacon <[email protected]>
Cc Robin Murphy <[email protected]>
---
 drivers/iommu/arm-smmu-v3.c | 1 +
 1 file changed, 1 insertion(+)
drivers/iommu/arm-smmu-v3.c +1 -0
index 1d64710..deacc15 100644
@@ -1301,6 +1301,7 @@ static irqreturn_t arm_smmu_priq_thread(int irq, void *dev)
 
 	/* Sync our overflow flag, as we believe we're up to speed */
 	q->cons = Q_OVF(q, q->prod) | Q_WRP(q, q->cons) | Q_IDX(q, q->cons);
+	writel(q->cons, q->cons_reg);
 	return IRQ_HANDLED;
 }
 
Signature · 1 line
2.7.4
#1 lore raw

PATCH 1/1 iommu/arm-smmu-v3: sync the OVACKFLG to PRIQ consumer register

Quoted 5 lines · Shaokun Zhang

From: Miao Zhong <[email protected]>

When PRI queue occurs overflow, driver should update the OVACKFLG to the PRIQ consumer register, otherwise subsequent PRI requests will not be processed.

Since the upstream driver doesn't enable PRI in endpoints, I'm not sure this patch makes sense on its own, but it seems correct anyway. I had a similar patch in my initial SVA RFC, but for some reason dropped it in later versions (https://patchwork.kernel.org/patch/9594021/)

It's worth noting that the event queue doesn't have the same problem, because the SMMU can record new events even if the overflow hasn't been acknowledged.

Thanks,
Jean

#2 lore raw

PATCH 1/1 iommu/arm-smmu-v3: sync the OVACKFLG to PRIQ consumer register

In reply to Shaokun Zhang

Hi Will,

I saw it in your trees, is it necessary to Cc stable version?

Cheers,
Shaokun

Quoted 26 lines · Shaokun Zhang

From: Miao Zhong <[email protected]>

When PRI queue occurs overflow, driver should update the OVACKFLG to the PRIQ consumer register, otherwise subsequent PRI requests will not be processed.

Cc Will Deacon <[email protected]>
Cc Robin Murphy <[email protected]>
---
 drivers/iommu/arm-smmu-v3.c | 1 +
 1 file changed, 1 insertion(+)
drivers/iommu/arm-smmu-v3.c +1 -0
index 1d64710..deacc15 100644
@@ -1301,6 +1301,7 @@ static irqreturn_t arm_smmu_priq_thread(int irq, void *dev)
 
 	/* Sync our overflow flag, as we believe we're up to speed */
 	q->cons = Q_OVF(q, q->prod) | Q_WRP(q, q->cons) | Q_IDX(q, q->cons);
+	writel(q->cons, q->cons_reg);
 	return IRQ_HANDLED;
 }
 
#3 lore raw

PATCH 1/1 iommu/arm-smmu-v3: sync the OVACKFLG to PRIQ consumer register

Quoted 1 line · Zhangshaokun

I saw it in your trees, is it necessary to Cc stable version?

I don't think so, given that we don't actually support PRI upstream.

Will

Quoted 28 lines · Shaokun Zhang
Quoted 26 lines

From: Miao Zhong <[email protected]>

When PRI queue occurs overflow, driver should update the OVACKFLG to the PRIQ consumer register, otherwise subsequent PRI requests will not be processed.

Cc Will Deacon <[email protected]>
Cc Robin Murphy <[email protected]>
---
 drivers/iommu/arm-smmu-v3.c | 1 +
 1 file changed, 1 insertion(+)
drivers/iommu/arm-smmu-v3.c +1 -0
index 1d64710..deacc15 100644
@@ -1301,6 +1301,7 @@ static irqreturn_t arm_smmu_priq_thread(int irq, void *dev)
 
 	/* Sync our overflow flag, as we believe we're up to speed */
 	q->cons = Q_OVF(q, q->prod) | Q_WRP(q, q->cons) | Q_IDX(q, q->cons);
+	writel(q->cons, q->cons_reg);
 	return IRQ_HANDLED;
 }
 
#4 lore raw

PATCH 1/1 iommu/arm-smmu-v3: sync the OVACKFLG to PRIQ consumer register

Quoted 5 lines · Will Deacon
Quoted 1 line · Zhangshaokun

I saw it in your trees, is it necessary to Cc stable version?

I don't think so, given that we don't actually support PRI upstream.

Got it, thanks your reply.

Shaokun

Quoted 33 lines

Will

Quoted 20 lines · Shaokun Zhang
Quoted 19 lines

From: Miao Zhong <[email protected]>

When PRI queue occurs overflow, driver should update the OVACKFLG to the PRIQ consumer register, otherwise subsequent PRI requests will not be processed.

Cc Will Deacon <[email protected]>
Cc Robin Murphy <[email protected]>
---
 drivers/iommu/arm-smmu-v3.c | 1 +
 1 file changed, 1 insertion(+)
drivers/iommu/arm-smmu-v3.c +0 -0
index 1d64710..deacc15 100644
@@ -1301,6 +1301,7 @@ static irqreturn_t arm_smmu_priq_thread(int irq, void *dev)
 
Quoted 8 lines

drivers/iommu/arm-smmu-v3.c static irqreturn_t arm_smmu_priq_thread(int irq, void *dev) · line 1307

Quoted 7 lines
drivers/iommu/arm-smmu-v3.c +1 -0
 	/* Sync our overflow flag, as we believe we're up to speed */
 	q->cons = Q_OVF(q, q->prod) | Q_WRP(q, q->cons) | Q_IDX(q, q->cons);
+	writel(q->cons, q->cons_reg);
 	return IRQ_HANDLED;
 }
 

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