ARM: tegra: align carveout size

PATCH New Stephen Warren 3 participants 6 messages Jul 31, 2018 – Aug 2, 2018

Subsystems (3)

Arm (32-bit) Arm sub-architectures Tegra architecture support

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Stephen Warren

author

2018-07-31 18:38 UTC #0 lore raw

PATCH 1/1 ARM: tegra: align carveout size

From: Stephen Warren <[email protected]>

Align the size of the carveout region to 2M. This ensures that the size can be accurately represented by an LPAE page table that uses sections.

This solves a bug (hang at boot time soon after printing the DRAM size) that only shows up when the following two commits are merged together:
d32e86bde8a3 ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is supported 6e584e633d10 ARM: tegra: avoid using secure carveout RAM

Cc Mark Kettenis <[email protected]>

Cc Alexander Graf <[email protected]>

Signed-off-by Stephen Warren <[email protected]>

---
This should be applied quickly since it fixes a regression that causes all boots to fail, which in turn causes test/py to reset and "reflash" the target board for each test, which causes the test to take eons.

 arch/arm/mach-tegra/board2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/mach-tegra/board2.c +1 -1

index 5ecadf705e7e..421a71b3014d 100644
@@ -252,7 +252,7 @@ static ulong carveout_size(void)
 #elif defined(CONFIG_ARMV7_SECURE_RESERVE_SIZE)
 	// BASE+SIZE might not == 4GB. If so, we want the carveout to cover
 	// from BASE to 4GB, not BASE to BASE+SIZE.
-	return (0 - CONFIG_ARMV7_SECURE_BASE);
+	return (0 - CONFIG_ARMV7_SECURE_BASE) & ~(SZ_2M - 1);
 #else
 	return 0;
 #endif

Signature · 1 line

2.18.0

Stephen Warren

author

2018-08-01 23:26 UTC #1 lore raw

PATCH 1/1 ARM: tegra: align carveout size

Quoted 10 lines · Stephen Warren

From: Stephen Warren <[email protected]>
Align the size of the carveout region to 2M. This ensures that the size can be accurately represented by an LPAE page table that uses sections.
This solves a bug (hang at boot time soon after printing the DRAM size) that only shows up when the following two commits are merged together:
d32e86bde8a3 ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is supported 6e584e633d10 ARM: tegra: avoid using secure carveout RAM

Quoted 7 lines

Cc Mark Kettenis <[email protected]>
Cc Alexander Graf <[email protected]>
Signed-off-by Stephen Warren <[email protected]>
---
This should be applied quickly since it fixes a regression that causes all boots to fail, which in turn causes test/py to reset and "reflash" the target board for each test, which causes the test to take eons.

Could we apply this please? My Jenkins system will love you because of it:-)

Tom Rini

2018-08-01 23:46 UTC #2 lore raw

PATCH 1/1 ARM: tegra: align carveout size

Quoted 19 lines · Stephen Warren

Quoted 10 lines · Stephen Warren
From: Stephen Warren <[email protected]>
Align the size of the carveout region to 2M. This ensures that the size can be accurately represented by an LPAE page table that uses sections.
This solves a bug (hang at boot time soon after printing the DRAM size) that only shows up when the following two commits are merged together:
d32e86bde8a3 ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is supported 6e584e633d10 ARM: tegra: avoid using secure carveout RAM
Quoted 7 lines
Cc Mark Kettenis <[email protected]>
Cc Alexander Graf <[email protected]>
Signed-off-by Stephen Warren <[email protected]>
---
This should be applied quickly since it fixes a regression that causes all boots to fail, which in turn causes test/py to reset and "reflash" the target board for each test, which causes the test to take eons.

Quoted 1 line

Could we apply this please? My Jenkins system will love you because of it:-)

I'm looking for one more person to Ack this, thanks!

Signature · 8 lines

Tom
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Tom Warren

2018-08-01 23:52 UTC #3 lore raw

PATCH 1/1 ARM: tegra: align carveout size

I can add this to my PR list (but probably won't get one out until tomorrow morning), or:

Acked-by Tom Warren <[email protected]>

If that'll get it in sooner.

Tom

-----Original Message-----
From: Tom Rini <[email protected]>
Sent: Wednesday, August 1, 2018 4:47 PM
To: Stephen Warren <[email protected]>
Cc: Tom Warren <[email protected]>; u-boot at lists.denx.de; Simon Glass <[email protected]>; Stephen Warren <[email protected]>; Mark Kettenis <[email protected]>; Alexander Graf <[email protected]>
Subject: Re: [U-Boot] [PATCH] ARM: tegra: align carveout size

Quoted 20 lines · Stephen Warren

Quoted 11 lines · Stephen Warren
From: Stephen Warren <[email protected]>
Align the size of the carveout region to 2M. This ensures that the size can be accurately represented by an LPAE page table that uses sections.
This solves a bug (hang at boot time soon after printing the DRAM size) that only shows up when the following two commits are merged together:
d32e86bde8a3 ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is supported
6e584e633d10 ARM: tegra: avoid using secure carveout RAM
Quoted 7 lines
Cc Mark Kettenis <[email protected]>
Cc Alexander Graf <[email protected]>
Signed-off-by Stephen Warren <[email protected]>
---
This should be applied quickly since it fixes a regression that causes all boots to fail, which in turn causes test/py to reset and "reflash" the target board for each test, which causes the test to take eons.

Quoted 2 lines

Could we apply this please? My Jenkins system will love you because of it:-)

I'm looking for one more person to Ack this, thanks!

--
Tom
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Tom Rini

Applied

2018-08-02 00:06 UTC #4 lore raw

PATCH 1/1 ARM: tegra: align carveout size

Quoted 5 lines · Tom Warren

I can add this to my PR list (but probably won't get one out until tomorrow morning), or:
Acked-by Tom Warren <[email protected]>
If that'll get it in sooner.

Applied, thanks!

Quoted 48 lines

Tom
-----Original Message-----
From: Tom Rini <[email protected]>
Sent: Wednesday, August 1, 2018 4:47 PM
To: Stephen Warren <[email protected]>
Cc: Tom Warren <[email protected]>; u-boot at lists.denx.de; Simon Glass <[email protected]>; Stephen Warren <[email protected]>; Mark Kettenis <[email protected]>; Alexander Graf <[email protected]>
Subject: Re: [U-Boot] [PATCH] ARM: tegra: align carveout size
Quoted 20 lines · Stephen Warren
Quoted 11 lines · Stephen Warren
From: Stephen Warren <[email protected]>
Align the size of the carveout region to 2M. This ensures that the size can be accurately represented by an LPAE page table that uses sections.
This solves a bug (hang at boot time soon after printing the DRAM size) that only shows up when the following two commits are merged together:
d32e86bde8a3 ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is supported
6e584e633d10 ARM: tegra: avoid using secure carveout RAM
Quoted 7 lines
Cc Mark Kettenis <[email protected]>
Cc Alexander Graf <[email protected]>
Signed-off-by Stephen Warren <[email protected]>
---
This should be applied quickly since it fixes a regression that causes all boots to fail, which in turn causes test/py to reset and "reflash" the target board for each test, which causes the test to take eons.
Quoted 2 lines
Could we apply this please? My Jenkins system will love you because of it:-)
I'm looking for one more person to Ack this, thanks!
--
Tom
-----------------------------------------------------------------------------------
This email message is for the sole use of the intended recipient(s) and may contain confidential information. Any unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply email and destroy all copies of the original message.
-----------------------------------------------------------------------------------
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Signature · 8 lines

Tom
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Stephen Warren

author

2018-08-02 17:03 UTC #5 lore raw

PATCH 1/1 ARM: tegra: align carveout size

Quoted 9 lines · Tom Rini

Quoted 5 lines · Tom Warren
I can add this to my PR list (but probably won't get one out until tomorrow morning), or:
Acked-by Tom Warren <[email protected]>
If that'll get it in sooner.
Applied, thanks!

Thanks. The Jetson TK1 tests all look good again.

Quoted 49 lines

Quoted 48 lines
Tom
-----Original Message-----
From: Tom Rini <[email protected]>
Sent: Wednesday, August 1, 2018 4:47 PM
To: Stephen Warren <[email protected]>
Cc: Tom Warren <[email protected]>; u-boot at lists.denx.de; Simon Glass <[email protected]>; Stephen Warren <[email protected]>; Mark Kettenis <[email protected]>; Alexander Graf <[email protected]>
Subject: Re: [U-Boot] [PATCH] ARM: tegra: align carveout size
Quoted 20 lines · Stephen Warren
Quoted 11 lines · Stephen Warren
From: Stephen Warren <[email protected]>
Align the size of the carveout region to 2M. This ensures that the size can be accurately represented by an LPAE page table that uses sections.
This solves a bug (hang at boot time soon after printing the DRAM size) that only shows up when the following two commits are merged together:
d32e86bde8a3 ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is supported
6e584e633d10 ARM: tegra: avoid using secure carveout RAM
Quoted 7 lines
Cc Mark Kettenis <[email protected]>
Cc Alexander Graf <[email protected]>
Signed-off-by Stephen Warren <[email protected]>
---
This should be applied quickly since it fixes a regression that causes all boots to fail, which in turn causes test/py to reset and "reflash" the target board for each test, which causes the test to take eons.
Quoted 2 lines
Could we apply this please? My Jenkins system will love you because of it:-)
I'm looking for one more person to Ack this, thanks!
--
Tom
-----------------------------------------------------------------------------------
This email message is for the sole use of the intended recipient(s) and may contain confidential information. Any unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply email and destroy all copies of the original message.
-----------------------------------------------------------------------------------
_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
https://lists.denx.de/listinfo/u-boot